xref: /linux/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml (revision cb4eb6771c0f8fd1c52a8f6fdec7762fb087380a) 
1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Amlogic Meson SAR (Successive Approximation Register) A/D converter
8
9maintainers:
10  - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
11
12description:
13  Binding covers a range of ADCs found on Amlogic Meson SoCs.
14
15properties:
16  compatible:
17    oneOf:
18      - const: amlogic,meson-saradc
19      - items:
20          - enum:
21              - amlogic,meson8-saradc
22              - amlogic,meson8b-saradc
23              - amlogic,meson8m2-saradc
24              - amlogic,meson-gxbb-saradc
25              - amlogic,meson-gxl-saradc
26              - amlogic,meson-gxlx-saradc
27              - amlogic,meson-gxm-saradc
28              - amlogic,meson-axg-saradc
29              - amlogic,meson-g12a-saradc
30          # Usage of this generic fallback is not allowed for new devices
31          - const: amlogic,meson-saradc
32      - items:
33          - const: amlogic,meson-s4-saradc
34          - const: amlogic,meson-g12a-saradc
35
36  reg:
37    maxItems: 1
38
39  interrupts:
40    description: Interrupt indicates end of sampling.
41    maxItems: 1
42
43  clocks:
44    minItems: 2
45    maxItems: 4
46
47  clock-names:
48    minItems: 2
49    items:
50      - const: clkin
51      - const: core
52      - const: adc_clk
53      - const: adc_sel
54
55  vref-supply: true
56
57  "#io-channel-cells":
58    const: 1
59
60  amlogic,hhi-sysctrl:
61    $ref: /schemas/types.yaml#/definitions/phandle
62    description:
63      Syscon which contains the 5th bit of the TSC (temperature sensor
64      coefficient) on Meson8b and Meson8m2 (which used to calibrate the
65      temperature sensor)
66
67  nvmem-cells:
68    description: phandle to the temperature_calib eFuse cells
69    maxItems: 1
70
71  nvmem-cell-names:
72    const: temperature_calib
73
74  power-domains:
75    maxItems: 1
76
77allOf:
78  - if:
79      properties:
80        compatible:
81          contains:
82            enum:
83              - amlogic,meson8-saradc
84              - amlogic,meson8b-saradc
85              - amlogic,meson8m2-saradc
86    then:
87      properties:
88        clocks:
89          maxItems: 2
90        clock-names:
91          maxItems: 2
92    else:
93      properties:
94        nvmem-cells: false
95        mvmem-cel-names: false
96        clocks:
97          minItems: 4
98        clock-names:
99          minItems: 4
100
101  - if:
102      properties:
103        compatible:
104          contains:
105            enum:
106              - amlogic,meson8-saradc
107              - amlogic,meson8b-saradc
108              - amlogic,meson8m2-saradc
109    then:
110      properties:
111        amlogic,hhi-sysctrl: true
112    else:
113      properties:
114        amlogic,hhi-sysctrl: false
115
116required:
117  - compatible
118  - reg
119  - interrupts
120  - clocks
121  - clock-names
122  - "#io-channel-cells"
123
124additionalProperties: false
125
126examples:
127  - |
128    #include <dt-bindings/interrupt-controller/irq.h>
129    #include <dt-bindings/clock/gxbb-clkc.h>
130    #include <dt-bindings/interrupt-controller/arm-gic.h>
131    soc {
132        #address-cells = <2>;
133        #size-cells = <2>;
134        adc@8680 {
135            compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc";
136            #io-channel-cells = <1>;
137            reg = <0x0 0x8680 0x0 0x34>;
138            interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
139            clocks = <&xtal>,
140                <&clkc CLKID_SAR_ADC>,
141                <&clkc CLKID_SAR_ADC_CLK>,
142                <&clkc CLKID_SAR_ADC_SEL>;
143            clock-names = "clkin", "core", "adc_clk", "adc_sel";
144        };
145        adc@9680 {
146            compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc";
147            #io-channel-cells = <1>;
148            reg = <0x0 0x9680 0x0 0x34>;
149            interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
150            clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
151            clock-names = "clkin", "core";
152            nvmem-cells = <&tsens_caldata>;
153            nvmem-cell-names = "temperature_calib";
154            amlogic,hhi-sysctrl = <&hhi>;
155        };
156    };
157...
158