1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/net/altr,tse.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Altera Triple Speed Ethernet MAC driver (TSE) 8 9maintainers: 10 - Maxime Chevallier <maxime.chevallier@bootlin.com> 11 12properties: 13 compatible: 14 oneOf: 15 - const: altr,tse-1.0 16 - const: ALTR,tse-1.0 17 deprecated: true 18 - const: altr,tse-msgdma-1.0 19 20 interrupts: 21 minItems: 2 22 23 interrupt-names: 24 items: 25 - const: rx_irq 26 - const: tx_irq 27 28 rx-fifo-depth: 29 $ref: /schemas/types.yaml#/definitions/uint32 30 description: 31 Depth in bytes of the RX FIFO 32 33 tx-fifo-depth: 34 $ref: /schemas/types.yaml#/definitions/uint32 35 description: 36 Depth in bytes of the TX FIFO 37 38 altr,has-supplementary-unicast: 39 type: boolean 40 description: 41 If present, TSE supports additional unicast addresses. 42 43 altr,has-hash-multicast-filter: 44 type: boolean 45 description: 46 If present, TSE supports hash based multicast filter. 47 48 mdio: 49 $ref: mdio.yaml# 50 unevaluatedProperties: false 51 description: 52 Creates and registers an MDIO bus. 53 54 properties: 55 compatible: 56 const: altr,tse-mdio 57 58 required: 59 - compatible 60 61required: 62 - compatible 63 - reg 64 - interrupts 65 - rx-fifo-depth 66 - tx-fifo-depth 67 68allOf: 69 - $ref: ethernet-controller.yaml# 70 - if: 71 properties: 72 compatible: 73 contains: 74 enum: 75 - altr,tse-1.0 76 - ALTR,tse-1.0 77 then: 78 properties: 79 reg: 80 minItems: 4 81 reg-names: 82 items: 83 - const: control_port 84 - const: rx_csr 85 - const: tx_csr 86 - const: s1 87 88 - if: 89 properties: 90 compatible: 91 contains: 92 enum: 93 - altr,tse-msgdma-1.0 94 then: 95 properties: 96 reg: 97 minItems: 6 98 maxItems: 7 99 reg-names: 100 minItems: 6 101 items: 102 - const: control_port 103 - const: rx_csr 104 - const: rx_desc 105 - const: rx_resp 106 - const: tx_csr 107 - const: tx_desc 108 - const: pcs 109 110unevaluatedProperties: false 111 112examples: 113 - | 114 tse_sub_0: ethernet@c0100000 { 115 compatible = "altr,tse-msgdma-1.0"; 116 reg = <0xc0100000 0x00000400>, 117 <0xc0101000 0x00000020>, 118 <0xc0102000 0x00000020>, 119 <0xc0103000 0x00000008>, 120 <0xc0104000 0x00000020>, 121 <0xc0105000 0x00000020>, 122 <0xc0106000 0x00000100>; 123 reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc", "pcs"; 124 interrupt-parent = <&intc>; 125 interrupts = <0 44 4>,<0 45 4>; 126 interrupt-names = "rx_irq","tx_irq"; 127 rx-fifo-depth = <2048>; 128 tx-fifo-depth = <2048>; 129 max-frame-size = <1500>; 130 local-mac-address = [ 00 00 00 00 00 00 ]; 131 altr,has-supplementary-unicast; 132 altr,has-hash-multicast-filter; 133 sfp = <&sfp0>; 134 phy-mode = "sgmii"; 135 managed = "in-band-status"; 136 }; 137 - | 138 tse_sub_1_eth_tse_0: ethernet@1,00001000 { 139 compatible = "altr,tse-msgdma-1.0"; 140 reg = <0x00001000 0x00000400>, 141 <0x00001460 0x00000020>, 142 <0x00001480 0x00000020>, 143 <0x000014A0 0x00000008>, 144 <0x00001400 0x00000020>, 145 <0x00001420 0x00000020>; 146 reg-names = "control_port", "rx_csr", "rx_desc", "rx_resp", "tx_csr", "tx_desc"; 147 interrupt-parent = <&hps_0_arm_gic_0>; 148 interrupts = <0 43 4>, <0 42 4>; 149 interrupt-names = "rx_irq", "tx_irq"; 150 rx-fifo-depth = <2048>; 151 tx-fifo-depth = <2048>; 152 max-frame-size = <1500>; 153 local-mac-address = [ 00 00 00 00 00 00 ]; 154 phy-mode = "gmii"; 155 altr,has-supplementary-unicast; 156 altr,has-hash-multicast-filter; 157 phy-handle = <&phy1>; 158 mdio { 159 compatible = "altr,tse-mdio"; 160 #address-cells = <1>; 161 #size-cells = <0>; 162 phy1: ethernet-phy@1 { 163 reg = <0x1>; 164 }; 165 }; 166 }; 167 168... 169