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/linux/Documentation/devicetree/bindings/rtc/
H A Ddallas,ds1390.txt1 * Dallas DS1390 SPI Serial Real-Time Clock
4 - compatible: Should contain "dallas,ds1390".
5 - reg: SPI address for chip
8 - trickle-resistor-ohms : Selected resistor for trickle charger
10 Should be given if trickle charger should be enabled
11 - trickle-diode-disable : Do not use internal trickle charger diode
12 Should be given if internal trickle charger diode should be disabled
16 trickle-resistor-ohms = <250>;
H A Drtc-ds1307.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/rtc/rtc-ds1307.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
15 - enum:
16 - dallas,ds1307
17 - dallas,ds1308
18 - dallas,ds1337
19 - dallas,ds1338
[all …]
H A Dadi,max31335.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Antoniu Miclaus <antoniu.miclaus@analog.com>
13 Analog Devices MAX31335 I2C RTC ±2ppm Automotive Real-Time Clock with
17 - $ref: rtc.yaml#
22 - adi,max31331
23 - adi,max31335
31 "#clock-cells":
36 adi,tc-diode:
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H A Dmicrocrystal,rv3032.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip RV-3032 RTC
10 - $ref: rtc.yaml#
13 - Alexandre Belloni <alexandre.belloni@bootlin.com>
25 start-year: true
27 trickle-resistor-ohms:
29 - 1000
30 - 2000
[all …]
H A Dti,bq32000.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI BQ32000 I2C Serial Real-Time Clock
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - $ref: rtc.yaml#
25 start-year: true
27 trickle-resistor-ohms:
30 trickle-diode-disable: true
33 - compatible
[all …]
H A Dmicrocrystal,rv3028.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip RV-3028 RTC
10 - $ref: rtc.yaml#
13 - Alexandre Belloni <alexandre.belloni@bootlin.com>
25 "#clock-cells":
28 trickle-resistor-ohms:
30 - 3000
31 - 5000
[all …]
H A Drtc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
18 pattern: "^rtc(@.*|-([0-9]|[1-9][0-9]+))?$"
20 aux-voltage-chargeable:
29 quartz-load-femtofarads:
31 The capacitive load of the quartz(x-tal), expressed in femto
35 start-year:
41 trickle-diode-disable:
[all …]
/linux/drivers/rtc/
H A Drtc-bq32k.c1 // SPDX-License-Identifier: GPL-2.0-only
33 #define BQ32K_TCH2 0x08 /* Trickle charge enable */
34 #define BQ32K_CFG2 0x09 /* Trickle charger control */
35 #define BQ32K_TCFE BIT(6) /* Trickle charge FET bypass */
58 .addr = client->addr, in bq32k_read()
63 .addr = client->addr, in bq32k_read()
70 if (i2c_transfer(client->adapter, msgs, 2) == 2) in bq32k_read()
73 return -EIO; in bq32k_read()
87 return -EIO; in bq32k_write()
104 return -EINVAL; in bq32k_rtc_read_time()
[all …]
H A Drtc-ds1390.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rtc-ds1390.c -- driver for the Dallas/Maxim DS1390/93/94 SPI RTC
10 * (alarms, trickle charger, different control registers) are unavailable.
74 return -EINVAL; in ds1390_get_reg()
77 chip->txrx_buf[0] = address & 0x7f; in ds1390_get_reg()
79 status = spi_write_then_read(spi, chip->txrx_buf, 1, chip->txrx_buf, 1); in ds1390_get_reg()
83 *data = chip->txrx_buf[0]; in ds1390_get_reg()
90 u32 ohms = 0; in ds1390_trickle_of_init() local
93 if (of_property_read_u32(spi->dev.of_node, "trickle-resistor-ohms", in ds1390_trickle_of_init()
94 &ohms)) in ds1390_trickle_of_init()
[all …]
H A Drtc-sunplus.c1 // SPDX-License-Identifier: GPL-2.0
69 *secs = (unsigned long)readl(sp_rtc->reg_base + RTC_TIMER_OUT); in sp_get_seconds()
76 writel((u32)secs, sp_rtc->reg_base + RTC_TIMER_SET); in sp_set_seconds()
105 alarm_time = rtc_tm_to_time64(&alrm->time); in sp_rtc_set_alarm()
107 writel((u32)alarm_time, sp_rtc->reg_base + RTC_ALARM_SET); in sp_rtc_set_alarm()
117 alarm_time = readl(sp_rtc->reg_base + RTC_ALARM_SET); in sp_rtc_read_alarm()
121 alrm->enabled = 0; in sp_rtc_read_alarm()
123 alrm->enabled = 1; in sp_rtc_read_alarm()
125 rtc_time64_to_tm((unsigned long)(alarm_time), &alrm->time); in sp_rtc_read_alarm()
139 sp_rtc->reg_base + RTC_CTRL); in sp_rtc_alarm_irq_enable()
[all …]
H A Drtc-rv3028.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/clk-provider.h>
110 struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent); in timestamp0_store()
112 regmap_update_bits(rv3028->regmap, RV3028_EVT_CTRL, RV3028_EVT_CTRL_TSR, in timestamp0_store()
121 struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent); in timestamp0_show()
127 ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count); in timestamp0_show()
134 ret = regmap_bulk_read(rv3028->regmap, RV3028_TS_SEC, date, in timestamp0_show()
143 tm.tm_mon = bcd2bin(date[4]) - 1; in timestamp0_show()
159 struct rv3028_data *rv3028 = dev_get_drvdata(dev->parent); in timestamp0_count_show()
163 ret = regmap_read(rv3028->regmap, RV3028_TS_COUNT, &count); in timestamp0_count_show()
[all …]
H A Drtc-rv3029c2.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Micro Crystal RV-3029 / RV-3049 rtc class driver
5 * Author: Gregory Hermant <gregory.hermant@calao-systems.com>
19 #include <linux/hwmon-sysfs.h>
107 #define RV3029_CONTROL_E2P_XOFFS_SIGN BIT(7) /* Sign: 1->pos, 0->neg */
128 for (i = 100; i > 0; i--) { in rv3029_eeprom_busywait()
129 ret = regmap_read(rv3029->regmap, RV3029_STATUS, &sr); in rv3029_eeprom_busywait()
137 dev_err(rv3029->dev, "EEPROM busy wait timeout.\n"); in rv3029_eeprom_busywait()
138 return -ETIMEDOUT; in rv3029_eeprom_busywait()
146 /* Re-enable eeprom refresh */ in rv3029_eeprom_exit()
[all …]
H A Drtc-rv3032.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/clk-provider.h>
122 return regmap_update_bits(rv3032->regmap, RV3032_CTRL1, RV3032_CTRL1_EERD, 0); in rv3032_exit_eerd()
130 ret = regmap_read(rv3032->regmap, RV3032_CTRL1, &ctrl1); in rv3032_enter_eerd()
138 ret = regmap_update_bits(rv3032->regmap, RV3032_CTRL1, in rv3032_enter_eerd()
143 ret = regmap_read_poll_timeout(rv3032->regmap, RV3032_TLSB, status, in rv3032_enter_eerd()
165 ret = regmap_update_bits(rv3032->regmap, reg, mask, val); in rv3032_update_cfg()
169 ret = regmap_write(rv3032->regmap, RV3032_EEPROM_CMD, RV3032_EEPROM_CMD_UPDATE); in rv3032_update_cfg()
175 ret = regmap_read_poll_timeout(rv3032->regmap, RV3032_TLSB, status, in rv3032_update_cfg()
191 if (regmap_read(rv3032->regmap, RV3032_STATUS, &status) < 0 || in rv3032_handle_irq()
[all …]
H A Drtc-ds1307.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
23 #include <linux/hwmon-sysfs.h>
24 #include <linux/clk-provider.h>
29 * We can't determine type by probing, but if we expect pre-Linux code
31 * setting the date and time), Linux can ignore the non-clock features.
56 #define DS1307_REG_SECS 0x00 /* 00-59 */
60 #define DS1307_REG_MIN 0x01 /* 00-59 */
62 #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
67 #define DS1307_REG_WDAY 0x03 /* 01-07 */
[all …]
H A Drtc-ab-eoz9.c1 // SPDX-License-Identifier: GPL-2.0
3 * Real Time Clock driver for AB-RTCMC-32.768kHz-EOZ9 chip.
16 #include <linux/hwmon-sysfs.h>
81 #define ABEOZ953_TEMP_MIN -60
103 struct regmap *regmap = data->regmap; in abeoz9_check_validity()
115 dev_warn(dev, "power-on reset detected, date is invalid\n"); in abeoz9_check_validity()
116 return -EINVAL; in abeoz9_check_validity()
122 return -EINVAL; in abeoz9_check_validity()
128 return -EINVAL; in abeoz9_check_validity()
153 ret = regmap_bulk_read(data->regmap, ABEOZ9_REG_SEC, in abeoz9_rtc_get_time()
[all …]
H A Drtc-max31335.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/clk-provider.h>
260 const struct chip_desc *chip = max31335->chip; in max31335_volatile_reg()
263 if (reg >= chip->sec_reg && reg < chip->sec_reg + MAX31335_TIME_SIZE) in max31335_volatile_reg()
267 if (reg == chip->int_status_reg) in max31335_volatile_reg()
271 if (chip->temp_reg && (reg == chip->temp_reg || reg == chip->temp_reg + 1)) in max31335_volatile_reg()
290 ret = regmap_bulk_read(max31335->regmap, max31335->chip->sec_reg, date, in max31335_read_time()
295 tm->tm_sec = bcd2bin(date[0] & 0x7f); in max31335_read_time()
296 tm->tm_min = bcd2bin(date[1] & 0x7f); in max31335_read_time()
297 tm->tm_hour = bcd2bin(date[2] & 0x3f); in max31335_read_time()
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-libra-rdk-fpsc.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/leds/leds-pca9532.h>
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 #include <dt-bindings/pwm/pwm.h>
11 #include "imx8mp-phycore-fpsc.dtsi"
14 compatible = "phytec,imx8mp-libra-rdk-fpsc",
15 "phytec,imx8mp-phycore-fpsc", "fsl,imx8mp";
19 compatible = "pwm-backlight";
20 pinctrl-0 = <&pinctrl_lvds0>;
[all …]
H A Dimx93-phyboard-nash.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 * https://www.phytec.eu/en/produkte/development-kits/phyboard-nash/
10 /dts-v1/;
12 #include <dt-bindings/net/ti-dp83867.h>
13 #include "imx93-phycore-som.dtsi"
16 model = "PHYTEC phyBOARD-Nash-i.MX93";
17 compatible = "phytec,imx93-phyboard-nash", "phytec,imx93-phycore-som",
28 stdout-path = &lpuart1;
31 flexcan1_tc: can-phy0 {
33 #phy-cells = <0>;
[all …]
H A Dimx8mm-phyboard-polis-rdk.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 #include "imx8mm-phycore-som.dtsi"
15 model = "PHYTEC phyBOARD-Polis-i.MX8MM RDK";
16 compatible = "phytec,imx8mm-phyboard-polis-rdk",
17 "phytec,imx8mm-phycore-som", "fsl,imx8mm";
20 stdout-path = &uart3;
[all …]
H A Dimx8mm-phygate-tauri-l.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/input/linux-event-codes.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/phy/phy-imx8-pcie.h>
11 #include "imx8mm-phycore-som.dtsi"
14 model = "PHYTEC phyGATE-Tauri-L-iMX8MM";
15 compatible = "phytec,imx8mm-phygate-tauri-l",
16 "phytec,imx8mm-phycore-som", "fsl,imx8mm";
19 stdout-path = &uart3;
[all …]
H A Dimx8mp-phyboard-pollux-rdk.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 #include <dt-bindings/leds/leds-pca9532.h>
11 #include <dt-bindings/pwm/pwm.h>
12 #include <dt-bindings/thermal/thermal.h>
13 #include "imx8mp-phycore-som.dtsi"
16 model = "PHYTEC phyBOARD-Pollux i.MX8MP";
17 compatible = "phytec,imx8mp-phyboard-pollux-rdk",
18 "phytec,imx8mp-phycore-som", "fsl,imx8mp";
[all …]
/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28-tx28.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
4 * Copyright 2013-2017 Lothar Waßmann <LW@KARO-electronics.de>
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 model = "Ka-Ro electronics TX28 module";
34 reg = <0x40000000 0>; /* will be filled in by U-Boot */
38 compatible = "w1-gpio";
43 reg_usb0_vbus: regulator-usb0-vbus {
44 compatible = "regulator-fixed";
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-tx6.dtsi2 * Copyright 2014-2017 Lothar Waßmann <LW@KARO-electronics.de>
4 * This file is dual-licensed: you can use it either under the terms
42 #include <dt-bindings/gpio/gpio.h>
43 #include <dt-bindings/input/input.h>
44 #include <dt-bindings/interrupt-controller/irq.h>
45 #include <dt-bindings/pwm/pwm.h>
46 #include <dt-bindings/sound/fsl-imx-audmux.h>
53 lcdif-23bit-pins-a = &pinctrl_disp0_1;
54 lcdif-24bit-pins-a = &pinctrl_disp0_2;
57 reg-can-xcvr = &reg_can_xcvr;
[all …]
/linux/include/linux/
H A Dpower_supply.h1 /* SPDX-License-Identifier: GPL-2.0-only */
233 /* Run-time specific power supply configuration */
390 * struct power_supply_maintenance_charge_table - setting for maintenace charging
423 * +-------------------------------------------------------------------> t
425 * Practically this means that the Li-ions are wandering back and forth in the
436 * +-------------------------------------------------------------------> t
447 * As an example, a Samsung EB425161LA Lithium-Ion battery is CC/CV charged
462 * the expected stand-by current. Also overvoltage protection will be applied
474 * struct power_supply_battery_info - information about batteries
486 * @tricklecharge_current_ua: the tricklecharge current used when trickle
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am642-phyboard-electra-rdk.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 * Copyright (C) 2021-2024 PHYTEC America, LLC - https://www.phytec.com
6 * Copyright (C) 2022-2024 PHYTEC Messtechnik GmbH
10 * https://www.phytec.com/product/phyboard-am64x
13 /dts-v1/;
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/input.h>
17 #include <dt-bindings/leds/common.h>
18 #include <dt-bindings/leds/leds-pca9532.h>
19 #include <dt-bindings/phy/phy.h>
[all …]

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