Searched full:trbe (Results 1 – 15 of 15) sorted by relevance
/linux/Documentation/trace/coresight/ |
H A D | coresight-trbe.rst | 4 Trace Buffer Extension (TRBE). 13 Trace Buffer Extension (TRBE) is a percpu hardware which captures in system 18 The TRBE is not compliant to CoreSight architecture specifications, but is 25 The TRBE devices appear on the existing coresight bus alongside the other 31 The ``trbe<N>`` named TRBEs are associated with a CPU.:: 37 * ``align``: TRBE write pointer alignment 38 * ``flag``: TRBE updates memory with access and dirty flags
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/linux/Documentation/devicetree/bindings/arm/ |
H A D | arm,trace-buffer-extension.yaml | 14 Arm Trace Buffer Extension (TRBE) is a per CPU component 22 const: trbe 31 TRBE is only supported on a subset of the CPUs, please consult 46 trbe {
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/linux/drivers/hwtracing/coresight/ |
H A D | coresight-trbe.h | 4 * Trace Buffer Extension (TRBE) driver in the coresight framework. 25 unsigned int trbe = cpuid_feature_extract_unsigned_field(aa64dfr0, in is_trbe_available() local 28 return trbe >= ID_AA64DFR0_EL1_TraceBuffer_IMP; in is_trbe_available()
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H A D | coresight-kunit-tests.c | 37 * a TRBE sink if one is registered. in test_default_sink()
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/linux/arch/arm64/ |
H A D | Kconfig | 870 bool "Cortex-A710/X2: 2119858: workaround TRBE overwriting trace data in FILL mode" 888 bool "Neoverse-N2: 2139208: workaround TRBE overwriting trace data in FILL mode" 942 bool "Neoverse-N2: 2253138: workaround TRBE writing to address out-of-range" 950 for TRBE. Under some conditions, the TRBE might generate a write to the next 951 virtually addressed page following the last page of the TRBE address space 955 page beyond the TRBLIMITR_EL1.LIMIT, within the space allowed for the TRBE. 960 bool "Cortex-A710/X2: 2224489: workaround TRBE writing to address out-of-range" 968 for TRBE. Under some conditions, the TRBE might generate a write to the next 969 virtually addressed page following the last page of the TRBE address space 973 page beyond the TRBLIMITR_EL1.LIMIT, within the space allowed for the TRBE. [all …]
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/linux/arch/arm64/kvm/hyp/nvhe/ |
H A D | debug-sr.c | 76 /* Unsupported with TRBE so disable */ in __trace_switch_to_guest()
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H A D | switch.c | 281 * above disabling of BRBE, SPE and TRBE. in __kvm_vcpu_run()
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/linux/arch/arm64/kernel/ |
H A D | hyp-stub.S | 115 // Use EL2 translations for SPE & TRBE and disable access from EL1
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H A D | cpu_errata.c | 773 * The erratum work around is handled within the TRBE
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/linux/include/linux/perf/ |
H A D | arm_pmu.h | 201 #define ARMV8_TRBE_PDEV_NAME "arm,trbe"
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/linux/arch/arm64/kvm/ |
H A D | debug.c | 97 /* Force disable trace in protected mode in case of no TRBE */ in kvm_init_host_debug_data()
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H A D | config.c | 300 * Revists this if KVM ever supports both MPAM and TRBE -- in feat_trbe_mpam()
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/linux/drivers/perf/ |
H A D | arm_pmu_acpi.c | 191 pr_warn("ACPI: TRBE: Unable to register device\n"); in arm_trbe_acpi_register_device()
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/linux/arch/arm64/boot/dts/arm/ |
H A D | fvp-base-revc.dts | 323 trbe {
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/linux/arch/arm64/include/asm/ |
H A D | el2_setup.h | 160 cbnz x0, .Lskip_trace_\@ // If TRBE is available at EL2
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