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/linux/tools/perf/pmu-events/arch/arm64/ampere/ampereonex/
H A Dcache.json179 "PublicDescription": "Level 1 prefetcher, table entry is trained",
182 "BriefDescription": "Level 1 prefetcher, table entry is trained"
/linux/include/linux/
H A Dntb.h115 * @NTB_SPEED_NONE: Link is not trained to any speed.
116 * @NTB_SPEED_GEN1: Link is trained to gen1 speed.
117 * @NTB_SPEED_GEN2: Link is trained to gen2 speed.
118 * @NTB_SPEED_GEN3: Link is trained to gen3 speed.
119 * @NTB_SPEED_GEN4: Link is trained to gen4 speed.
133 * @NTB_WIDTH_NONE: Link is not trained to any width.
134 * @NTB_WIDTH_1: Link is trained to 1 lane width.
135 * @NTB_WIDTH_2: Link is trained to 2 lane width.
136 * @NTB_WIDTH_4: Link is trained to 4 lane width.
137 * @NTB_WIDTH_8: Link is trained to 8 lane width.
[all …]
/linux/Documentation/admin-guide/blockdev/
H A Dzram.rst104 In addition, certain compression algorithms support pre-trained dictionaries,
106 compression algorithm to use external pre-trained dictionary, pass full
109 #pass path to pre-trained zstd dictionary
116 #pass path to pre-trained zstd dictionary and compression level
120 Parameters are algorithm specific: not all algorithms support pre-trained
/linux/tools/perf/pmu-events/arch/arm64/ampere/ampereone/
H A Dcore-imp-def.json489 "PublicDescription": "L1 prefetcher, table entry is trained",
492 "BriefDescription": "L1 prefetcher, table entry is trained"
/linux/drivers/gpu/drm/gma500/
H A Dpsb_intel_sdvo_regs.h151 * Reports which inputs are trained (managed to sync).
153 * Devices must have trained within 2 vsyncs of a mode change.
/linux/arch/mips/include/asm/octeon/
H A Dcvmx-spi.h229 * @timeout: Timeout to wait for link to be trained (in seconds)
/linux/drivers/net/wireless/ath/ath9k/
H A Dlink.c303 "PAPRD curve on chain %d needs to be re-trained\n", in ath_paprd_calibrate()
/linux/drivers/memory/tegra/
H A Dtegra210-emc.h812 u32 trained; member
H A Dtegra210-emc-cc-r21021.c306 * 5. Apply compensation w.r.t. trained values (if clock tree in tegra210_emc_r21021_periodic_compensation()
H A Dtegra210-emc-core.c1552 if (rate > 204000000 && !timing->trained) in tegra210_emc_set_rate()
/linux/drivers/pci/controller/dwc/
H A Dpcie-rcar-gen4.c150 * Since dw_pcie_setup_rc() sets it once, PCIe Gen2 will be trained. in rcar_gen4_pcie_start_link()
/linux/arch/mips/cavium-octeon/executive/
H A Dcvmx-spi.c503 * @timeout: Timeout to wait for link to be trained (in seconds)
/linux/lib/
H A Dgenalloc.c26 * Copyright 2005 (C) Jes Sorensen <jes@trained-monkey.org>
/linux/drivers/net/ethernet/alteon/
H A Dacenic.c6 * Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>.
400 MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
/linux/drivers/scsi/aic7xxx/
H A Daic79xx.seq1853 * after we have already trained for data-out, it is
/linux/drivers/net/ethernet/realtek/
H A D8139cp.c10 Copyright 1998-2001 by Jes Sorensen, <jes@trained-monkey.org>. [acenic.c]
/linux/drivers/pci/
H A Dpci.c4312 * Copyright 1998-2001 by Jes Sorensen, <jes@trained-monkey.org>.