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/freebsd/sys/contrib/device-tree/Bindings/ptp/
H A Dptp-qoriq.txt5 - compatible Should be "fsl,etsec-ptp" for eTSEC
6 Should be "fsl,fman-ptp-timer" for DPAA FMan
7 Should be "fsl,dpaa2-ptp" for DPAA2
8 Should be "fsl,enetc-ptp" for ENETC
9 - reg Offset and length of the register set for the device
10 - interrupts There should be at least two interrupts. Some devices
15 - fsl,cksel Timer reference clock source.
16 - fsl,tclk-period Timer reference clock period in nanoseconds.
17 - fsl,tmr-prsc Prescaler, divides the output clock.
18 - fsl,tmr-add Frequency compensation value.
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H A Dfsl,ptp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Li <Frank.Li@nxp.com>
15 - enum:
16 - fsl,etsec-ptp
17 - fsl,fman-ptp-timer
18 - fsl,dpaa2-ptp
19 - items:
20 - const: pci1957,ee02
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/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dbsc9131rdb.dtsi2 * BSC9131 RDB Device Tree Source stub (no addresses or top-level ranges)
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
38 #address-cells = <1>;
39 #size-cells = <1>;
40 compatible = "fsl,ifc-nand";
54 #address-cells = <1>;
55 #size-cells = <1>;
56 compatible = "spansion,s25sl12801", "jedec,spi-nor";
58 spi-max-frequency = <50000000>;
68 phy0: ethernet-phy@0 {
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H A Dbsc9132qds.dtsi2 * BSC9132 QDS Device Tree Source stub (no addresses or top-level ranges)
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
46 #address-cells = <1>;
47 #size-cells = <1>;
48 compatible = "fsl,ifc-nand";
56 #address-cells = <1>;
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H A Dp1022ds.dtsi2 * P1022 DS Device Tree Source stub (no addresses or top-level ranges)
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
46 label = "ramdisk-nor";
47 read-only;
52 label = "diagnostic-nor";
53 read-only;
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H A Dp1010rdb.dtsi2 * P1010 RDB Device Tree Source stub (no addresses or top-level ranges)
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
64 /* 512KB for u-boot Bootloader Image */
65 /* 512KB for u-boot Environment Variables */
67 label = "NOR U-Boot Image";
68 read-only;
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H A Dp2020rdb-pc.dtsi2 * P2020 RDB-PC Device Tree Source stub (no addresses or top-level ranges)
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
48 label = "NOR Vitesse-7385 Firmware";
49 read-only;
72 /* 512KB for u-boot Bootloader Image */
73 /* 512KB for u-boot Environment Variables */
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H A Dp2020rdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2009-2012 Freescale Semiconductor Inc.
8 /include/ "p2020si-pre.dtsi"
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
48 label = "NOR (RO) Vitesse-7385 Firmware";
49 read-only;
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H A Dp1021rdb-pc.dtsi2 * P1021 RDB Device Tree Source stub (no addresses or top-level ranges)
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
48 label = "NOR Vitesse-7385 Firmware";
49 read-only;
75 read-only;
80 /* 512KB for u-boot Bootloader Image */
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H A Dp1020rdb-pd.dts2 * P1020 RDB-PD Device Tree Source (32-bit address map)
35 /include/ "p1020si-pre.dtsi"
37 model = "fsl,P1020RDB-PD";
38 compatible = "fsl,P1020RDB-PD";
54 #address-cells = <1>;
55 #size-cells = <1>;
56 compatible = "cfi-flash";
58 bank-width = <2>;
59 device-width = <1>;
83 label = "NOR Vitesse-7385 Firmware";
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H A Dp2020ds.dtsi2 * P2020DS Device Tree Source stub (no addresses or top-level ranges)
4 * Copyright 2011-2012 Freescale Semiconductor Inc.
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
46 read-only;
51 read-only;
56 read-only;
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H A Dp1025twr.dtsi2 * P1025 TWR Device Tree Source stub (no addresses or top-level ranges)
44 #address-cells = <1>;
45 #size-cells = <1>;
46 compatible = "cfi-flash";
48 bank-width = <2>;
49 device-width = <1>;
55 label = "NOR Vitesse-7385 Firmware";
56 read-only;
82 read-only;
87 /* 512KB for u-boot Bootloader Image */
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H A Dmpc8572ds.dtsi2 * MPC8572DS Device Tree Source stub (no addresses or top-level ranges)
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
46 label = "ramdisk-nor";
51 label = "diagnostic-nor";
52 read-only;
57 label = "dink-nor";
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/freebsd/sys/netinet/
H A Dsctputil.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2001-2008, by Cisco Systems, Inc. All rights reserved.
5 * Copyright (c) 2008-2012, by Randall Stewart. All rights reserved.
6 * Copyright (c) 2008-2012, by Michael Tuexen. All rights reserved.
78 sctp_clog.x.sb.stcb_sbcc = stcb->asoc.sb_cc; in sctp_sblog()
82 SCTP_CTR6(KTR_SCTP, "SCTP:%d[%d]:%x-%x-%x-%x", in sctp_sblog()
99 sctp_clog.x.close.sctp_flags = inp->sctp_flags; in sctp_log_closing()
102 sctp_clog.x.close.state = (uint16_t)stcb->asoc.state; in sctp_log_closing()
108 SCTP_CTR6(KTR_SCTP, "SCTP:%d[%d]:%x-%x-%x-%x", in sctp_log_closing()
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H A Dsctp_structs.h1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2001-2008, by Cisco Systems, Inc. All rights reserved.
5 * Copyright (c) 2008-2012, by Randall Stewart. All rights reserved.
6 * Copyright (c) 2008-2012, by Michael Tuexen. All rights reserved.
87 * asoc_state, void-ptr-arg, uint32-arg, end_func, inp);
152 struct sctp_timer tmr; member
245 uint32_t cwnd_at_bw_set; /* Cwnd at last bw saved - lbw */
250 * 0/1 - 1 no cc advance */
290 /* This is used for SHUTDOWN/SHUTDOWN-ACK/SEND or INIT timers */
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H A Dtcp_var.h1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
73 * take and shift over by 1 minus the value (1-8).
135 #define SEGQ_EMPTY(tp) TAILQ_EMPTY(&(tp)->t_segq)
151 uint64_t end; /* End if not open-range req */
176 * - sendmap
177 * - timers
178 * - rack_times
202 * is unfilled. This may mean that a time is off by a micro-second
231 #define SNDMAP_TLP 0x000080/* segment sent as tail-loss-probe */
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/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dmpc8313erdb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 #address-cells = <1>;
14 #size-cells = <1>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <32>;
32 i-cache-line-size = <32>;
33 d-cache-size = <16384>;
34 i-cache-size = <16384>;
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H A Dturris1x.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/)
8 * and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/leds/common.h>
14 /include/ "fsl/p2020si-pre.dtsi"
41 gpio-controller@18 {
45 #gpio-cells = <2>;
46 gpio-controller;
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/freebsd/sys/contrib/device-tree/src/arm/nxp/ls/
H A Dls1021a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2013-2014 Freescale Semiconductor, Inc.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/thermal/thermal.h>
10 #address-cells = <2>;
11 #size-cells = <2>;
12 interrupt-parent = <&gic>;
30 #address-cells = <1>;
31 #size-cells = <0>;
34 compatible = "arm,cortex-a7";
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/freebsd/sys/dev/iicbus/rtc/
H A Dnxprtc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 * Driver for NXP real-time clock/calendar chips:
31 * - PCF8563 = low power, countdown timer
32 * - PCA8565 = like PCF8563, automotive temperature range
33 * - PCF8523 = low power, countdown timer, oscillator freq tuning, 2 timers
34 * - PCF2127 = like PCF8523, industrial, tcxo, tamper/ts, i2c & spi, 512B ram
35 * - PCA2129 = like PCF8523, automotive, tcxo, tamper/ts, i2c & spi, (note 1)
36 * - PCF2129 = like PCF8523, industrial, tcxo, tamper/ts, i2c & spi, (note 1)
100 * PCF2127-specific registers, bits, and masks.
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/freebsd/sys/contrib/openzfs/module/os/linux/spl/
H A Dspl-taskq.c2 * Copyright (C) 2007-2010 Lawrence Livermore National Security, LLC.
6 * UCRL-CODE-235197
98 #define TQSTAT_INC(tq, stat) wmsum_add(&tq->tq_sums.tqs_##stat, 1)
99 #define TQSTAT_DEC(tq, stat) wmsum_add(&tq->tq_sums.tqs_##stat, -1)
102 switch (t->tqent_flags & TQENT_LIST_MASK) { \
103 case TQENT_LIST_NONE: ASSERT(list_empty(&t->tqent_list)); break;\
113 t->tqent_flags = (t->tqent_flags & ~TQENT_LIST_MASK) | l;
131 "Allow non-default priority for taskq threads");
139 * Global system-wide dynamic task queue available for all consumers. This
140 * taskq is not intended for long-running tasks; instead, a dedicated taskq
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/freebsd/sys/dev/sfxge/common/
H A Defx_regs_mcdi.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright 2008-2013 Solarflare Communications Inc. All rights reserved.
32 /* Power-on reset state */
54 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
57 /* The rest of these are firmware-defined */
65 /* Values to be written to the per-port status dword in shared
94 * | | \--- Response
95 * | \------- Error
96 * \------------------------------ Resync (always set)
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