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Searched full:timer (Results 1 – 25 of 2014) sorted by relevance

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/freebsd/sys/dev/ichwd/
H A Dichwd.c32 * Intel ICH Watchdog Timer (WDT) driver
40 * presence of the watchdog timer from the fact that the machine has an
82 { DEVICEID_82801AA, "Intel 82801AA watchdog timer", 1, 1 },
83 { DEVICEID_82801AB, "Intel 82801AB watchdog timer", 1, 1 },
84 { DEVICEID_82801BA, "Intel 82801BA watchdog timer", 2, 1 },
85 { DEVICEID_82801BAM, "Intel 82801BAM watchdog timer", 2, 1 },
86 { DEVICEID_82801CA, "Intel 82801CA watchdog timer", 3, 1 },
87 { DEVICEID_82801CAM, "Intel 82801CAM watchdog timer", 3, 1 },
88 { DEVICEID_82801DB, "Intel 82801DB watchdog timer", 4, 1 },
89 { DEVICEID_82801DBM, "Intel 82801DBM watchdog timer", 4, 1 },
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/freebsd/contrib/kyua/utils/signals/
H A Dtimer.cpp29 #include "utils/signals/timer.hpp"
68 /// \param delta The time to the first activation of the programmed timer.
70 /// existing system timer.
83 throw signals::system_error("Failed to program system's interval timer", in safe_setitimer()
89 /// Deadline scheduler for all user timers on top of the unique system timer.
95 typedef std::set< signals::timer* > timers_set;
98 typedef std::vector< signals::timer* > timers_vector;
106 /// The original timer before any timer was programmed.
112 /// Time of the current activation of the timer.
118 /// Adds a timer to the _all_timers map.
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H A Dtimer_test.cpp29 #include "utils/signals/timer.hpp"
56 /// A timer that inserts an element into a vector on activation.
57 class delayed_inserter : public signals::timer {
64 /// Timer activation callback.
75 /// \param delta Time to the timer activation.
80 signals::timer(delta), _destination(destination), _item(item) in delayed_inserter()
97 wait_timers(const std::vector< signals::timer* >& timers) in wait_timers()
102 for (std::vector< signals::timer* >::const_iterator in wait_timers()
104 const signals::timer* timer = *iter; in wait_timers() local
105 if (timer->fired()) in wait_timers()
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/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Dti,timer-dm.yaml4 $id: http://devicetree.org/schemas/timer/ti,timer-dm.yaml#
7 title: TI dual-mode timer
13 The TI dual-mode timer is a general purpose timer with PWM capabilities.
20 - ti,am335x-timer
21 - ti,am335x-timer-1ms
22 - ti,am654-timer
23 - ti,dm814-timer
24 - ti,dm816-timer
25 - ti,omap2420-timer
26 - ti,omap3430-timer
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H A Dnvidia,tegra-timer.yaml4 $id: http://devicetree.org/schemas/timer/nvidia,tegra-timer.yaml#
7 title: NVIDIA Tegra timer
17 const: nvidia,tegra210-timer
25 A list of 14 interrupts; one per each timer channels 0 through 13
33 - nvidia,tegra114-timer
34 - nvidia,tegra124-timer
35 - nvidia,tegra132-timer
36 - const: nvidia,tegra30-timer
38 - const: nvidia,tegra30-timer
39 - const: nvidia,tegra20-timer
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H A Dmediatek,timer.yaml4 $id: http://devicetree.org/schemas/timer/mediatek,timer.yaml#
14 CPUX (ARM/ARM64 System Timer), GPT (General Purpose Timer)
15 and SYST (System Timer).
22 - mediatek,mt6577-timer
23 - mediatek,mt6765-timer
28 - mediatek,mt2701-timer
29 - mediatek,mt6580-timer
30 - mediatek,mt6582-timer
31 - mediatek,mt6589-timer
32 - mediatek,mt7623-timer
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H A Dti,timer.txt1 OMAP Timer bindings
5 OMAP44xx devices have timer instances that are 100%
8 So for OMAP44xx devices timer instances may use
11 ti,omap2420-timer (applicable to OMAP24xx devices)
12 ti,omap3430-timer (applicable to OMAP3xxx/44xx devices)
13 ti,omap4430-timer (applicable to OMAP44xx devices)
14 ti,omap5430-timer (applicable to OMAP543x devices)
15 ti,am335x-timer (applicable to AM335x devices)
16 ti,am335x-timer-1ms (applicable to AM335x devices)
18 - reg: Contains timer register address range (base address and
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H A Drockchip,rk-timer.txt1 Rockchip rk timer
5 "rockchip,rv1108-timer", "rockchip,rk3288-timer": for Rockchip RV1108
6 "rockchip,rk3036-timer", "rockchip,rk3288-timer": for Rockchip RK3036
7 "rockchip,rk3066-timer", "rockchip,rk3288-timer": for Rockchip RK3066
8 "rockchip,rk3188-timer", "rockchip,rk3288-timer": for Rockchip RK3188
9 "rockchip,rk3228-timer", "rockchip,rk3288-timer": for Rockchip RK3228
10 "rockchip,rk3229-timer", "rockchip,rk3288-timer": for Rockchip RK3229
11 "rockchip,rk3288-timer": for Rockchip RK3288
12 "rockchip,rk3368-timer", "rockchip,rk3288-timer": for Rockchip RK3368
13 "rockchip,rk3399-timer": for Rockchip RK3399
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H A Dmediatek,mtk-timer.txt5 - CPUX (ARM/ARM64 System Timer)
6 - GPT (General Purpose Timer)
7 - SYST (System Timer)
9 The proper timer will be selected automatically by driver.
14 * "mediatek,mt2701-timer" for MT2701 compatible timers (GPT)
15 * "mediatek,mt6580-timer" for MT6580 compatible timers (GPT)
16 * "mediatek,mt6582-timer" for MT6582 compatible timers (GPT)
17 * "mediatek,mt6589-timer" for MT6589 compatible timers (GPT)
18 * "mediatek,mt7623-timer" for MT7623 compatible timers (GPT)
19 * "mediatek,mt8127-timer" for MT8127 compatible timers (GPT)
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H A Drockchip,rk-timer.yaml4 $id: http://devicetree.org/schemas/timer/rockchip,rk-timer.yaml#
7 title: Rockchip Timer
15 - const: rockchip,rk3288-timer
16 - const: rockchip,rk3399-timer
19 - rockchip,rv1108-timer
20 - rockchip,rv1126-timer
21 - rockchip,rk3036-timer
22 - rockchip,rk3128-timer
23 - rockchip,rk3188-timer
24 - rockchip,rk3228-timer
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H A Darm,arch_timer.yaml4 $id: http://devicetree.org/schemas/timer/arm,arch_timer.yaml#
7 title: ARM architected timer
13 ARM cores may have a per-core architected timer, which provides per-cpu timers,
14 or a memory mapped architected timer, which provides up to 8 frames with a
15 physical and optional virtual timer per frame.
17 The per-core architected timer is attached to a GIC to deliver its
18 per-processor interrupts via PPIs. The memory mapped timer is attached to a GIC
25 - const: arm,cortex-a15-timer
26 - const: arm,armv7-timer
29 - arm,armv7-timer
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H A Dnvidia,tegra186-timer.yaml4 $id: http://devicetree.org/schemas/timer/nvidia,tegra186-timer.yaml#
7 title: NVIDIA Tegra186 timer
13 The Tegra timer provides 29-bit timer counters and a 32-bit timestamp
14 counter. Each NV timer selects its timing reference signal from the 1 MHz
22 - const: nvidia,tegra186-timer
24 The Tegra186 timer provides ten 29-bit timer counters.
25 - const: nvidia,tegra234-timer
27 The Tegra234 timer provides sixteen 29-bit timer counters.
39 const: nvidia,tegra186-timer
45 One per each timer channels 0 through 9.
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H A Dallwinner,sun4i-a10-timer.yaml4 $id: http://devicetree.org/schemas/timer/allwinner,sun4i-a10-timer.yaml#
7 title: Allwinner A10 Timer
17 - allwinner,sun4i-a10-timer
18 - allwinner,sun8i-a23-timer
19 - allwinner,sun8i-v3s-timer
20 - allwinner,suniv-f1c100s-timer
23 - allwinner,sun20i-d1-timer
24 - allwinner,sun50i-a64-timer
25 - allwinner,sun50i-h6-timer
26 - allwinner,sun50i-h616-timer
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H A Dsnps,dw-apb-timer.yaml4 $id: http://devicetree.org/schemas/timer/snps,dw-apb-timer.yaml#
7 title: Synopsys DesignWare APB Timer
15 - const: snps,dw-apb-timer
17 - snps,dw-apb-timer-sp
18 - snps,dw-apb-timer-osc
33 - description: Timer ticks reference clock source
39 - const: timer
62 timer@ffe00000 {
63 compatible = "snps,dw-apb-timer";
67 clock-names = "timer", "pclk";
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H A Dnuvoton,npcm7xx-timer.yaml4 $id: http://devicetree.org/schemas/timer/nuvoton,npcm7xx-timer.yaml#
7 title: Nuvoton NPCM7xx timer
16 - nuvoton,wpcm450-timer # for Hermon WPCM450
17 - nuvoton,npcm750-timer # for Poleg NPCM750
18 - nuvoton,npcm845-timer # for Arbel NPCM845
25 - description: The timer interrupt of timer 0
29 - description: The reference clock for timer 0
30 - description: The reference clock for timer 1
31 - description: The reference clock for timer 2
32 - description: The reference clock for timer 3
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/freebsd/sys/dev/isci/
H A Disci_timer.c41 struct ISCI_TIMER *timer = (struct ISCI_TIMER *)arg; in isci_timer_timeout() local
43 isci_log_message(3, "TIMER", "timeout %p\n", timer); in isci_timer_timeout()
45 /* callout_stop() will *not* keep the timer from running if it is in isci_timer_timeout()
49 * the timer routine should actually be run or not. in isci_timer_timeout()
51 if (timer->is_started == TRUE) in isci_timer_timeout()
52 timer->callback(timer->cookie); in isci_timer_timeout()
56 * @brief This callback method asks the user to start the supplied timer.
60 * removes the timer from it's list when a timer actually fires.
62 * calls from the SCI Framework to stop a timer that may already
66 * which this timer is to associated.
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/freebsd/contrib/ntp/libntp/lib/isc/include/isc/
H A Dtimer.h18 /* $Id: timer.h,v 1.43 2009/09/02 23:48:03 tbox Exp $ */
27 /*! \file isc/timer.h
44 * Timers can change type. It is typical to create a timer as
45 * an 'inactive' timer and then change it into a 'ticker' or
46 * 'once' timer.
51 * Clients of this module must not be holding a timer's task's lock when
52 * making a call that affects that timer. Failure to follow this rule
87 /*% Timer Type */
106 /*% Timer and timer manager methods */
120 void (*attach)(isc_timer_t *timer, isc_timer_t **timerp);
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/freebsd/contrib/ofed/opensm/include/complib/
H A Dcl_timer.h38 * Declaration of timer abstraction.
55 /****h* Component Library/Timer
57 * Timer
60 * The Timer provides the ability to schedule a function to be invoked at
63 * The timer callback function must not perform any blocking operations.
65 * The timer functions operate on a cl_timer_t structure which should be
82 /****d* Component Library: Timer/cl_pfn_timer_callback_t
88 * functions used to notify users of a timer expiration.
106 * Timer, cl_timer_init
110 * This include file defines the timer structure, and depends on the timer
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/freebsd/lib/libsys/
H A Dtimer_settime.252 system call stores the amount of time until the specified timer,
54 expires and the reload value of the timer into the space pointed to by the
60 before the timer expires, or zero if the timer is disarmed.
62 returned as the interval until timer expiration, even if the timer was armed
74 system call sets the time until the next expiration of the timer specified
81 argument and arms the timer if the
86 If the specified timer was already
95 is zero, the timer is disarmed.
96 If the timer is disarmed, then pending signal is removed.
109 the timer expires in
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/freebsd/contrib/llvm-project/llvm/include/llvm/Support/
H A DTimer.h1 //===-- llvm/Support/Timer.h - Interval Timing Support ----------*- C++ -*-===//
75 /// the Timer will print the amount of time it has captured to standard error
76 /// when the last timer is destroyed, otherwise it is printed when its
79 class Timer {
84 bool Running = false; ///< Is the timer currently running?
85 bool Triggered = false; ///< Has the timer ever been triggered?
86 TimerGroup *TG = nullptr; ///< The TimerGroup this Timer is in.
88 Timer **Prev = nullptr; ///< Pointer to \p Next of previous timer in group.
89 Timer *Next = nullptr; ///< Next timer in the group.
91 explicit Timer(StringRef TimerName, StringRef TimerDescription) { in Timer() function
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/freebsd/contrib/llvm-project/lld/COFF/
H A DCOFFLinkerContext.h20 #include "lld/Common/Timer.h"
65 Timer rootTimer;
66 Timer inputFileTimer;
67 Timer ltoTimer;
68 Timer gcTimer;
69 Timer icfTimer;
72 Timer codeLayoutTimer;
73 Timer outputCommitTimer;
74 Timer totalMapTimer;
75 Timer symbolGatherTimer;
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/freebsd/share/man/man9/
H A Deventtimers.9103 provide APIs for event timer drivers and consumers.
112 Unique name of the event timer for management purposes.
114 Set of flags, describing timer capabilities:
121 Timer is per-CPU.
123 Timer may stop in CPU sleep state.
125 Timer supports only 2^n divisors.
131 Timer oscillator's base frequency, if applicable and known.
138 Driver's timer start function pointer.
140 Driver's timer stop function pointer.
145 After the event timer functionality is registered, it is controlled via
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/freebsd/sys/amd64/vmm/io/
H A Dvhpet.c57 /* Timer N Configuration and Capabilities Register */
91 } timer[VHPET_NUM_TIMERS]; member
108 cap &= ~HPET_CAP_COUNT_SIZE; /* 32-bit timer */ in vhpet_capabilities()
128 if ((vhpet->timer[n].cap_config & msi_enable) == msi_enable) in vhpet_timer_msi_enabled()
138 * If the timer is configured to use MSI then treat it as if the in vhpet_timer_ioapic_pin()
139 * timer is not connected to the ioapic. in vhpet_timer_ioapic_pin()
144 return ((vhpet->timer[n].cap_config & HPET_TCNF_INT_ROUTE) >> 9); in vhpet_timer_ioapic_pin()
180 KASSERT(pin != 0, ("vhpet timer %d irq incorrectly routed", n)); in vhpet_timer_clear_isr()
190 return ((vhpet->timer[n].cap_config & HPET_TCNF_TYPE) != 0); in vhpet_periodic_timer()
197 return ((vhpet->timer[n].cap_config & HPET_TCNF_INT_ENB) != 0); in vhpet_timer_interrupt_enabled()
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/freebsd/sys/kern/
H A Dkern_clocksource.c57 int cpu_disable_c2_sleep = 0; /* Timer dies in C2. */
58 int cpu_disable_c3_sleep = 0; /* Timer dies in C3. */
75 if (timer->et_flags & ET_FLAGS_PERCPU) \
83 if (timer->et_flags & ET_FLAGS_PERCPU) \
89 static struct eventtimer *timer = NULL; variable
90 static sbintime_t timerperiod; /* Timer period for periodic mode. */
93 static sbintime_t nexttick; /* Next global timer tick time. */
97 static char timername[32]; /* Wanted timer. */
98 TUNABLE_STR("kern.eventtimer.timer", timername, sizeof(timername));
113 struct mtx et_hw_mtx; /* Per-CPU timer mutex. */
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/freebsd/sys/dev/pms/RefTisa/sallsdk/spc/
H A Dsatimer.c68 /* (1) Acquire timer list lock */ in saTimerTick()
75 /* (2.1) Find the first timer is timeout */ in saTimerTick()
78 /* (2.1.1) remove the timer from valid timer list */ in saTimerTick()
80 /* (2.1.2) Invalid timer */ in saTimerTick()
82 /* (2.1.3) Get timer event and param */ in saTimerTick()
85 /* (2.1.4) Release timer list lock */ in saTimerTick()
88 /* (2.1.5) Timer Callback */ in saTimerTick()
91 /* (2.1.6) Acquire timer list lock again */ in saTimerTick()
93 /* (2.1.7) return the timer to free timer list */ in saTimerTick()
96 /* (2.2) the first timer is not timeout */ in saTimerTick()
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