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Searched +full:timer +full:- +full:1 (Results 1 – 25 of 1113) sorted by relevance

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/linux/Documentation/devicetree/bindings/timer/
H A D	ti,timer-dm.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/timer/ti,timer-dm.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: TI dual-mode timer 10 - Tony Lindgren <tony@atomide.com> 13 The TI dual-mode timer is a general purpose timer with PWM capabilities. 18 - items: 19 - enum: 20 - ti,am335x-timer [all …]`
H A D	marvell,armada-370-timer.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/timer/marvell,armada-370-timer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Andrew Lunn <andrew@lunn.ch> 11 - Gregory Clement <gregory.clement@bootlin.com> 16 - items: 17 - const: marvell,armada-380-timer 18 - const: marvell,armada-xp-timer 19 - items: [all …]`
H A D	econet,en751221-timer.yaml	1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/timer/econet,en751221-timer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: EcoNet EN751221 High Precision Timer (HPT) 10 - Caleb James DeLisle <cjd@cjdns.fr> 13 The EcoNet High Precision Timer (HPT) is a timer peripheral found in various 14 EcoNet SoCs, including the EN751221 and EN751627 families. It provides per-VPE 15 count/compare registers and a per-CPU control register, with a single interrupt 16 line using a percpu-devid interrupt mechanism. [all …]
H A D	snps,dw-apb-timer.yaml	`1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/timer/snps,dw-apb-timer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Synopsys DesignWare APB Timer 10 - Daniel Lezcano <daniel.lezcano@linaro.org> 15 - const: snps,dw-apb-timer 16 - enum: 17 - snps,dw-apb-timer-sp 18 - snps,dw-apb-timer-osc [all …]`
H A D	faraday,fttmr010.yaml	`1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/timer/faraday,fttmr010.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Faraday FTTMR010 timer 10 - Joel Stanley <joel@jms.id.au> 11 - Linus Walleij <linusw@kernel.org> 14 This timer is a generic IP block from Faraday Technology, embedded in the 20 - items: 21 - const: moxa,moxart-timer [all …]`
/linux/tools/testing/selftests/kvm/arm64/
H A D	arch_timer_edge_cases.c	1 // SPDX-License-Identifier: GPL-2.0-only 3 * arch_timer_edge_cases.c - Tests the aarch64 timer IRQ functionality. 5 * The test validates some edge cases related to the arch-timer: 6 * - timers above the max TVAL value. 7 * - timer 54 enum arch_timer timer; global() member 140 set_counter(enum arch_timer timer,u64 counter) set_counter() argument 148 enum arch_timer timer; guest_irq_handler() local 181 set_cval_irq(enum arch_timer timer,u64 cval_cycles,u32 ctl) set_cval_irq() argument 190 set_tval_irq(enum arch_timer timer,u64 tval_cycles,u32 ctl) set_tval_irq() argument 199 set_xval_irq(enum arch_timer timer,u64 xval,u32 ctl,enum timer_view tv) set_xval_irq() argument 294 sleep_poll(enum arch_timer timer,u64 usec) sleep_poll() argument 299 sleep_sched_poll(enum arch_timer timer,u64 usec) sleep_sched_poll() argument 304 sleep_migrate(enum arch_timer timer,u64 usec) sleep_migrate() argument 309 sleep_in_userspace(enum arch_timer timer,u64 usec) sleep_in_userspace() argument 318 reset_timer_state(enum arch_timer timer,u64 cnt) reset_timer_state() argument 324 test_timer_xval(enum arch_timer timer,u64 xval,enum timer_view tv,irq_wait_method_t wm,bool reset_state,u64 reset_cnt) test_timer_xval() argument 351 test_timer_cval(enum arch_timer timer,u64 cval,irq_wait_method_t wm,bool reset_state,u64 reset_cnt) test_timer_cval() argument 358 test_timer_tval(enum arch_timer timer,s32 tval,irq_wait_method_t wm,bool reset_state,u64 reset_cnt) test_timer_tval() argument 366 test_xval_check_no_irq(enum arch_timer timer,u64 xval,u64 usec,enum timer_view timer_view,sleep_method_t guest_sleep) test_xval_check_no_irq() argument 382 test_cval_no_irq(enum arch_timer timer,u64 cval,u64 usec,sleep_method_t wm) test_cval_no_irq() argument 388 test_tval_no_irq(enum arch_timer timer,s32 tval,u64 usec,sleep_method_t wm) test_tval_no_irq() argument 396 test_timer_control_mask_then_unmask(enum arch_timer timer) test_timer_control_mask_then_unmask() argument 412 test_timer_control_masks(enum arch_timer timer) test_timer_control_masks() argument 427 test_fire_a_timer_multiple_times(enum arch_timer timer,irq_wait_method_t wm,int num) test_fire_a_timer_multiple_times() argument 452 test_timers_fired_multiple_times(enum arch_timer timer) test_timers_fired_multiple_times() argument 465 test_reprogramming_timer(enum arch_timer timer,irq_wait_method_t wm,s32 delta_1_ms,s32 delta_2_ms) test_reprogramming_timer() argument 488 test_reprogram_timers(enum arch_timer timer) test_reprogram_timers() argument 505 test_basic_functionality(enum arch_timer timer) test_basic_functionality() argument 523 timers_sanity_checks(enum arch_timer timer,bool use_sched) timers_sanity_checks() argument 583 test_timers_sanity_checks(enum arch_timer timer) test_timers_sanity_checks() argument 590 test_set_cnt_after_tval_max(enum arch_timer timer,irq_wait_method_t wm) test_set_cnt_after_tval_max() argument 609 test_timers_above_tval_max(enum arch_timer timer) test_timers_above_tval_max() argument 641 test_set_cnt_after_xval(enum arch_timer timer,u64 cnt_1,u64 xval,u64 cnt_2,irq_wait_method_t wm,enum timer_view tv) test_set_cnt_after_xval() argument 664 test_set_cnt_after_xval_no_irq(enum arch_timer timer,u64 cnt_1,u64 xval,u64 cnt_2,sleep_method_t guest_sleep,enum timer_view tv) test_set_cnt_after_xval_no_irq() argument 687 test_set_cnt_after_tval(enum arch_timer timer,u64 cnt_1,s32 tval,u64 cnt_2,irq_wait_method_t wm) test_set_cnt_after_tval() argument 694 test_set_cnt_after_cval(enum arch_timer timer,u64 cnt_1,u64 cval,u64 cnt_2,irq_wait_method_t wm) test_set_cnt_after_cval() argument 701 test_set_cnt_after_tval_no_irq(enum arch_timer timer,u64 cnt_1,s32 tval,u64 cnt_2,sleep_method_t wm) test_set_cnt_after_tval_no_irq() argument 709 test_set_cnt_after_cval_no_irq(enum arch_timer timer,u64 cnt_1,u64 cval,u64 cnt_2,sleep_method_t wm) test_set_cnt_after_cval_no_irq() argument 718 test_move_counters_ahead_of_timers(enum arch_timer timer) test_move_counters_ahead_of_timers() argument 741 test_move_counters_behind_timers(enum arch_timer timer) test_move_counters_behind_timers() argument 754 test_timers_in_the_past(enum arch_timer timer) test_timers_in_the_past() argument 790 test_long_timer_delays(enum arch_timer timer) test_long_timer_delays() argument 804 guest_run_iteration(enum arch_timer timer) guest_run_iteration() argument 822 guest_code(enum arch_timer timer) guest_code() argument 865 kvm_set_cntxct(struct kvm_vcpu * vcpu,u64 cnt,enum arch_timer timer) kvm_set_cntxct() argument 877 enum arch_timer timer = uc->args[3]; handle_sync() local 936 test_vm_create(struct kvm_vm vm,struct kvm_vcpu vcpu,enum arch_timer timer) test_vm_create() argument [all...]
/linux/arch/powerpc/sysdev/
H A D	fsl_gtm.c	`1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Freescale General-purpose Timers Module 7 * Jerry Huang <Chang-Ming.Huang@freescale.com> 26 #define GTCFR_STP(x) ((x) & 1 ? 1 << 5 : 1 << 1) 27 #define GTCFR_RST(x) ((x) & 1 ? 1 << 4 : 1 << 0) 29 #define GTMDR_ICLK_MASK (3 << 1) 30 #define GTMDR_ICLK_ICAS (0 << 1) 31 #define GTMDR_ICLK_ICLK (1 << 1) 32 #define GTMDR_ICLK_SLGO (2 << 1) 33 #define GTMDR_FRR (1 << 3) [all …]`
H A D	mpic_timer.c	`1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * MPIC timer driver 41 #define MAX_TICKS (~0U >> 1) 43 #define TIMER_OFFSET(num) (1 << (TIMERS_PER_GROUP - 1 - num)) 59 unsigned int timer_num; /* cascade control timer / 64 struct mpic_timer timer[TIMERS_PER_GROUP]; member 74 / cascade timer 0 and 1 / 76 / cascade timer 1 and 2 / 78 / cascade timer 2 and 3 / 87 time = (u64)div_u64(ticks, priv->timerfreq); in convert_ticks_to_time() [all …]`
/linux/sound/core/seq/oss/
H A D	seq_oss_timer.c	`1 // SPDX-License-Identifier: GPL-2.0-or-later 5 * Timer control routines 19 #define MIN_OSS_TIMEBASE 1 24 static void calc_alsa_tempo(struct seq_oss_timer timer); 29 create and register a new timer. 41 rec->dp = dp; in snd_seq_oss_timer_new() 42 rec->cur_tick = 0; in snd_seq_oss_timer_new() 43 rec->realtime = 0; in snd_seq_oss_timer_new() 44 rec->running = 0; in snd_seq_oss_timer_new() 45 rec->oss_tempo = 60; in snd_seq_oss_timer_new() [all …]`
/linux/sound/core/
H A D	timer.c	`1 // SPDX-License-Identifier: GPL-2.0-or-later 19 #include <sound/timer.h> 33 #define DEFAULT_TIMER_LIMIT 1 37 static int timer_tstamp_monotonic = 1; 39 MODULE_DESCRIPTION("ALSA timer interface"); 47 MODULE_ALIAS("devname:snd/timer"); 93 s32 tstamp_sec; /* Timestamp - last update / 105 s64 tstamp_sec; / Timestamp - last update / 116 / Internal data structure for keeping the state of the userspace-driven timer / 119 struct snd_timer timer; member [all …]`
H A D	pcm_timer.c	1 // SPDX-License-Identifier: GPL-2.0-or-later 11 #include <sound/timer.h> 16 * Timer functions 22 struct snd_pcm_runtime runtime = substream->runtime; in snd_pcm_timer_resolution_change() 25 rate = runtime->rate; in snd_pcm_timer_resolution_change() 31 fsize = runtime->period_siz in snd_pcm_timer_resolution_change() 52 snd_pcm_timer_resolution(struct snd_timer timer) snd_pcm_timer_resolution() argument 60 snd_pcm_timer_start(struct snd_timer * timer) snd_pcm_timer_start() argument 69 snd_pcm_timer_stop(struct snd_timer * timer) snd_pcm_timer_stop() argument 92 snd_pcm_timer_free(struct snd_timer * timer) snd_pcm_timer_free() argument 101 struct snd_timer *timer; snd_pcm_timer_init() local [all...]
/linux/drivers/clocksource/
H A D	timer-zevio.c	1 // SPDX-License-Identifier: GPL-2.0-only 3 * linux/drivers/clocksource/zevio-timer.c 33 #define CNTL_STOP_TIMER (1 << 4) 36 #define CNTL_INC (1 << 3) 40 #define CNTL_MATCH(x) ((x) + 1) 46 #define TIMER_INTR_MSK (1 << (TIMER_MATCH)) 64 struct zevio_timer timer = container_of(dev, struct zevio_timer, in zevio_timer_set_event() local 67 writel(delta, timer->timer1 + IO_CURRENT_VAL); in zevio_timer_set_event() 69 timer->timer1 + IO_CONTROL); in zevio_timer_set_event() 76 struct zevio_timer timer = container_of(dev, struct zevio_timer, in zevio_timer_shutdown() local [all …]
H A D	timer-microchip-pit64b.c	`1 // SPDX-License-Identifier: GPL-2.0 3 * 64-bit Periodic Interval Timer driver 38 #define MCHP_PIT64B_TLSBR 0x20 /* Timer LSB Register / 40 #define MCHP_PIT64B_TMSBR 0x24 / Timer MSB Register / 51 struct mchp_pit64b_timer - PIT64B timer data structure 65 * struct mchp_pit64b_clkevt - PIT64B clockevent data structure 66 * @timer: PIT64B timer 70 struct mchp_pit64b_timer timer; member 79 * struct mchp_pit64b_clksrc - PIT64B clocksource data structure 80 * @timer: PIT64B timer [all …]`
H A D	timer-rockchip.c	1 // SPDX-License-Identifier: GPL-2.0-only 3 * Rockchip timer support 29 #define TIMER_MODE_FREE_RUNNING (0 << 1) 30 #define TIMER_MODE_USER_DEFINED_COUNT (1 << 1) 31 #define TIMER_INT_UNMASK (1 << 2) 44 struct rk_timer timer; member 52 return &container_of(ce, struct rk_clkevt, ce)->timer; in rk_timer() 55 static inline void rk_timer_disable(struct rk_timer timer) in rk_timer_disable() argument 57 writel_relaxed(TIMER_DISABLE, timer->ctrl); in rk_timer_disable() 60 static inline void rk_timer_enable(struct rk_timer timer, u32 flags) in rk_timer_enable() argument [all …]
H A D	dw_apb_timer.c	1 // SPDX-License-Identifier: GPL-2.0-only 32 #define APBTMR_CONTROL_ENABLE (1 << 0) 33 /* 1: periodic, 0:free running. / 34 #define APBTMR_CONTROL_MODE_PERIODIC (1 << 1) 35 #define APBTMR_CONTROL_INT (1 << 2) 49 static inline u32 apbt_readl(struct dw_apb_timer timer, unsigned long offs) in apbt_readl() argument 51 return readl(timer->base + offs); in apbt_readl() 54 static inline void apbt_writel(struct dw_apb_timer timer, u32 val, in apbt_writel() argument 57 writel(val, timer->base + offs); in apbt_writel() 60 static inline u32 apbt_readl_relaxed(struct dw_apb_timer timer, unsigned long offs) in apbt_readl_relaxed() argument [all …]
H A D	timer-cadence-ttc.c	1 // SPDX-License-Identifier: GPL-2.0-only 3 * This file contains driver for the Cadence Triple Timer Counter Rev 06 5 * Copyright (C) 2011-2013 Xilinx 7 * based on arch/mips/kernel/time.c timer driver 23 * This driver configures the 2 16/32-bit count-up timers as follows: 25 * T1: Timer 1, clocksource for generic timekeeping 26 * T2: Timer 2, clockevent source for hrtimers 27 * T3: Timer 3, <unused> 29 * The input frequency to the timer module for emulation is 2.5MHz which is 30 * common to all the timer channels (T1, T2, and T3). With a pre-scaler of 32, [all …]
H A D	ingenic-timer.c	1 // SPDX-License-Identifier: GPL-2.0 14 #include <linux/mfd/ingenic-tcu.h> 23 #include <dt-bindings/clock/ingenic,tcu.h> 56 regmap_read(tcu->map, TCU_REG_TCNTc(tcu->cs_channel), &count); in ingenic_tcu_timer_read() 67 to_ingenic_tcu(struct ingenic_tcu_timer timer) in to_ingenic_tcu() argument 69 return container_of(timer, struct ingenic_tcu, timers[timer->cpu]); in to_ingenic_tcu() 80 struct ingenic_tcu_timer timer = to_ingenic_tcu_timer(evt); in ingenic_tcu_cevt_set_state_shutdown() local 81 struct ingenic_tcu tcu = to_ingenic_tcu(timer); in ingenic_tcu_cevt_set_state_shutdown() 83 regmap_write(tcu->map, TCU_REG_TECR, BIT(timer->channel)); in ingenic_tcu_cevt_set_state_shutdown() 91 struct ingenic_tcu_timer timer = to_ingenic_tcu_timer(evt); in ingenic_tcu_cevt_set_next() local [all …]
/linux/tools/testing/selftests/bpf/progs/
H A D	timer.c	1 // SPDX-License-Identifier: GPL-2.0 10 #define CLOCK_MONOTONIC 1 17 struct bpf_timer timer; 56 __uint(max_entries, 1); 75 #define ARRAY 1 in timer_cb1() 81 static int timer_cb1(void map, int key, struct bpf_timer timer) in timer_cb1() 84 Once via array timer callback and once via lru timer callbac in timer_cb1() 13 struct bpf_timer timer; global() member 73 timer_cb1(void * map,int * key,struct bpf_timer * timer) timer_cb1() argument 301 timer_cb3(void * map,int * key,struct bpf_timer * timer) timer_cb3() argument 321 struct bpf_timer timer; BPF_PROG2() local 338 timer_cb_pinned(void map,int * key,struct bpf_timer * timer) timer_cb_pinned() argument 353 struct bpf_timer timer; test_pinned_timer() local 396 race_timer_callback(void race_array,int * race_key,struct bpf_timer * timer) race_timer_callback() argument 405 struct bpf_timer *timer; race() local [all...]
H A D	timer_lockup.c	`1 // SPDX-License-Identifier: GPL-2.0 18 __uint(max_entries, 1); 25 __uint(max_entries, 1); 35 struct bpf_timer timer; in timer_cb1() local 38 timer = bpf_map_lookup_elem(&timer2_map, &key); in timer_cb1() 39 if (timer) in timer_cb1() 40 timer2_err = bpf_timer_cancel(timer); in timer_cb1() 47 struct bpf_timer timer; in timer_cb2() local 50 timer = bpf_map_lookup_elem(&timer1_map, &key); in timer_cb2() 51 if (timer) in timer_cb2() [all …]`
/linux/drivers/misc/
H A D	cs5535-mfgpt.c	1 // SPDX-License-Identifier: GPL-2.0-only 3 * Driver for the CS5535/CS5536 Multi-Function General Purpose Timers (MFGPT) 21 #define DRV_NAME "cs5535-mfgpt" 27 "(1 = reset the MFGPT using an undocumented bit, " 45 int cs5535_mfgpt_toggle_event(struct cs5535_mfgpt_timer timer, int cmp, in cs5535_mfgpt_toggle_event() argument 51 if (!timer) { in cs5535_mfgpt_toggle_event() 52 WARN_ON(1); in cs5535_mfgpt_toggle_event() 53 return -EIO; in cs5535_mfgpt_toggle_event() 57 The register maps for these are described in sections 6.17.1.x of in cs5535_mfgpt_toggle_event() 65 * a problem? -dilinger in cs5535_mfgpt_toggle_event() [all …]
/linux/include/linux/mfd/
H A D	rz-mtu3.h	1 /* SPDX-License-Identifier: GPL-2.0 / 12 / 8-bit shared register offsets macros / 13 #define RZ_MTU3_TSTRA 0x080 / Timer start register A / 14 #define RZ_MTU3_TSTRB 0x880 / Timer start register B / 16 / 16-bit shared register offset macros / 17 #define RZ_MTU3_TDDRA 0x016 / Timer dead time data register A / 18 #define RZ_MTU3_TDDRB 0x816 / Timer dead time data register B / 19 #define RZ_MTU3_TCDRA 0x014 / Timer cycle data register A / 20 #define RZ_MTU3_TCDRB 0x814 / Timer cycle data register B / 21 #define RZ_MTU3_TCBRA 0x022 / Timer cycle buffer register A */ [all …]
/linux/tools/testing/selftests/kvm/include/arm64/
H A D	arch_timer.h	1 /* SPDX-License-Identifier: GPL-2.0 / 3 ARM Generic Timer specific interface 16 #define CTL_ENABLE (1 << 0) 17 #define CTL_IMASK (1 << 1) 18 #define CTL_ISTATUS (1 << 2) 34 static inline u64 timer_get_cntct(enum arch_timer timer) in timer_get_cntct() argument 38 switch (timer) { in timer_get_cntct() 44 GUEST_FAIL("Unexpected timer type = %u", timer); in timer_get_cntct() 51 static inline void timer_set_cval(enum arch_timer timer, u64 cval) in timer_set_cval() argument 53 switch (timer) { in timer_set_cval() [all …]
/linux/Documentation/leds/
H A D	ledtrig-transient.rst	5 The leds timer trigger does not currently have an interface to activate 6 a one shot timer. The current support allows for setting two timers, one for 15 Without one shot timer interface, user space can still use timer trigger to 16 set a timer to hold a state, however when user space application crashes or 17 goes away without deactivating the timer, the hardware will be left in that 20 Transient trigger addresses the need for one shot timer activation. The 54 deactivation routine, will cancel any timer that is active before it cleans 56 non-transient state. When driver gets suspended, irrespective of the transient 71 - duration allows setting timer value in msecs. The initial value is 0. 72 - activate allows activating and deactivating the timer specified by [all …]
/linux/arch/nios2/kernel/
H A D	time.c	2 * Copyright (C) 2013-2014 Altera Corporation 22 #define ALTR_TIMER_COMPATIBLE "altr,timer-1.0" 42 struct nios2_timer timer; member 47 struct nios2_timer timer; member 63 static u16 timer_readw(struct nios2_timer timer, u32 offs) in timer_readw() argument 65 return readw(timer->base + offs); in timer_readw() 68 static void timer_writew(struct nios2_timer timer, u16 val, u32 offs) in timer_writew() argument 70 writew(val, timer->base + offs); in timer_writew() 73 static inline unsigned long read_timersnapshot(struct nios2_timer *timer) in read_timersnapshot() argument 77 timer_writew(timer, 0, ALTERA_TIMER_SNAPL_REG); in read_timersnapshot() [all …]
/linux/drivers/rtc/
H A D	interface.c	1 // SPDX-License-Identifier: GPL-2.0 20 static int rtc_timer_enqueue(struct rtc_device rtc, struct rtc_timer timer); 21 static void rtc_timer_remove(struct rtc_device rtc, struct rtc_timer timer); 27 if (!rtc->offset_secs) in rtc_add_offset() 38 if ((rtc->start_secs > rtc->range_min && secs >= rtc->start_secs) \|\| in rtc_add_offset() 39 (rtc->start_secs < rtc->range_min && in rtc_add_offset() 40 secs <= (rtc->start_secs + rtc->range_max - rtc->range_min))) in rtc_add_offset() 43 rtc_time64_to_tm(secs + rtc->offset_secs, tm); in rtc_add_offset() 50 if (!rtc->offset_secs) in rtc_subtract_offset() 61 if (secs >= rtc->range_min && secs <= rtc->range_max) in rtc_subtract_offset() [all …]

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