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/linux/Documentation/devicetree/bindings/timer/
H A Dti,timer-dm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/ti,timer-dm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI dual-mode timer
10 - Tony Lindgren <tony@atomide.com>
13 The TI dual-mode timer is a general purpose timer with PWM capabilities.
18 - items:
19 - enum:
20 - ti,am335x-timer
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H A Dnvidia,tegra-timer.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/timer/nvidia,tegra-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra timer
10 - Stephen Warren <swarren@nvidia.com>
13 - if:
17 const: nvidia,tegra210-timer
22 minItems: 1
25 A list of 14 interrupts; one per each timer channels 0 through 13
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H A Dmarvell,armada-370-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/marvell,armada-370-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Gregory Clement <gregory.clement@bootlin.com>
16 - items:
17 - const: marvell,armada-380-timer
18 - const: marvell,armada-xp-timer
19 - items:
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/linux/drivers/clocksource/
H A Dtimer-ti-dm.c1 // SPDX-License-Identifier: GPL-2.0+
3 * linux/arch/arm/plat-omap/dmtimer.c
5 * OMAP Dual-Mode Timers
7 * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
18 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
22 #include <linux/clk-provider.h>
31 #include <linux/platform_data/dmtimer-omap.h>
33 #include <clocksource/timer-ti-dm.h>
37 * timer errata flags
41 * timer counter register is never read. For more details please refer to
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H A Dtimer-zevio.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/drivers/clocksource/zevio-timer.c
33 #define CNTL_STOP_TIMER (1 << 4)
36 #define CNTL_INC (1 << 3)
40 #define CNTL_MATCH(x) ((x) + 1)
46 #define TIMER_INTR_MSK (1 << (TIMER_MATCH))
64 struct zevio_timer *timer = container_of(dev, struct zevio_timer, in zevio_timer_set_event() local
67 writel(delta, timer->timer1 + IO_CURRENT_VAL); in zevio_timer_set_event()
69 timer->timer1 + IO_CONTROL); in zevio_timer_set_event()
76 struct zevio_timer *timer = container_of(dev, struct zevio_timer, in zevio_timer_shutdown() local
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H A Dtimer-microchip-pit64b.c1 // SPDX-License-Identifier: GPL-2.0
3 * 64-bit Periodic Interval Timer driver
38 #define MCHP_PIT64B_TLSBR 0x20 /* Timer LSB Register */
40 #define MCHP_PIT64B_TMSBR 0x24 /* Timer MSB Register */
51 * struct mchp_pit64b_timer - PIT64B timer data structure
65 * struct mchp_pit64b_clkevt - PIT64B clockevent data structure
66 * @timer: PIT64B timer
70 struct mchp_pit64b_timer timer; member
79 * struct mchp_pit64b_clksrc - PIT64B clocksource data structure
80 * @timer: PIT64B timer
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H A Dtimer-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Rockchip timer support
29 #define TIMER_MODE_FREE_RUNNING (0 << 1)
30 #define TIMER_MODE_USER_DEFINED_COUNT (1 << 1)
31 #define TIMER_INT_UNMASK (1 << 2)
44 struct rk_timer timer; member
52 return &container_of(ce, struct rk_clkevt, ce)->timer; in rk_timer()
55 static inline void rk_timer_disable(struct rk_timer *timer) in rk_timer_disable() argument
57 writel_relaxed(TIMER_DISABLE, timer->ctrl); in rk_timer_disable()
60 static inline void rk_timer_enable(struct rk_timer *timer, u32 flags) in rk_timer_enable() argument
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H A Dtimer-cadence-ttc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * This file contains driver for the Cadence Triple Timer Counter Rev 06
5 * Copyright (C) 2011-2013 Xilinx
7 * based on arch/mips/kernel/time.c timer driver
23 * This driver configures the 2 16/32-bit count-up timers as follows:
25 * T1: Timer 1, clocksource for generic timekeeping
26 * T2: Timer 2, clockevent source for hrtimers
27 * T3: Timer 3, <unused>
29 * The input frequency to the timer module for emulation is 2.5MHz which is
30 * common to all the timer channels (T1, T2, and T3). With a pre-scaler of 32,
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H A Dingenic-timer.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/mfd/ingenic-tcu.h>
23 #include <dt-bindings/clock/ingenic,tcu.h>
56 regmap_read(tcu->map, TCU_REG_TCNTc(tcu->cs_channel), &count); in ingenic_tcu_timer_read()
67 to_ingenic_tcu(struct ingenic_tcu_timer *timer) in to_ingenic_tcu() argument
69 return container_of(timer, struct ingenic_tcu, timers[timer->cpu]); in to_ingenic_tcu()
80 struct ingenic_tcu_timer *timer = to_ingenic_tcu_timer(evt); in ingenic_tcu_cevt_set_state_shutdown() local
81 struct ingenic_tcu *tcu = to_ingenic_tcu(timer); in ingenic_tcu_cevt_set_state_shutdown()
83 regmap_write(tcu->map, TCU_REG_TECR, BIT(timer->channel)); in ingenic_tcu_cevt_set_state_shutdown()
91 struct ingenic_tcu_timer *timer = to_ingenic_tcu_timer(evt); in ingenic_tcu_cevt_set_next() local
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/linux/tools/testing/selftests/kvm/arm64/
H A Darch_timer_edge_cases.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch_timer_edge_cases.c - Tests the aarch64 timer IRQ functionality.
5 * The test validates some edge cases related to the arch-timer:
6 * - timers above the max TVAL value.
7 * - timers in the past
8 * - moving counters ahead and behind pending timers.
9 * - reprograming timers.
10 * - timers fired multiple times.
11 * - masking/unmasking using the timer control mask.
27 /* tval is a signed 32-bit int. */
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/linux/arch/s390/kernel/
H A Dvtime.c1 // SPDX-License-Identifier: GPL-2.0
3 * Virtual cpu timer based timer functions.
32 static DEFINE_PER_CPU(u64, mt_scaling_mult) = { 1 };
33 static DEFINE_PER_CPU(u64, mt_scaling_div) = { 1 };
39 u64 timer; in set_vtimer() local
42 " stpt %0\n" /* Store current cpu timer value */ in set_vtimer()
43 " spt %1" /* Set new value imm. afterwards */ in set_vtimer()
44 : "=Q" (timer) : "Q" (expires)); in set_vtimer()
45 lc->system_timer += lc->last_update_timer - timer; in set_vtimer()
46 lc->last_update_timer = expires; in set_vtimer()
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/linux/kernel/time/
H A Dtimer.c1 // SPDX-License-Identifier: GPL-2.0
7 * 1997-01-28 Modified by Finn Arne Gangstad to make timers scale better.
9 * 1997-09-10 Updated NTP code according to technical memorandum Jan '96
11 * 1998-12-24 Fixed a xtime SMP race (we need the xtime_lock rw spinlock to
14 * 1999-03-10 Improved NTP compatibility by Ulrich Windl
15 * 2002-05-31 Move sys_sysinfo here and make its locking sane, Robert Love
16 * 2000-10-05 Implemented scalable SMP per-CPU timer handling.
33 #include <linux/posix-timers.h>
54 #include "tick-internal.h"
58 #include <trace/events/timer.h>
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H A Dhrtimer.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright(C) 2005-2006, Thomas Gleixner <tglx@linutronix.de>
4 * Copyright(C) 2005-2007, Red Hat, Inc., Ingo Molnar
5 * Copyright(C) 2006-2007 Timesys Corp., Thomas Gleixner
7 * High-resolution kernel timers
9 * In contrast to the low-resolution timeout API, aka timer wheel,
16 * Based on the original timer wheel code
42 #include <linux/timer.h>
48 #include <trace/events/timer.h>
50 #include "tick-internal.h"
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H A Dposix-timers.c1 // SPDX-License-Identifier: GPL-2.0+
3 * 2002-10-15 Posix Clocks & timers
7 * 2004-06-01 Fix CLOCK_REALTIME clock/timer TIMER_ABSTIME bug.
20 #include <linux/posix-clock.h>
21 #include <linux/posix-timers.h>
31 #include "posix-timers.h"
35 * constructed from current::signal and the timer ID and the timer is
36 * matched against current::signal and the timer ID when walking the hash
39 * This allows checkpoint/restore to reconstruct the exact timer IDs for
73 __cond_lock(&__timr->it_lock, __timr = __lock_timer(tid)); \
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/linux/arch/powerpc/sysdev/
H A Dfsl_gtm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Freescale General-purpose Timers Module
7 * Jerry Huang <Chang-Ming.Huang@freescale.com>
26 #define GTCFR_STP(x) ((x) & 1 ? 1 << 5 : 1 << 1)
27 #define GTCFR_RST(x) ((x) & 1 ? 1 << 4 : 1 << 0)
29 #define GTMDR_ICLK_MASK (3 << 1)
30 #define GTMDR_ICLK_ICAS (0 << 1)
31 #define GTMDR_ICLK_ICLK (1 << 1)
32 #define GTMDR_ICLK_SLGO (2 << 1)
33 #define GTMDR_FRR (1 << 3)
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H A Dmpic_timer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MPIC timer driver
41 #define MAX_TICKS (~0U >> 1)
43 #define TIMER_OFFSET(num) (1 << (TIMERS_PER_GROUP - 1 - num))
59 unsigned int timer_num; /* cascade control timer */
64 struct mpic_timer timer[TIMERS_PER_GROUP]; member
74 /* cascade timer 0 and 1 */
76 /* cascade timer 1 and 2 */
78 /* cascade timer 2 and 3 */
87 *time = (u64)div_u64(ticks, priv->timerfreq); in convert_ticks_to_time()
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/linux/sound/core/
H A Dtimer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include <sound/timer.h>
33 #define DEFAULT_TIMER_LIMIT 1
37 static int timer_tstamp_monotonic = 1;
39 MODULE_DESCRIPTION("ALSA timer interface");
47 MODULE_ALIAS("devname:snd/timer");
93 s32 tstamp_sec; /* Timestamp - last update */
105 s64 tstamp_sec; /* Timestamp - last update */
116 /* Internal data structure for keeping the state of the userspace-driven timer */
119 struct snd_timer *timer; member
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H A Dpcm_timer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 #include <sound/timer.h>
16 * Timer functions
22 struct snd_pcm_runtime *runtime = substream->runtime; in snd_pcm_timer_resolution_change()
25 rate = runtime->rate; in snd_pcm_timer_resolution_change()
31 fsize = runtime->period_size; in snd_pcm_timer_resolution_change()
37 post = 1; in snd_pcm_timer_resolution_change()
43 pcm_err(substream->pcm, in snd_pcm_timer_resolution_change()
44 "pcm timer resolution out of range (rate = %u, period_size = %lu)\n", in snd_pcm_timer_resolution_change()
45 runtime->rate, runtime->period_size); in snd_pcm_timer_resolution_change()
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/linux/sound/core/seq/oss/
H A Dseq_oss_timer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Timer control routines
19 #define MIN_OSS_TIMEBASE 1
24 static void calc_alsa_tempo(struct seq_oss_timer *timer);
29 * create and register a new timer.
41 rec->dp = dp; in snd_seq_oss_timer_new()
42 rec->cur_tick = 0; in snd_seq_oss_timer_new()
43 rec->realtime = 0; in snd_seq_oss_timer_new()
44 rec->running = 0; in snd_seq_oss_timer_new()
45 rec->oss_tempo = 60; in snd_seq_oss_timer_new()
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/linux/sound/isa/gus/
H A Dgus_timer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Routines for Gravis UltraSound soundcards - Timers
14 * Timer 1 - 80us
17 static int snd_gf1_timer1_start(struct snd_timer * timer) in snd_gf1_timer1_start() argument
35 snd_gf1_timer1_stop(struct snd_timer * timer) snd_gf1_timer1_stop() argument
53 snd_gf1_timer2_start(struct snd_timer * timer) snd_gf1_timer2_start() argument
71 snd_gf1_timer2_stop(struct snd_timer * timer) snd_gf1_timer2_stop() argument
91 struct snd_timer *timer = gus->gf1.timer1; snd_gf1_interrupt_timer1() local
100 struct snd_timer *timer = gus->gf1.timer2; snd_gf1_interrupt_timer2() local
129 snd_gf1_timer1_free(struct snd_timer * timer) snd_gf1_timer1_free() argument
135 snd_gf1_timer2_free(struct snd_timer * timer) snd_gf1_timer2_free() argument
143 struct snd_timer *timer; snd_gf1_timers_init() local
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/linux/tools/testing/selftests/bpf/progs/
H A Dtimer.c1 // SPDX-License-Identifier: GPL-2.0
13 struct bpf_timer timer; member
52 __uint(max_entries, 1);
67 #define ARRAY 1
73 static int timer_cb1(void *map, int *key, struct bpf_timer *timer) in timer_cb1() argument
76 * Once via array timer callback and once via lru timer callback in timer_cb1()
80 /* *key == 0 - the callback was called for array timer. in timer_cb1()
81 * *key == 4 - the callback was called from lru timer. in timer_cb1()
87 /* rearm array timer to be called again in ~35 seconds */ in timer_cb1()
88 if (bpf_timer_start(timer, 1ull << 35, 0) != 0) in timer_cb1()
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/linux/arch/loongarch/kvm/
H A Dtimer.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020-2023 Loongson Technology Corporation Limited
11 * ktime_to_tick() - Scale ktime_t to timer tick value.
18 return div_u64(delta * vcpu->arch.timer_mhz, MNSEC_PER_SEC); in ktime_to_tick()
23 return div_u64(tick * MNSEC_PER_SEC, vcpu->arch.timer_mhz); in tick_to_ns()
27 enum hrtimer_restart kvm_swtimer_wakeup(struct hrtimer *timer) in kvm_swtimer_wakeup() argument
31 vcpu = container_of(timer, struct kvm_vcpu, arch.swtimer); in kvm_swtimer_wakeup()
33 rcuwait_wake_up(&vcpu->wait); in kvm_swtimer_wakeup()
39 * Initialise the timer to the specified frequency, zero it
43 vcpu->arch.timer_mhz = timer_hz >> 20; in kvm_init_timer()
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/linux/include/linux/mfd/
H A Drz-mtu3.h1 /* SPDX-License-Identifier: GPL-2.0 */
12 /* 8-bit shared register offsets macros */
13 #define RZ_MTU3_TSTRA 0x080 /* Timer start register A */
14 #define RZ_MTU3_TSTRB 0x880 /* Timer start register B */
16 /* 16-bit shared register offset macros */
17 #define RZ_MTU3_TDDRA 0x016 /* Timer dead time data register A */
18 #define RZ_MTU3_TDDRB 0x816 /* Timer dead time data register B */
19 #define RZ_MTU3_TCDRA 0x014 /* Timer cycle data register A */
20 #define RZ_MTU3_TCDRB 0x814 /* Timer cycle data register B */
21 #define RZ_MTU3_TCBRA 0x022 /* Timer cycle buffer register A */
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/linux/arch/arm/boot/dts/ti/omap/
H A Domap2.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/omap.h>
15 interrupt-parent = <&intc>;
16 #address-cells = <1>;
17 #size-cells = <1>;
29 #address-cells = <0>;
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/linux/drivers/rtc/
H A Drtc-brcmstb-waketimer.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2014-2023 Broadcom
48 static inline bool brcmstb_waketmr_is_pending(struct brcmstb_waketmr *timer) in brcmstb_waketmr_is_pending() argument
52 reg = readl_relaxed(timer->base + BRCMSTB_WKTMR_EVENT); in brcmstb_waketmr_is_pending()
56 static inline void brcmstb_waketmr_clear_alarm(struct brcmstb_waketmr *timer) in brcmstb_waketmr_clear_alarm() argument
60 if (timer->alarm_en && timer->alarm_irq) in brcmstb_waketmr_clear_alarm()
61 disable_irq(timer->alarm_irq); in brcmstb_waketmr_clear_alarm()
62 timer->alarm_en = false; in brcmstb_waketmr_clear_alarm()
63 reg = readl_relaxed(timer->base + BRCMSTB_WKTMR_COUNTER); in brcmstb_waketmr_clear_alarm()
64 writel_relaxed(reg - 1, timer->base + BRCMSTB_WKTMR_ALARM); in brcmstb_waketmr_clear_alarm()
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