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/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Dti,timer-dm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/ti,timer-dm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI dual-mode timer
10 - Tony Lindgren <tony@atomide.com>
13 The TI dual-mode timer is a general purpose timer with PWM capabilities.
18 - items:
19 - enum:
20 - ti,am335x-timer
[all …]
H A Dnvidia,tegra-timer.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/timer/nvidia,tegra-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra timer
10 - Stephen Warren <swarren@nvidia.com>
13 - if:
17 const: nvidia,tegra210-timer
22 minItems: 1
25 A list of 14 interrupts; one per each timer channels 0 through 13
[all …]
H A Dmediatek,timer.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/mediatek,timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Matthias Brugger <matthias.bgg@gmail.com>
14 CPUX (ARM/ARM64 System Timer), GPT (General Purpose Timer)
15 and SYST (System Timer).
20 - items:
21 - enum:
22 - mediatek,mt6577-timer
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H A Dmarvell,armada-370-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/marvell,armada-370-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Lunn <andrew@lunn.ch>
11 - Gregory Clement <gregory.clement@bootlin.com>
16 - items:
17 - const: marvell,armada-380-timer
18 - const: marvell,armada-xp-timer
19 - items:
[all …]
H A Darm,arch_timer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/arm,arch_timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM architected timer
10 - Marc Zyngier <marc.zyngier@arm.com>
11 - Mark Rutland <mark.rutland@arm.com>
13 ARM cores may have a per-core architected timer, which provides per-cpu timers,
14 or a memory mapped architected timer, which provides up to 8 frames with a
15 physical and optional virtual timer per frame.
[all …]
H A Dsnps,dw-apb-timer.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/timer/snps,dw-apb-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare APB Timer
10 - Daniel Lezcano <daniel.lezcano@linaro.org>
15 - const: snps,dw-apb-timer
16 - enum:
17 - snps,dw-apb-timer-sp
18 - snps,dw-apb-timer-osc
[all …]
H A Deconet,en751221-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/econet,en751221-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: EcoNet EN751221 High Precision Timer (HPT)
10 - Caleb James DeLisle <cjd@cjdns.fr>
13 The EcoNet High Precision Timer (HPT) is a timer peripheral found in various
14 EcoNet SoCs, including the EN751221 and EN751627 families. It provides per-VPE
15 count/compare registers and a per-CPU control register, with a single interrupt
16 line using a percpu-devid interrupt mechanism.
[all …]
H A Dnvidia,tegra186-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/nvidia,tegra186-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 timer
10 - Thierry Reding <treding@nvidia.com>
13 The Tegra timer provides 29-bit timer counters and a 32-bit timestamp
14 counter. Each NV timer selects its timing reference signal from the 1 MHz
16 programmed to generate one-shot, periodic, or watchdog interrupts.
22 - const: nvidia,tegra186-timer
[all …]
H A Dqcom,msm-timer.txt1 * MSM Timer
5 - compatible : Should at least contain "qcom,msm-timer". More specific
8 "qcom,kpss-timer" - krait subsystem
9 "qcom,scss-timer" - scorpion subsystem
11 - interrupts : Interrupts for the debug timer, the first general purpose
12 timer, and optionally a second general purpose timer, and
15 - reg : Specifies the base address of the timer registers.
17 - clocks: Reference to the parent clocks, one per output clock. The parents
20 - clock-names: The name of the clocks as free-form strings. They should be in
23 - clock-frequency : The frequency of the debug timer and the general purpose
[all …]
H A Drockchip,rk-timer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/rockchip,rk-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Timer
10 - Daniel Lezcano <daniel.lezcano@linaro.org>
15 - const: rockchip,rk3288-timer
16 - const: rockchip,rk3399-timer
17 - items:
18 - enum:
[all …]
H A Dallwinner,sun4i-a10-timer.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/allwinner,sun4i-a10-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Timer
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - enum:
17 - allwinner,sun4i-a10-timer
18 - allwinner,sun8i-a23-timer
[all …]
H A Dbrcm,bcm2835-system-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/brcm,bcm2835-system-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: BCM2835 System Timer
10 - Stefan Wahren <wahrenst@gmx.net>
11 - Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
14 The System Timer peripheral provides four 32-bit timer channels and a
15 single 64-bit free running counter. Each channel has an output compare
21 const: brcm,bcm2835-system-timer
[all …]
H A Dnuvoton,npcm7xx-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/nuvoton,npcm7xx-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton NPCM7xx timer
10 - Jonathan Neuschäfer <j.neuschaefer@gmx.net>
11 - Tomer Maimon <tmaimon77@gmail.com>
16 - nuvoton,wpcm450-timer # for Hermon WPCM450
17 - nuvoton,npcm750-timer # for Poleg NPCM750
18 - nuvoton,npcm845-timer # for Arbel NPCM845
[all …]
H A Dsamsung,exynos4210-mct.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/samsung,exynos4210-mct.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung Exynos SoC Multi Core Timer (MCT)
10 - Krzysztof Kozlowski <krzk@kernel.org>
13 The Samsung's Multi Core Timer (MCT) module includes two main blocks, the
14 global timer and CPU local timers. The global timer is a 64-bit free running
15 up-counter and can generate 4 interrupts when the counter reaches one of the
16 four preset counter values. The CPU local timers are 32-bit free running
[all …]
H A Dcnxt,cx92755-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/cnxt,cx92755-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Conexant Digicolor SoCs Timer Controller
10 - Baruch Siach <baruch@tkos.co.il>
14 const: cnxt,cx92755-timer
17 maxItems: 1
20 description: Contains 8 interrupts, one for each timer
22 - description: interrupt for timer 0
[all …]
/freebsd/sys/dev/ichwd/
H A Dichwd.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
12 * 1. Redistributions of source code must retain the above copyright
32 * Intel ICH Watchdog Timer (WDT) driver
40 * presence of the watchdog timer from the fact that the machine has an
45 * There is one slight problem on non-ACPI or ACPI 1.x systems: we have no
52 * For details about the ICH WDT, see Intel Application Note AP-725
53 * (document no. 292273-001). The WDT is also described in the individual
55 * (document no. 252516-001) sections 9.10 and 9.11.
58 * SoC PMC support by Denir Li <denir.li@cas-well.com>
[all …]
/freebsd/contrib/kyua/utils/signals/
H A Dtimer_test.cpp29 #include "utils/signals/timer.hpp"
40 #include <atf-c++.hpp>
56 /// A timer that inserts an element into a vector on activation.
57 class delayed_inserter : public signals::timer {
64 /// Timer activation callback.
75 /// \param delta Time to the timer activation.
80 signals::timer(delta), _destination(destination), _item(item) in delayed_inserter()
97 wait_timers(const std::vector< signals::timer* >& timers) in wait_timers()
102 for (std::vector< signals::timer* >::const_iterator in wait_timers()
104 const signals::timer* timer = *iter; in wait_timers() local
[all …]
H A Dtimer.cpp29 #include "utils/signals/timer.hpp"
64 /// Calls setitimer(2) with exception-based error reporting.
68 /// \param delta The time to the first activation of the programmed timer.
70 /// existing system timer.
81 if (::setitimer(ITIMER_REAL, &timeval, old_timeval) == -1) { in safe_setitimer()
83 throw signals::system_error("Failed to program system's interval timer", in safe_setitimer()
89 /// Deadline scheduler for all user timers on top of the unique system timer.
95 typedef std::set< signals::timer* > timers_set;
98 typedef std::vector< signals::timer* > timers_vector;
103 /// sequentially to find either expired or expiring-now timers.
[all …]
/freebsd/sys/kern/
H A Dkern_clocksource.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2010-2013 Alexander Motin <mav@FreeBSD.org>
10 * 1. Redistributions of source code must retain the above copyright
57 int cpu_disable_c2_sleep = 0; /* Timer dies in C2. */
58 int cpu_disable_c3_sleep = 0; /* Timer dies in C3. */
75 if (timer->et_flags & ET_FLAGS_PERCPU) \
76 mtx_lock_spin(&(state)->et_hw_mtx); \
83 if (timer->et_flags & ET_FLAGS_PERCPU) \
84 mtx_unlock_spin(&(state)->et_hw_mtx); \
[all …]
/freebsd/sys/contrib/device-tree/Bindings/soc/microchip/
H A Datmel,at91rm9200-tcb.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Atmel Timer Counter Block
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 The Atmel (now Microchip) SoCs have timers named Timer Counter Block. Each
14 timer has three channels with two counters each.
19 - items:
20 - enum:
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap2.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/omap.h>
15 interrupt-parent = <&intc>;
16 #address-cells = <1>;
17 #size-cells = <1>;
29 #address-cells = <0>;
[all …]
/freebsd/sys/amd64/vmm/io/
H A Dvhpet.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
11 * 1. Redistributions of source code must retain the above copyright
57 /* Timer N Configuration and Capabilities Register */
91 } timer[VHPET_NUM_TIMERS]; member
94 #define VHPET_LOCK(vhp) mtx_lock(&((vhp)->mtx))
95 #define VHPET_UNLOCK(vhp) mtx_unlock(&((vhp)->mtx))
106 cap |= (VHPET_NUM_TIMERS - 1) << 8; /* number of timers */ in vhpet_capabilities()
107 cap |= 1; /* revision */ in vhpet_capabilities()
108 cap &= ~HPET_CAP_COUNT_SIZE; /* 32-bit timer */ in vhpet_capabilities()
[all …]
/freebsd/sys/dev/pms/RefTisa/sallsdk/spc/
H A Dsatimer.c2 *Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved.
6 *1. Redistributions of source code must retain the above copyright notice, this list of conditions …
50 * \return -void-
57 agsaLLRoot_t *saRoot = (agsaLLRoot_t *)(agRoot->sdkData); in saTimerTick()
68 /* (1) Acquire timer list lock */ in saTimerTick()
72 pTimer = (agsaTimerDesc_t *) saLlistGetHead(&(saRoot->validTimers)); in saTimerTick()
75 /* (2.1) Find the first timer is timeout */ in saTimerTick()
76 if ( pTimer->timeoutTick == saRoot->timeTick ) in saTimerTick()
78 /* (2.1.1) remove the timer from valid timer list */ in saTimerTick()
79 saLlistRemove(&(saRoot->validTimers), &(pTimer->linkNode)); in saTimerTick()
[all …]
/freebsd/contrib/ntp/scripts/deprecated/
H A Dfreq_adj.in1 #! @PATH_PERL@ -w
10 #chop($ncpu = `sysctl -n hw.ncpu`);
11 #die "Found $ncpu CPUs; can only be run on systems with 1 CPU.\n" if ($ncpu > 1);
16 chop($timer = `sysctl -n kern.timecounter.hardware 2> /dev/null`);
18 $timer =~ tr/\U/\L/;
20 if ($timer eq '') {
25 $timer = $1;
32 $opt_t = $timer if !defined($opt_t);
34 if ($timer ne '') { # $timer found...
35 if ($opt_t ne '') { # - and $opt_t found
[all …]
/freebsd/lib/libsys/
H A Dtimer_settime.27 .\" 1. Redistributions of source code must retain the above copyright
35 .Nd "per-process timers (REALTIME)"
52 system call stores the amount of time until the specified timer,
54 expires and the reload value of the timer into the space pointed to by the
60 before the timer expires, or zero if the timer is disarmed.
62 returned as the interval until timer expiration, even if the timer was armed
74 system call sets the time until the next expiration of the timer specified
81 argument and arms the timer if the
85 is non-zero.
86 If the specified timer was already
[all …]

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