| /freebsd/sys/dev/ichwd/ |
| H A D | ichwd.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
32 * Intel ICH Watchdog Timer (WDT) driver
40 * presence of the watchdog timer from the fact that the machine has an
45 * There is one slight problem on non-ACPI or ACPI 1.x systems: we have no
52 * For details about the ICH WDT, see Intel Application Note AP-725
53 * (document no. 292273-001). The WDT is also described in the individual
55 * (document no. 252516-001) sections 9.10 and 9.11.
58 * SoC PMC support by Denir Li <denir.li@cas-well.com>
82 { DEVICEID_82801AA, "Intel 82801AA watchdog timer", 1, 1 },
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| /freebsd/sys/contrib/device-tree/Bindings/timer/ |
| H A D | ti,timer-dm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/ti,timer-dm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI dual-mode timer
10 - Tony Lindgren <tony@atomide.com>
13 The TI dual-mode timer is a general purpose timer with PWM capabilities.
18 - items:
19 - enum:
20 - ti,am335x-timer
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| H A D | nvidia,tegra-timer.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/timer/nvidia,tegra-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra timer
10 - Stephen Warren <swarren@nvidia.com>
13 - if:
17 const: nvidia,tegra210-timer
25 A list of 14 interrupts; one per each timer channels 0 through 13
27 - if:
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| H A D | ti,timer.txt | 1 OMAP Timer bindings
4 - compatible: Should be set to one of the below. Please note that
5 OMAP44xx devices have timer instances that are 100%
8 So for OMAP44xx devices timer instances may use
11 ti,omap2420-timer (applicable to OMAP24xx devices)
12 ti,omap3430-timer (applicable to OMAP3xxx/44xx devices)
13 ti,omap4430-timer (applicable to OMAP44xx devices)
14 ti,omap5430-timer (applicable to OMAP543x devices)
15 ti,am335x-timer (applicable to AM335x devices)
16 ti,am335x-timer-1ms (applicable to AM335x devices)
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| H A D | rockchip,rk-timer.txt | 1 Rockchip rk timer
4 - compatible: should be:
5 "rockchip,rv1108-timer", "rockchip,rk3288-timer": for Rockchip RV1108
6 "rockchip,rk3036-timer", "rockchip,rk3288-timer": for Rockchip RK3036
7 "rockchip,rk3066-timer", "rockchip,rk3288-timer": for Rockchip RK3066
8 "rockchip,rk3188-timer", "rockchip,rk3288-timer": for Rockchip RK3188
9 "rockchip,rk3228-timer", "rockchip,rk3288-timer": for Rockchip RK3228
10 "rockchip,rk3229-timer", "rockchip,rk3288-timer": for Rockchip RK3229
11 "rockchip,rk3288-timer": for Rockchip RK3288
12 "rockchip,rk3368-timer", "rockchip,rk3288-timer": for Rockchip RK3368
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| H A D | mediatek,mtk-timer.txt | 2 ---------------
5 - CPUX (ARM/ARM64 System Timer)
6 - GPT (General Purpose Timer)
7 - SYST (System Timer)
9 The proper timer will be selected automatically by driver.
12 - compatible should contain:
14 * "mediatek,mt2701-timer" for MT2701 compatible timers (GPT)
15 * "mediatek,mt6580-timer" for MT6580 compatible timers (GPT)
16 * "mediatek,mt6582-timer" for MT6582 compatible timers (GPT)
17 * "mediatek,mt6589-timer" for MT6589 compatible timers (GPT)
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| H A D | rockchip,rk-timer.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/rockchip,rk-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip Timer
10 - Daniel Lezcano <daniel.lezcano@linaro.org>
15 - const: rockchip,rk3288-timer
16 - const: rockchip,rk3399-timer
17 - items:
18 - enum:
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| H A D | arm,arch_timer.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/arm,arch_timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM architected timer
10 - Marc Zyngier <marc.zyngier@arm.com>
11 - Mark Rutland <mark.rutland@arm.com>
13 ARM cores may have a per-core architected timer, which provides per-cpu timers,
14 or a memory mapped architected timer, which provides up to 8 frames with a
15 physical and optional virtual timer per frame.
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| H A D | allwinner,sun4i-a10-timer.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/allwinner,sun4i-a10-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 Timer
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
16 - enum:
17 - allwinner,sun4i-a10-timer
18 - allwinner,sun8i-a23-timer
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| H A D | nvidia,tegra186-timer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/nvidia,tegra186-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 timer
10 - Thierry Reding <treding@nvidia.com>
13 The Tegra timer provides 29-bit timer counters and a 32-bit timestamp
14 counter. Each NV timer selects its timing reference signal from the 1 MHz
16 programmed to generate one-shot, periodic, or watchdog interrupts.
22 - const: nvidia,tegra186-timer
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| H A D | snps,dw-apb-timer.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/timer/snps,dw-apb-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare APB Timer
10 - Daniel Lezcano <daniel.lezcano@linaro.org>
15 - const: snps,dw-apb-timer
16 - enum:
17 - snps,dw-apb-timer-sp
18 - snps,dw-apb-timer-osc
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| H A D | nuvoton,npcm7xx-timer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/nuvoton,npcm7xx-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton NPCM7xx timer
10 - Jonathan Neuschäfer <j.neuschaefer@gmx.net>
11 - Tomer Maimon <tmaimon77@gmail.com>
16 - nuvoton,wpcm450-timer # for Hermon WPCM450
17 - nuvoton,npcm750-timer # for Poleg NPCM750
18 - nuvoton,npcm845-timer # for Arbel NPCM845
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| /freebsd/contrib/kyua/utils/signals/ |
| H A D | timer.cpp | 29 #include "utils/signals/timer.hpp"
64 /// Calls setitimer(2) with exception-based error reporting.
68 /// \param delta The time to the first activation of the programmed timer.
70 /// existing system timer.
81 if (::setitimer(ITIMER_REAL, &timeval, old_timeval) == -1) { in safe_setitimer()
83 throw signals::system_error("Failed to program system's interval timer", in safe_setitimer()
89 /// Deadline scheduler for all user timers on top of the unique system timer.
95 typedef std::set< signals::timer* > timers_set;
98 typedef std::vector< signals::timer* > timers_vector;
103 /// sequentially to find either expired or expiring-now timers.
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| H A D | timer_test.cpp | 29 #include "utils/signals/timer.hpp"
40 #include <atf-c++.hpp>
56 /// A timer that inserts an element into a vector on activation.
57 class delayed_inserter : public signals::timer {
64 /// Timer activation callback.
75 /// \param delta Time to the timer activation.
80 signals::timer(delta), _destination(destination), _item(item) in delayed_inserter()
97 wait_timers(const std::vector< signals::timer* >& timers) in wait_timers()
102 for (std::vector< signals::timer* >::const_iterator in wait_timers()
104 const signals::timer* timer = *iter; in wait_timers() local
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| /freebsd/sys/dev/isci/ |
| H A D | isci_timer.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
6 * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
41 struct ISCI_TIMER *timer = (struct ISCI_TIMER *)arg; in isci_timer_timeout() local
43 isci_log_message(3, "TIMER", "timeout %p\n", timer); in isci_timer_timeout()
45 /* callout_stop() will *not* keep the timer from running if it is in isci_timer_timeout()
49 * the timer routine should actually be run or not. in isci_timer_timeout()
51 if (timer->is_started == TRUE) in isci_timer_timeout()
52 timer->callback(timer->cookie); in isci_timer_timeout()
56 * @brief This callback method asks the user to start the supplied timer.
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| /freebsd/contrib/ntp/libntp/lib/isc/include/isc/ |
| H A D | timer.h | 2 * Copyright (C) 2004-2009 Internet Systems Consortium, Inc. ("ISC")
3 * Copyright (C) 1998-2002 Internet Software Consortium.
18 /* $Id: timer.h,v 1.43 2009/09/02 23:48:03 tbox Exp $ */
27 /*! \file isc/timer.h
37 * 'one-shot' timers.
44 * Timers can change type. It is typical to create a timer as
45 * an 'inactive' timer and then change it into a 'ticker' or
46 * 'once' timer.
51 * Clients of this module must not be holding a timer's task's lock when
52 * making a call that affects that timer. Failure to follow this rule
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| /freebsd/lib/libsys/ |
| H A D | timer_settime.2 | 35 .Nd "per-process timers (REALTIME)"
52 system call stores the amount of time until the specified timer,
54 expires and the reload value of the timer into the space pointed to by the
60 before the timer expires, or zero if the timer is disarmed.
62 returned as the interval until timer expiration, even if the timer was armed
74 system call sets the time until the next expiration of the timer specified
81 argument and arms the timer if the
85 is non-zero.
86 If the specified timer was already
95 is zero, the timer is disarmed.
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Support/ |
| H A D | Timer.h | 1 //===-- llvm/Support/Timer.h - Interval Timing Support ----------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
59 void operator-=(const TimeRecord &RHS) {
60 WallTime -= RHS.WallTime;
61 UserTime -= RHS.UserTime;
62 SystemTime -= RHS.SystemTime;
63 MemUsed -= RHS.MemUsed;
64 InstructionsExecuted -= RHS.InstructionsExecuted;
75 /// the Timer will print the amount of time it has captured to standard error
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| /freebsd/contrib/llvm-project/lld/COFF/ |
| H A D | COFFLinkerContext.h | 1 //===- COFFLinkerContext.h --------------------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
20 #include "lld/Common/Timer.h"
55 return c->osidx == 0 ? nullptr : outputSections[c->osidx - 1]; in getOutputSection()
65 Timer rootTimer;
66 Timer inputFileTimer;
67 Timer ltoTimer;
68 Timer gcTimer;
69 Timer icfTimer;
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| /freebsd/contrib/ofed/opensm/include/complib/ |
| H A D | cl_timer.h | 3 * Copyright (c) 2002-2005 Mellanox Technologies LTD. All rights reserved.
4 * Copyright (c) 1996-2003 Intel Corporation. All rights reserved.
16 * - Redistributions of source code must retain the above
20 * - Redistributions in binary form must reproduce the above
38 * Declaration of timer abstraction.
55 /****h* Component Library/Timer
57 * Timer
60 * The Timer provides the ability to schedule a function to be invoked at
63 * The timer callback function must not perform any blocking operations.
65 * The timer functions operate on a cl_timer_t structure which should be
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| /freebsd/share/man/man9/ |
| H A D | eventtimers.9 | 2 .\" Copyright (c) 2011-2013 Alexander Motin <mav@FreeBSD.org>
33 .Bd -literal
87 or periodically, to run different time-based events.
89 .Bl -tag -width "Consumers"
103 provide APIs for event timer drivers and consumers.
110 .Bl -tag -width Va
112 Unique name of the event timer for management purposes.
114 Set of flags, describing timer capabilities:
115 .Bl -tag -width "ET_FLAGS_PERIODIC" -compact
119 One-shot mode supported.
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| /freebsd/sys/amd64/vmm/io/ |
| H A D | vhpet.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
57 /* Timer N Configuration and Capabilities Register */
91 } timer[VHPET_NUM_TIMERS]; member
94 #define VHPET_LOCK(vhp) mtx_lock(&((vhp)->mtx))
95 #define VHPET_UNLOCK(vhp) mtx_unlock(&((vhp)->mtx))
106 cap |= (VHPET_NUM_TIMERS - 1) << 8; /* number of timers */ in vhpet_capabilities()
108 cap &= ~HPET_CAP_COUNT_SIZE; /* 32-bit timer */ in vhpet_capabilities()
120 return ((vhpet->config & HPET_CNF_ENABLE) ? true : false); in vhpet_counter_enabled()
128 if ((vhpet->timer[n].cap_config & msi_enable) == msi_enable) in vhpet_timer_msi_enabled()
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| /freebsd/sys/dev/pms/RefTisa/sallsdk/spc/ |
| H A D | satimer.c | 2 *Copyright (c) 2014 PMC-Sierra, Inc. All rights reserved.
50 * \return -void-
57 agsaLLRoot_t *saRoot = (agsaLLRoot_t *)(agRoot->sdkData); in saTimerTick()
68 /* (1) Acquire timer list lock */ in saTimerTick()
72 pTimer = (agsaTimerDesc_t *) saLlistGetHead(&(saRoot->validTimers)); in saTimerTick()
75 /* (2.1) Find the first timer is timeout */ in saTimerTick()
76 if ( pTimer->timeoutTick == saRoot->timeTick ) in saTimerTick()
78 /* (2.1.1) remove the timer from valid timer list */ in saTimerTick()
79 saLlistRemove(&(saRoot->validTimers), &(pTimer->linkNode)); in saTimerTick()
80 /* (2.1.2) Invalid timer */ in saTimerTick()
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| /freebsd/sys/kern/ |
| H A D | kern_clocksource.c | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2010-2013 Alexander Motin <mav@FreeBSD.org>
57 int cpu_disable_c2_sleep = 0; /* Timer dies in C2. */
58 int cpu_disable_c3_sleep = 0; /* Timer dies in C3. */
75 if (timer->et_flags & ET_FLAGS_PERCPU) \
76 mtx_lock_spin(&(state)->et_hw_mtx); \
83 if (timer->et_flags & ET_FLAGS_PERCPU) \
84 mtx_unlock_spin(&(state)->et_hw_mtx); \
89 static struct eventtimer *timer = NULL; variable
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| /freebsd/sys/contrib/device-tree/Bindings/soc/microchip/ |
| H A D | atmel,at91rm9200-tcb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Atmel Timer Counter Block
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 The Atmel (now Microchip) SoCs have timers named Timer Counter Block. Each
14 timer has three channels with two counters each.
19 - enum:
20 - atmel,at91rm9200-tcb
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