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/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Darm-realview-eb-11mp.dts23 /dts-v1/;
24 #include "arm-realview-eb-mp.dtsi"
27 model = "ARM RealView Emulation Baseboard with ARM11MPCore Rev C Core Tile";
31 * This is the ARM11 MPCore tile (HBI-0146) used with the RealView EB.
35 * qemu-system-arm -M realview-eb-mpcore -smp cpus=4
38 #address-cells = <1>;
39 #size-cells = <0>;
40 enable-method = "arm,realview-smp";
46 next-level-cache = <&L2>;
53 next-level-cache = <&L2>;
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H A Darm-realview-eb-mp.dtsi23 #include <dt-bindings/interrupt-controller/irq.h>
24 #include <dt-bindings/gpio/gpio.h>
25 #include "arm-realview-eb.dtsi"
30 * and Cortex-A9 MPCore.
34 #address-cells = <1>;
35 #size-cells = <1>;
36 compatible = "arm,realview-eb-soc", "simple-bus";
41 intc: interrupt-controller@1f000100 {
42 compatible = "arm,eb11mp-gic";
43 #interrupt-cells = <3>;
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H A Darm-realview-eb.dts23 /dts-v1/;
24 #include <dt-bindings/interrupt-controller/irq.h>
25 #include <dt-bindings/gpio/gpio.h>
26 #include "arm-realview-eb.dtsi"
30 compatible = "arm,realview-eb";
34 * This is the core tile with the CPU and GIC etc for the
35 * ARM926EJ-S, ARM1136, ARM1176 that does not have L2 cache
39 * qemu-system-arm -M realview-eb
40 * Unless specified, QEMU will emulate an ARM926EJ-S core tile.
41 * Switches -cpu arm1136 or -cpu arm1176 emulates the other
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H A Darm-realview-eb-a9mp.dts23 /dts-v1/;
24 #include "arm-realview-eb-mp.dtsi"
30 * This is the Cortex A9 MPCore tile used with the
34 #address-cells = <1>;
35 #size-cells = <0>;
36 enable-method = "arm,realview-smp";
40 compatible = "arm,cortex-a9";
42 next-level-cache = <&L2>;
47 compatible = "arm,cortex-a9";
49 next-level-cache = <&L2>;
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/freebsd/lib/libpmc/pmu-events/arch/x86/knightslanding/
H A Dcache.json3 …the L2Q because of any L2 queue reject condition. There is no concept of at-ret here. It might in…
19 "BriefDescription": "Counts the number of L2 cache misses",
27 "BriefDescription": "Counts the total number of L2 cache references.",
35 …cache line (cacheable requests) exlcuding SW prefetches filling only to L2 cache and L1 evictions …
42 "BriefDescription": "Counts all the load micro-ops retired",
46 "PublicDescription": "This event counts the number of load micro-ops retired.",
51 "BriefDescription": "Counts all the store micro-ops retired",
55 "PublicDescription": "This event counts the number of store micro-ops retired.",
60 …ion": "Counts the loads retired that get the data from the other core in the same tile in M state",
70 "BriefDescription": "Counts the number of load micro-ops retired that miss in L1 D cache",
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/freebsd/sys/contrib/device-tree/Bindings/media/
H A Dnxp,dw100.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Xavier Roumegue <xavier.roumegue@oss.nxp.com>
12 description: |-
13 The Dewarp Engine provides high-performance dewarp processing for the
15 and wide angle lenses. It is implemented with a line/tile-cache based
16 architecture. With configurable address mapping look up tables and per tile
24 - nxp,imx8mp-dw100
34 - description: The AXI clock
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86.h1 //===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
28 /// This pass converts a legalized DAG into a X86-specific DAG, ready for
32 /// This pass initializes a global base register for PIC on x86-32.
35 /// This pass combines multiple accesses to local-dynamic TLS variables so that
40 /// This function returns a pass which converts floating-point register
41 /// references and pseudo instructions into floating-point stack references and
85 /// Return a pass that expands DynAlloca pseudo-instructions.
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H A DX86RegisterInfo.cpp1 //===-- X86RegisterInfo.cpp - X86 Register Information --------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
45 EnableBasePointer("x86-use-base-pointer", cl::Hidden, cl::init(true),
55 // Cache some information. in X86RegisterInfo()
59 // Use a callee-saved register as the base pointer. These registers must in X86RegisterInfo()
60 // not conflict with any ABI requirements. For example, in 32-bit mode PIC in X86RegisterInfo()
64 // This matches the simplified 32-bit pointer code in the data layout in X86RegisterInfo()
87 // The sub_8bit sub-register index is more constrained in 32-bit mode. in getSubClassWithSubReg()
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H A DX86.td1 //===-- X86.td - Target definition file for the Intel X86 --*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
14 // Get the target-independent interfaces which we are implementing...
18 //===----------------------------------------------------------------------===//
22 def Is64Bit : SubtargetFeature<"64bit-mode", "Is64Bit", "true",
23 "64-bit mode (x86_64)">;
24 def Is32Bit : SubtargetFeature<"32bit-mode", "Is32Bit", "true",
25 "32-bit mode (80386)">;
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/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A DOpenACCKinds.h1 //===--- OpenACCKinds.h - OpenACC Enums -------------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 /// Defines some OpenACC-specific enums and functions.
12 //===----------------------------------------------------------------------===//
41 Cache, enumerator
97 case OpenACCDirectiveKind::Cache: in printOpenACCDirectiveKind()
98 return Out << "cache"; in printOpenACCDirectiveKind()
281 /// 'tile' clause, allowed on 'loop' and Combined constructs.
282 Tile, enumerator
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/freebsd/contrib/llvm-project/clang/lib/Parse/
H A DParseOpenACC.cpp1 //===--- ParseOpenACC.cpp - OpenACC-specific parsing support --------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
36 // Translate single-token string representations to the OpenACC Directive Kind.
46 Tok.getIdentifierInfo()->getName()) in getOpenACCDirectiveKind()
53 .Case("cache", OpenACCDirectiveKind::Cache) in getOpenACCDirectiveKind()
68 Tok.getIdentifierInfo()->getName()) in getOpenACCDirectiveKind()
74 // Translate single-token string representations to the OpenCC Clause Kind.
97 Tok.getIdentifierInfo()->getName()) in getOpenACCClauseKind()
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/freebsd/lib/libomp/
H A Dkmp_i18n_default.inc2 // The file was generated from en_US.txt by message-converter.py on Sat Jul 27 14:17:03 2024. //
74 "tile",
84 "L1 cache",
86 "L2 cache",
88 "L3 cache",
97 "LL cache",
142 "Real-time scheduling policy is not supported.",
143 "OMP application is running at maximum priority with real-time scheduling policy. ",
187 "%1$s: range error ((%2$d-%3$d)/%4$d too big), not using affinity.",
207 …"Too many threads to use analytical guided scheduling - switching to iterative guided scheduling.",
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/freebsd/contrib/llvm-project/openmp/runtime/src/i18n/
H A Den_US.txt4 #//===----------
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/freebsd/contrib/llvm-project/clang/lib/Basic/Targets/
H A DX86.cpp1 //===--- X86.cpp - Implement X86 target feature support -------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
140 enum { FE_NOSET = -1, FE_FALSE, FE_TRUE }; in initFeatureMap()
143 bool HasAVX10 = Features.lookup("avx10.1-256"); in initFeatureMap()
144 bool HasAVX10_512 = Features.lookup("avx10.1-512"); in initFeatureMap()
148 // Expand general-regs-only to -x86, -mmx and -sse in initFeatureMap()
149 if (Feature == "+general-regs-only") { in initFeatureMap()
150 UpdatedFeaturesVec.push_back("-x87"); in initFeatureMap()
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/freebsd/contrib/llvm-project/llvm/include/llvm/Frontend/OpenMP/
H A DOMPIRBuilder.h1 //===- IR/OpenMPIRBuilder.h - OpenMP encoding builder for LLVM IR - C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
55 /// llvm::SplitBasicBlock and BasicBlock::splitBasicBlock require a well-formed
81 /// Captures attributes that affect generating LLVM-IR using the
90 /// is set when the -fopenmp-is-target-device compiler frontend option is
98 /// if `IsGPU` is true. This restriction might be lifted if an accelerator-
316 return Info->getKind() == OffloadingEntryInfoTargetRegion; in classof()
372 /// The target is marked for non-host devices
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/freebsd/contrib/llvm-project/llvm/include/llvm/Frontend/OpenACC/
H A DACC.td1 //===-- ACC.td - OpenACC directive definition file ---------*- tablegen -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
15 //===----------------------------------------------------------------------===//
17 //===----------------------------------------------------------------------===//
30 //===----------------------------------------------------------------------===//
32 //===----------------------------------------------------------------------===//
119 // 2.14.1 - 2.14.2
206 def ACCC_Tile : Clause <"tile"> {
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/freebsd/contrib/tcsh/
H A Dcomplete.tcsh12 # Added two Debian-specific completions: dpkg and dpkg-deb (who
21 onintr -
43 setenv OSTYPE `echo "$HOSTTYPE" | sed -e 's/^(i[3456]86|(amd|x86_)64)-//'`
50 if ( -r "$f" ) then
52 -e 's/#.*//' \
53 -e '/^[+-]@/d' \
54 -e 's/^[-+]//' \
55 -e 's/[[:space:]].*//' \
56 -e 's/,/\n/g' "$f" \
57 | sed -e '/^[.:[:xdigit:][:space:]]*$/d'`)
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/freebsd/contrib/llvm-project/openmp/runtime/src/
H A Dkmp_affinity.cpp2 * kmp_affinity.cpp -- affinity management
5 //===----------------------------------------------------------------------===//
9 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
11 //===----------------------------------------------------------------------===//
62 return __kmp_topology->restrict_to_mask(mask); in restrict_to_mask()
92 thr_bar->depth = depth; in __kmp_get_hierarchy()
93 __kmp_type_convert(machine_hierarchy.numPerLevel[0] - 1, in __kmp_get_hierarchy()
94 &(thr_bar->base_leaf_kids)); in __kmp_get_hierarchy()
95 thr_bar->skip_per_level = machine_hierarchy.skipPerLevel; in __kmp_get_hierarchy()
113 return ((plural) ? KMP_I18N_STR(Tiles) : KMP_I18N_STR(Tile)); in __kmp_hw_get_catalog_string()
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/freebsd/contrib/pam_modules/pam_passwdqc/
H A Dwordset_4k.c6 * I've replaced two 7-character words to save space.
752 "cache",
3710 "tile",
/freebsd/share/dict/
H A Dweb2a12 A-b-c book
13 A-b-c method
14 abdomino-uterotomy
15 Abdul-baha
16 a-be
20 able-bodied
21 able-bodiedness
22 able-minded
23 able-mindedness
27 Abor-miri
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLowerMatrixIntrinsics.cpp1 //===- LowerMatrixIntrinsics.cpp - Lower matrix intrinsics -----*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 // * Support more cases, e.g. multiply-add, multiply-sub, operands/results
15 // * Improve cost-modeling, e.g. choose different number of rows/columns
18 //===----------------------------------------------------------------------===//
53 #define DEBUG_TYPE "lower-matrix-intrinsics"
56 FuseMatrix("fuse-matrix", cl::init(true), cl::Hidden,
58 // TODO: Allow and use non-square tiles.
60 "fuse-matrix-tile-size", cl::init(4), cl::Hidden,
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/freebsd/contrib/llvm-project/llvm/lib/Frontend/OpenMP/
H A DOMPIRBuilder.cpp1 //===- OpenMPIRBuilder.cpp - Builder for LLVM-IR for OpenMP directives ----===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
13 //===----------------------------------------------------------------------===//
62 #define DEBUG_TYPE "openmp-ir-builder"
68 OptimisticAttributes("openmp-ir-builder-optimistic-attributes", cl::Hidden,
70 "'as-if' properties of runtime calls."),
74 "openmp-ir-builder-unroll-threshold-factor", cl::Hidden,
81 /// at position IP1 may change the meaning of IP2 or vice-versa. This is because
154 Kernel->getFnAttribute("target-features").getValueAsString(); in getGridValue()
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/freebsd/share/misc/
H A Dpci_vendors5 # Date: 2025-10-18 03:15:01
8 # the PCI ID Project at https://pci-ids.ucw.cz/.
14 # (version 2 or higher) or the 3-clause BSD License.
25 # device device_name <-- single tab
26 # subvendor subdevice subsystem_name <-- two tabs
30 # This is a relabelled RTL-8139
31 8139 AT-2500TX V3 Ethernet
41 7a09 PCI-to-PCI Bridge
51 7a19 PCI-to-PCI Bridge
57 7a29 PCI-to-PCI Bridge
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/freebsd/contrib/llvm-project/clang/lib/Serialization/
H A DASTWriter.cpp1 //===- ASTWriter.cpp - AST File Writer ------------------------------------===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
151 //===----------------------------------------------------------------------===//
153 //===----------------------------------------------------------------------===//
181 M = M->getTopLevelModule(); in GetAffectingModuleMaps()
202 for (auto *SubM : Mod->submodules()) in GetAffectingModuleMaps()
217 for (const Module *ImportedModule : CurrentModule->Imports) in GetAffectingModuleMaps()
219 for (const Module *UndeclaredModule : CurrentModule->UndeclaredUses) in GetAffectingModuleMaps()
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/freebsd/contrib/llvm-project/llvm/lib/TargetParser/
H A DHost.cpp1 //===-- Host.cpp - Implement OS Host Detection ------------------*- C++ -*-===//
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
18 #include "llvm/Config/llvm-config.h"
25 // Include the platform-specific parts of this class.
54 #define DEBUG_TYPE "host-detection"
56 //===----------------------------------------------------------------------===//
60 //===----------------------------------------------------------------------===//
78 // and so we must use an operating-system interface to determine the current in getHostCPUNameForPowerPC()
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