xref: /freebsd/contrib/llvm-project/llvm/lib/Target/X86/X86.h (revision 0fca6ea1d4eea4c934cfff25ac9ee8ad6fe95583)
10b57cec5SDimitry Andric //===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric //
90b57cec5SDimitry Andric // This file contains the entry points for global functions defined in the x86
100b57cec5SDimitry Andric // target library, as used by the LLVM JIT.
110b57cec5SDimitry Andric //
120b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
130b57cec5SDimitry Andric 
140b57cec5SDimitry Andric #ifndef LLVM_LIB_TARGET_X86_X86_H
150b57cec5SDimitry Andric #define LLVM_LIB_TARGET_X86_X86_H
160b57cec5SDimitry Andric 
170b57cec5SDimitry Andric #include "llvm/Support/CodeGen.h"
180b57cec5SDimitry Andric 
190b57cec5SDimitry Andric namespace llvm {
200b57cec5SDimitry Andric 
210b57cec5SDimitry Andric class FunctionPass;
220b57cec5SDimitry Andric class InstructionSelector;
230b57cec5SDimitry Andric class PassRegistry;
240b57cec5SDimitry Andric class X86RegisterBankInfo;
250b57cec5SDimitry Andric class X86Subtarget;
260b57cec5SDimitry Andric class X86TargetMachine;
270b57cec5SDimitry Andric 
280b57cec5SDimitry Andric /// This pass converts a legalized DAG into a X86-specific DAG, ready for
290b57cec5SDimitry Andric /// instruction scheduling.
305f757f3fSDimitry Andric FunctionPass *createX86ISelDag(X86TargetMachine &TM, CodeGenOptLevel OptLevel);
310b57cec5SDimitry Andric 
320b57cec5SDimitry Andric /// This pass initializes a global base register for PIC on x86-32.
330b57cec5SDimitry Andric FunctionPass *createX86GlobalBaseRegPass();
340b57cec5SDimitry Andric 
350b57cec5SDimitry Andric /// This pass combines multiple accesses to local-dynamic TLS variables so that
360b57cec5SDimitry Andric /// the TLS base address for the module is only fetched once per execution path
370b57cec5SDimitry Andric /// through the function.
380b57cec5SDimitry Andric FunctionPass *createCleanupLocalDynamicTLSPass();
390b57cec5SDimitry Andric 
400b57cec5SDimitry Andric /// This function returns a pass which converts floating-point register
410b57cec5SDimitry Andric /// references and pseudo instructions into floating-point stack references and
420b57cec5SDimitry Andric /// physical instructions.
430b57cec5SDimitry Andric FunctionPass *createX86FloatingPointStackifierPass();
440b57cec5SDimitry Andric 
450b57cec5SDimitry Andric /// This pass inserts AVX vzeroupper instructions before each call to avoid
460b57cec5SDimitry Andric /// transition penalty between functions encoded with AVX and SSE.
470b57cec5SDimitry Andric FunctionPass *createX86IssueVZeroUpperPass();
480b57cec5SDimitry Andric 
490b57cec5SDimitry Andric /// This pass inserts ENDBR instructions before indirect jump/call
500b57cec5SDimitry Andric /// destinations as part of CET IBT mechanism.
510b57cec5SDimitry Andric FunctionPass *createX86IndirectBranchTrackingPass();
520b57cec5SDimitry Andric 
530b57cec5SDimitry Andric /// Return a pass that pads short functions with NOOPs.
540b57cec5SDimitry Andric /// This will prevent a stall when returning on the Atom.
550b57cec5SDimitry Andric FunctionPass *createX86PadShortFunctions();
560b57cec5SDimitry Andric 
570b57cec5SDimitry Andric /// Return a pass that selectively replaces certain instructions (like add,
580b57cec5SDimitry Andric /// sub, inc, dec, some shifts, and some multiplies) by equivalent LEA
590b57cec5SDimitry Andric /// instructions, in order to eliminate execution delays in some processors.
600b57cec5SDimitry Andric FunctionPass *createX86FixupLEAs();
610b57cec5SDimitry Andric 
6206c3fb27SDimitry Andric /// Return a pass that replaces equivalent slower instructions with faster
6306c3fb27SDimitry Andric /// ones.
6406c3fb27SDimitry Andric FunctionPass *createX86FixupInstTuning();
6506c3fb27SDimitry Andric 
6606c3fb27SDimitry Andric /// Return a pass that reduces the size of vector constant pool loads.
6706c3fb27SDimitry Andric FunctionPass *createX86FixupVectorConstants();
6806c3fb27SDimitry Andric 
690b57cec5SDimitry Andric /// Return a pass that removes redundant LEA instructions and redundant address
700b57cec5SDimitry Andric /// recalculations.
710b57cec5SDimitry Andric FunctionPass *createX86OptimizeLEAs();
720b57cec5SDimitry Andric 
730b57cec5SDimitry Andric /// Return a pass that transforms setcc + movzx pairs into xor + setcc.
740b57cec5SDimitry Andric FunctionPass *createX86FixupSetCC();
750b57cec5SDimitry Andric 
76*0fca6ea1SDimitry Andric /// Return a pass that transform inline buffer security check into seperate bb
77*0fca6ea1SDimitry Andric FunctionPass *createX86WinFixupBufferSecurityCheckPass();
78*0fca6ea1SDimitry Andric 
790b57cec5SDimitry Andric /// Return a pass that avoids creating store forward block issues in the hardware.
800b57cec5SDimitry Andric FunctionPass *createX86AvoidStoreForwardingBlocks();
810b57cec5SDimitry Andric 
820b57cec5SDimitry Andric /// Return a pass that lowers EFLAGS copy pseudo instructions.
830b57cec5SDimitry Andric FunctionPass *createX86FlagsCopyLoweringPass();
840b57cec5SDimitry Andric 
85349cc55cSDimitry Andric /// Return a pass that expands DynAlloca pseudo-instructions.
86349cc55cSDimitry Andric FunctionPass *createX86DynAllocaExpander();
870b57cec5SDimitry Andric 
88fe6060f1SDimitry Andric /// Return a pass that config the tile registers.
89e8d8bef9SDimitry Andric FunctionPass *createX86TileConfigPass();
90e8d8bef9SDimitry Andric 
9181ad6265SDimitry Andric /// Return a pass that preconfig the tile registers before fast reg allocation.
9281ad6265SDimitry Andric FunctionPass *createX86FastPreTileConfigPass();
9381ad6265SDimitry Andric 
94fe6060f1SDimitry Andric /// Return a pass that config the tile registers after fast reg allocation.
95fe6060f1SDimitry Andric FunctionPass *createX86FastTileConfigPass();
96fe6060f1SDimitry Andric 
97fe6060f1SDimitry Andric /// Return a pass that insert pseudo tile config instruction.
98e8d8bef9SDimitry Andric FunctionPass *createX86PreTileConfigPass();
99e8d8bef9SDimitry Andric 
100fe6060f1SDimitry Andric /// Return a pass that lower the tile copy instruction.
101fe6060f1SDimitry Andric FunctionPass *createX86LowerTileCopyPass();
102fe6060f1SDimitry Andric 
1038bcb0991SDimitry Andric /// Return a pass that inserts int3 at the end of the function if it ends with a
1048bcb0991SDimitry Andric /// CALL instruction. The pass does the same for each funclet as well. This
1058bcb0991SDimitry Andric /// ensures that the open interval of function start and end PCs contains all
1068bcb0991SDimitry Andric /// return addresses for the benefit of the Windows x64 unwinder.
1078bcb0991SDimitry Andric FunctionPass *createX86AvoidTrailingCallPass();
1088bcb0991SDimitry Andric 
1090b57cec5SDimitry Andric /// Return a pass that optimizes the code-size of x86 call sequences. This is
1100b57cec5SDimitry Andric /// done by replacing esp-relative movs with pushes.
1110b57cec5SDimitry Andric FunctionPass *createX86CallFrameOptimization();
1120b57cec5SDimitry Andric 
1130b57cec5SDimitry Andric /// Return an IR pass that inserts EH registration stack objects and explicit
1140b57cec5SDimitry Andric /// EH state updates. This pass must run after EH preparation, which does
1150b57cec5SDimitry Andric /// Windows-specific but architecture-neutral preparation.
1160b57cec5SDimitry Andric FunctionPass *createX86WinEHStatePass();
1170b57cec5SDimitry Andric 
1180b57cec5SDimitry Andric /// Return a Machine IR pass that expands X86-specific pseudo
1190b57cec5SDimitry Andric /// instructions into a sequence of actual instructions. This pass
1200b57cec5SDimitry Andric /// must run after prologue/epilogue insertion and before lowering
1210b57cec5SDimitry Andric /// the MachineInstr to MC.
1220b57cec5SDimitry Andric FunctionPass *createX86ExpandPseudoPass();
1230b57cec5SDimitry Andric 
1240b57cec5SDimitry Andric /// This pass converts X86 cmov instructions into branch when profitable.
1250b57cec5SDimitry Andric FunctionPass *createX86CmovConverterPass();
1260b57cec5SDimitry Andric 
1270b57cec5SDimitry Andric /// Return a Machine IR pass that selectively replaces
1280b57cec5SDimitry Andric /// certain byte and word instructions by equivalent 32 bit instructions,
1290b57cec5SDimitry Andric /// in order to eliminate partial register usage, false dependences on
1300b57cec5SDimitry Andric /// the upper portions of registers, and to save code size.
1310b57cec5SDimitry Andric FunctionPass *createX86FixupBWInsts();
1320b57cec5SDimitry Andric 
1330b57cec5SDimitry Andric /// Return a Machine IR pass that reassigns instruction chains from one domain
1340b57cec5SDimitry Andric /// to another, when profitable.
1350b57cec5SDimitry Andric FunctionPass *createX86DomainReassignmentPass();
1360b57cec5SDimitry Andric 
1371db9f3b2SDimitry Andric /// This pass compress instructions from EVEX space to legacy/VEX/EVEX space when
1381db9f3b2SDimitry Andric /// possible in order to reduce code size or facilitate HW decoding.
1391db9f3b2SDimitry Andric FunctionPass *createX86CompressEVEXPass();
1400b57cec5SDimitry Andric 
1410b57cec5SDimitry Andric /// This pass creates the thunks for the retpoline feature.
1420946e70aSDimitry Andric FunctionPass *createX86IndirectThunksPass();
1430b57cec5SDimitry Andric 
144753f127fSDimitry Andric /// This pass replaces ret instructions with jmp's to __x86_return thunk.
145753f127fSDimitry Andric FunctionPass *createX86ReturnThunksPass();
146753f127fSDimitry Andric 
1470b57cec5SDimitry Andric /// This pass ensures instructions featuring a memory operand
1480b57cec5SDimitry Andric /// have distinctive <LineNumber, Discriminator> (with respect to eachother)
1490b57cec5SDimitry Andric FunctionPass *createX86DiscriminateMemOpsPass();
1500b57cec5SDimitry Andric 
1510b57cec5SDimitry Andric /// This pass applies profiling information to insert cache prefetches.
1520b57cec5SDimitry Andric FunctionPass *createX86InsertPrefetchPass();
1530b57cec5SDimitry Andric 
1545ffd83dbSDimitry Andric /// This pass insert wait instruction after X87 instructions which could raise
1555ffd83dbSDimitry Andric /// fp exceptions when strict-fp enabled.
1565ffd83dbSDimitry Andric FunctionPass *createX86InsertX87waitPass();
1575ffd83dbSDimitry Andric 
1585ffd83dbSDimitry Andric /// This pass optimizes arithmetic based on knowledge that is only used by
1595ffd83dbSDimitry Andric /// a reduction sequence and is therefore safe to reassociate in interesting
1605ffd83dbSDimitry Andric /// ways.
1615ffd83dbSDimitry Andric FunctionPass *createX86PartialReductionPass();
1625ffd83dbSDimitry Andric 
1630b57cec5SDimitry Andric InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM,
164*0fca6ea1SDimitry Andric                                                   const X86Subtarget &,
165*0fca6ea1SDimitry Andric                                                   const X86RegisterBankInfo &);
1660b57cec5SDimitry Andric 
1670946e70aSDimitry Andric FunctionPass *createX86LoadValueInjectionLoadHardeningPass();
1680946e70aSDimitry Andric FunctionPass *createX86LoadValueInjectionRetHardeningPass();
1690b57cec5SDimitry Andric FunctionPass *createX86SpeculativeLoadHardeningPass();
1705ffd83dbSDimitry Andric FunctionPass *createX86SpeculativeExecutionSideEffectSuppression();
17106c3fb27SDimitry Andric FunctionPass *createX86ArgumentStackSlotPass();
1720b57cec5SDimitry Andric 
1731db9f3b2SDimitry Andric void initializeCompressEVEXPassPass(PassRegistry &);
174bdd1243dSDimitry Andric void initializeFPSPass(PassRegistry &);
1750b57cec5SDimitry Andric void initializeFixupBWInstPassPass(PassRegistry &);
1760b57cec5SDimitry Andric void initializeFixupLEAPassPass(PassRegistry &);
17706c3fb27SDimitry Andric void initializeX86ArgumentStackSlotPassPass(PassRegistry &);
17806c3fb27SDimitry Andric void initializeX86FixupInstTuningPassPass(PassRegistry &);
17906c3fb27SDimitry Andric void initializeX86FixupVectorConstantsPassPass(PassRegistry &);
1800b57cec5SDimitry Andric void initializeWinEHStatePassPass(PassRegistry &);
1810b57cec5SDimitry Andric void initializeX86AvoidSFBPassPass(PassRegistry &);
1825ffd83dbSDimitry Andric void initializeX86AvoidTrailingCallPassPass(PassRegistry &);
1830b57cec5SDimitry Andric void initializeX86CallFrameOptimizationPass(PassRegistry &);
1840b57cec5SDimitry Andric void initializeX86CmovConverterPassPass(PassRegistry &);
185*0fca6ea1SDimitry Andric void initializeX86DAGToDAGISelLegacyPass(PassRegistry &);
1860b57cec5SDimitry Andric void initializeX86DomainReassignmentPass(PassRegistry &);
1870b57cec5SDimitry Andric void initializeX86ExecutionDomainFixPass(PassRegistry &);
1888bcb0991SDimitry Andric void initializeX86ExpandPseudoPass(PassRegistry &);
18981ad6265SDimitry Andric void initializeX86FastPreTileConfigPass(PassRegistry &);
190fe6060f1SDimitry Andric void initializeX86FastTileConfigPass(PassRegistry &);
191bdd1243dSDimitry Andric void initializeX86FixupSetCCPassPass(PassRegistry &);
192*0fca6ea1SDimitry Andric void initializeX86WinFixupBufferSecurityCheckPassPass(PassRegistry &);
193bdd1243dSDimitry Andric void initializeX86FlagsCopyLoweringPassPass(PassRegistry &);
194bdd1243dSDimitry Andric void initializeX86LoadValueInjectionLoadHardeningPassPass(PassRegistry &);
195bdd1243dSDimitry Andric void initializeX86LoadValueInjectionRetHardeningPassPass(PassRegistry &);
196fe6060f1SDimitry Andric void initializeX86LowerAMXIntrinsicsLegacyPassPass(PassRegistry &);
197bdd1243dSDimitry Andric void initializeX86LowerAMXTypeLegacyPassPass(PassRegistry &);
198bdd1243dSDimitry Andric void initializeX86LowerTileCopyPass(PassRegistry &);
199bdd1243dSDimitry Andric void initializeX86OptimizeLEAPassPass(PassRegistry &);
200bdd1243dSDimitry Andric void initializeX86PartialReductionPass(PassRegistry &);
201bdd1243dSDimitry Andric void initializeX86PreTileConfigPass(PassRegistry &);
202753f127fSDimitry Andric void initializeX86ReturnThunksPass(PassRegistry &);
203bdd1243dSDimitry Andric void initializeX86SpeculativeExecutionSideEffectSuppressionPass(PassRegistry &);
204bdd1243dSDimitry Andric void initializeX86SpeculativeLoadHardeningPassPass(PassRegistry &);
205bdd1243dSDimitry Andric void initializeX86TileConfigPass(PassRegistry &);
206480093f4SDimitry Andric 
207480093f4SDimitry Andric namespace X86AS {
208480093f4SDimitry Andric enum : unsigned {
209480093f4SDimitry Andric   GS = 256,
210480093f4SDimitry Andric   FS = 257,
211480093f4SDimitry Andric   SS = 258,
212480093f4SDimitry Andric   PTR32_SPTR = 270,
213480093f4SDimitry Andric   PTR32_UPTR = 271,
214480093f4SDimitry Andric   PTR64 = 272
215480093f4SDimitry Andric };
216480093f4SDimitry Andric } // End X86AS namespace
217480093f4SDimitry Andric 
2180b57cec5SDimitry Andric } // End llvm namespace
2190b57cec5SDimitry Andric 
2200b57cec5SDimitry Andric #endif
221