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/linux/Documentation/devicetree/bindings/clock/
H A Dthead,th1520-clk-ap.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/thead,th1520-clk-ap.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: T-HEAD TH1520 AP sub-system clock controller
10 The T-HEAD TH1520 AP sub-system clock controller configures the
11 CPU, DPU, GMAC and TEE PLLs.
14 …https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manua…
17 - Jisheng Zhang <jszhang@kernel.org>
18 - Wei Fu <wefu@redhat.com>
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/linux/drivers/clk/thead/
H A DKconfig1 #SPDX-License-Identifier: GPL-2.0
4 bool "T-HEAD TH1520 AP clock support"
11 on the T-HEAD TH1520 SoC. This includes configuration of
12 both CPU PLLs, both DPU PLLs as well as the GMAC, VIDEO,
H A Dclk-th1520-ap.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/thead,th1520-clk-ap.h>
10 #include <linux/clk-provider.h>
131 regmap_read(common->map, common->cfg0, &val); in ccu_get_parent_helper()
132 parent = val >> mux->shift; in ccu_get_parent_helper()
133 parent &= GENMASK(mux->width - 1, 0); in ccu_get_parent_helper()
142 return regmap_update_bits(common->map, common->cfg0, in ccu_set_parent_helper()
143 GENMASK(mux->width - 1, 0) << mux->shift, in ccu_set_parent_helper()
144 index << mux->shift); in ccu_set_parent_helper()
151 regmap_update_bits(common->map, common->cfg0, in ccu_disable_helper()
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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