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Searched +full:tegra30 +full:- +full:timer (Results 1 – 7 of 7) sorted by relevance

/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra132-peripherals-opp.dtsi"
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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra124-peripherals-opp.dtsi"
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/linux/Documentation/devicetree/bindings/rtc/
H A Dnvidia,tegra20-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/nvidia,tegra20-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra real-time clock
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 from low-power state.
21 - const: nvidia,tegra20-rtc
22 - items:
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/linux/drivers/watchdog/
H A Dtegra_wdt.c1 // SPDX-License-Identifier: GPL-2.0
19 * Base of the WDT registers, from the timer base address. There are
21 * timer), at bases 0x100 + (WDT ID) * 0x20, where WDT ID is 0 through 4.
28 * Register base of the timer that's selected for pairing with the watchdog.
29 * This driver arbitrarily uses timer 5, which is currently unused by
31 * needs to change, take care that the new timer is not used by the
54 /* Timer registers */
91 writel(val, wdt->tmr_regs + TIMER_PTV); in tegra_wdt_start()
101 (wdd->timeout << WDT_CFG_PERIOD_SHIFT) | in tegra_wdt_start()
103 writel(val, wdt->wdt_regs + WDT_CFG); in tegra_wdt_start()
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/linux/drivers/input/keyboard/
H A Dtegra-kbc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright (c) 2009-2011, NVIDIA Corporation.
104 struct timer_list timer; member
156 val = readl(kbc->mmio + KBC_KP_ENT0_0 + i); in tegra_kbc_report_keys()
165 keycodes[num_down] = kbc->keycode[scancode]; in tegra_kbc_report_keys()
167 if ((keycodes[num_down] == KEY_FN) && kbc->use_fn_map) in tegra_kbc_report_keys()
178 * Ghosting occurs if there are 3 keys such that - in tegra_kbc_report_keys()
182 if (kbc->use_ghost_filter && num_down >= 3) { in tegra_kbc_report_keys()
190 * and the other is in the same column as the i-th key. in tegra_kbc_report_keys()
210 scancodes[i] += kbc->max_keys; in tegra_kbc_report_keys()
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/linux/drivers/gpu/drm/tegra/
H A Ddc.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/dma-mapping.h>
141 stats->frames = 0; in tegra_dc_stats_reset()
142 stats->vblank = 0; in tegra_dc_stats_reset()
143 stats->underflow = 0; in tegra_dc_stats_reset()
144 stats->overflow = 0; in tegra_dc_stats_reset()
163 offset = 0x000 + (offset - 0x500); in tegra_plane_offset()
164 return plane->offset + offset; in tegra_plane_offset()
168 offset = 0x180 + (offset - 0x700); in tegra_plane_offset()
169 return plane->offset + offset; in tegra_plane_offset()
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree .rst file
30 See Documentation/maintainer/maintainer-entry-profile.rst for details.
47 N: [^a-z]tegra all files whose path contains tegra
65 ----------------
90 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
92 L: linux-scsi@vger.kernel.org
95 F: drivers/scsi/3w-*
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