/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra30.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra30-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra30-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/soc/tegra-pmc.h> 8 #include <dt-bindings/thermal/thermal.h> 10 #include "tegra30-peripherals-opp.dtsi" 13 compatible = "nvidia,tegra30"; [all …]
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H A D | tegra114.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra114-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra114-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/soc/tegra-pmc.h> 11 interrupt-parent = <&lic>; 12 #address-cells = <1>; 13 #size-cells = <1>; [all …]
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H A D | tegra30-cardhu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/thermal/thermal.h> 4 #include "tegra30.dtsi" 5 #include "tegra30-cpu-opp.dtsi" 6 #include "tegra30-cpu-opp-microvolt.dtsi" 16 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use 17 * tegra30-cardhu-a04.dts. 20 * The sticker will have number like 600-81291-1000-002 C.3. In this 4th 22 * The (downstream internal) U-Boot of Cardhu display the board-id as [all …]
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H A D | tegra124.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra124-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra124-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/reset/tegra124-car.h> 8 #include <dt-bindings/thermal/tegra124-soctherm.h> 9 #include <dt-bindings/soc/tegra-pmc.h> 11 #include "tegra124-peripherals-opp.dtsi" [all …]
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H A D | tegra30-asus-nexus7-grouper.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "tegra30-asus-nexus7-grouper-common.dtsi" 4 #include "tegra30-asus-nexus7-grouper-memory-timings.dtsi" 7 compatible = "asus,grouper", "nvidia,tegra30"; 16 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 23 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 30 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 37 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 44 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 51 nvidia,enable-input = <TEGRA_PIN_ENABLE>; [all …]
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H A D | tegra30-colibri-eval-v3.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include "tegra30-colibri.dtsi" 9 compatible = "toradex,colibri_t30-eval-v3", "toradex,colibri_t30", 10 "nvidia,tegra30"; 13 rtc0 = "/i2c@7000c000/rtc@68"; 14 rtc1 = "/i2c@7000d000/pmic@2d"; 22 stdout-path = "serial0:115200n8"; 35 hdmi-supply = <®_5v0>; [all …]
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H A D | tegra30-asus-nexus7-tilapia.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "tegra30-asus-nexus7-grouper-common.dtsi" 4 #include "tegra30-asus-nexus7-tilapia-memory-timings.dtsi" 7 compatible = "asus,tilapia", "asus,grouper", "nvidia,tegra30"; 10 init-mode-3g-hog { 11 gpio-hog; 30 output-low; 41 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 48 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 55 nvidia,enable-input = <TEGRA_PIN_ENABLE>; [all …]
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H A D | tegra30-apalis-eval.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include "tegra30-apalis.dtsi" 9 compatible = "toradex,apalis_t30-eval", "toradex,apalis_t30", 10 "nvidia,tegra30"; 13 rtc0 = "/i2c@7000c000/rtc@68"; 14 rtc1 = "/i2c@7000d000/pmic@2d"; 23 stdout-path = "serial0:115200n8"; 46 hdmi-supply = <®_5v0>; [all …]
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H A D | tegra30-apalis-v1.1-eval.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include "tegra30-apalis-v1.1.dtsi" 9 compatible = "toradex,apalis_t30-v1.1-eval", "toradex,apalis_t30-eval", 10 "toradex,apalis_t30-v1.1", "toradex,apalis_t30", 11 "nvidia,tegra30"; 14 rtc0 = "/i2c@7000c000/rtc@68"; 15 rtc1 = "/i2c@7000d000/pmic@2d"; 24 stdout-path = "serial0:115200n8"; [all …]
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H A D | tegra30-apalis-v1.1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 #include "tegra30.dtsi" 16 avdd-pexa-supply = <&vdd2_reg>; 17 avdd-pexb-supply = <&vdd2_reg>; 18 avdd-pex-pll-supply = <&vdd2_reg>; 19 avdd-plle-supply = <&ldo6_reg>; 20 hvdd-pex-supply = <®_module_3v3>; 21 vddio-pex-ctl-supply = <®_module_3v3>; 22 vdd-pexa-supply = <&vdd2_reg>; 23 vdd-pexb-supply = <&vdd2_reg>; [all …]
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H A D | tegra30-apalis.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include "tegra30.dtsi" 15 avdd-pexa-supply = <&vdd2_reg>; 16 avdd-pexb-supply = <&vdd2_reg>; 17 avdd-pex-pll-supply = <&vdd2_reg>; 18 avdd-plle-supply = <&ldo6_reg>; 19 hvdd-pex-supply = <®_module_3v3>; 20 vddio-pex-ctl-supply = <®_module_3v3>; 21 vdd-pexa-supply = <&vdd2_reg>; 22 vdd-pexb-supply = <&vdd2_reg>; [all …]
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H A D | tegra30-asus-nexus7-grouper-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/power/summit,smb347-charger.h> 6 #include <dt-bindings/thermal/thermal.h> 8 #include "tegra30.dtsi" 9 #include "tegra30-cpu-opp.dtsi" 10 #include "tegra30-cpu-opp-microvolt.dtsi" 11 #include "tegra30-asus-lvds-display.dtsi" 27 * pre-existing /chosen node to be available to insert the [all …]
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H A D | tegra30-lg-x3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/leds/common.h> 6 #include <dt-bindings/mfd/max77620.h> 7 #include <dt-bindings/thermal/thermal.h> 9 #include "tegra30.dtsi" 10 #include "tegra30-cpu-opp.dtsi" 11 #include "tegra30-cpu-opp-microvolt.dtsi" 14 chassis-type = "handset"; [all …]
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H A D | tegra30-asus-transformer-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/thermal/thermal.h> 7 #include "tegra30.dtsi" 8 #include "tegra30-cpu-opp.dtsi" 9 #include "tegra30-cpu-opp-microvolt.dtsi" 12 chassis-type = "convertible"; 31 * pre-existing /chosen node to be available to insert the 37 trusted-foundations { [all …]
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H A D | tegra30-asus-tf201.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include "tegra30-asus-transformer-common.dtsi" 5 #include "tegra30-asus-lvds-display.dtsi" 9 compatible = "asus,tf201", "nvidia,tegra30"; 19 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 27 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 35 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 43 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 51 nvidia,enable-input = <TEGRA_PIN_ENABLE>; [all …]
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/linux/Documentation/devicetree/bindings/i2c/ |
H A D | nvidia,tegra20-i2c.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 - Thierry Reding <thierry.reding@gmail.com> 9 - Jon Hunter <jonathanh@nvidia.com> 11 title: NVIDIA Tegra I2C controller driver 16 - description: Tegra20 has 4 generic I2C controller. This can support 17 master and slave mode of I2C communication. The i2c-tegra driver 18 only support master mode of I2C communication. Driver of I2C [all …]
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/linux/sound/soc/tegra/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 3 tristate "SoC Audio for the Tegra System-on-Chip" 46 tristate "Tegra30 AHUB module" 48 Say Y or M if you want to add support for the Tegra30 AHUB module. 53 tristate "Tegra30 I2S interface" 57 Tegra30 I2S interface. You will also need to select the individual 83 Config to enable the Inter-IC Sound (I2S) Controller which 84 implements full-duplex and bidirectional and single direction 85 point-to-point serial interfaces. It can interface with I2S 114 converts the multi-bit Pulse Code Modulation (PCM) audio input to [all …]
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/linux/Documentation/devicetree/bindings/soc/tegra/ |
H A D | nvidia,tegra20-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jonathan Hunter <jonathanh@nvidia.com> 16 - nvidia,tegra20-pmc 17 - nvidia,tegra30-pmc 18 - nvidia,tegra114-pmc 19 - nvidia,tegra124-pmc [all …]
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/linux/arch/arm64/boot/dts/nvidia/ |
H A D | tegra132.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra124-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra124-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/thermal/tegra124-soctherm.h> 9 #include <dt-bindings/soc/tegra-pmc.h> 11 #include "tegra132-peripherals-opp.dtsi" [all …]
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/linux/Documentation/devicetree/bindings/display/tegra/ |
H A D | nvidia,tegra20-dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 16 - enum: 17 - nvidia,tegra20-dsi 18 - nvidia,tegra30-dsi 19 - nvidia,tegra114-dsi [all …]
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H A D | nvidia,tegra20-dc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 pattern: "^dc@[0-9a-f]+$" 19 - enum: 20 - nvidia,tegra20-dc 21 - nvidia,tegra30-dc [all …]
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H A D | nvidia,tegra20-hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-hdmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 pattern: "^hdmi@[0-9a-f]+$" 19 - enum: 20 - nvidia,tegra20-hdmi 21 - nvidia,tegra30-hdmi [all …]
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H A D | nvidia,tegra20-vi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-vi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 pattern: "^vi@[0-9a-f]+$" 19 - const: nvidia,tegra20-vi 20 - const: nvidia,tegra30-vi 21 - const: nvidia,tegra114-vi [all …]
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/linux/drivers/clk/tegra/ |
H A D | clk-tegra30.c | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <linux/clk-provider.h> 18 #include <dt-bindings/clock/tegra30-car.h> 21 #include "clk-id.h" 595 { .con_id = "vcp", .dev_id = "tegra-avp", .dt_id = TEGRA30_CLK_VCP }, 596 { .con_id = "bsea", .dev_id = "tegra-avp", .dt_id = TEGRA30_CLK_BSEA }, 597 { .con_id = "bsev", .dev_id = "tegra-aes", .dt_id = TEGRA30_CLK_BSEV }, 601 { .con_id = "pcie", .dev_id = "tegra-pcie", .dt_id = TEGRA30_CLK_PCIE }, 602 { .con_id = "afi", .dev_id = "tegra-pcie", .dt_id = TEGRA30_CLK_AFI }, 604 { .con_id = "fuse_burn", .dev_id = "fuse-tegra", .dt_id = TEGRA30_CLK_FUSE_BURN }, [all …]
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/linux/drivers/soc/tegra/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 4 # 32-bit ARM SoCs 25 bool "Enable support for Tegra30 family" 63 # 64-bit ARM SoCs 75 Tegra124's "4+1" Cortex-A15 CPU complex. 85 the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53 88 and providing 256 CUDA cores. It supports hardware-accelerated en- 93 controllers, such as GPIO, I2C, SPI, SDHCI, PCIe, SATA and XHCI, to 106 combination of Denver and Cortex-A57 CPU cores and a GPU based on 107 the Pascal architecture. It contains an ADSP with a Cortex-A9 CPU [all …]
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