Lines Matching +full:tegra30 +full:- +full:i2c
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 #include "tegra30.dtsi"
16 avdd-pexa-supply = <&vdd2_reg>;
17 avdd-pexb-supply = <&vdd2_reg>;
18 avdd-pex-pll-supply = <&vdd2_reg>;
19 avdd-plle-supply = <&ldo6_reg>;
20 hvdd-pex-supply = <®_module_3v3>;
21 vddio-pex-ctl-supply = <®_module_3v3>;
22 vdd-pexa-supply = <&vdd2_reg>;
23 vdd-pexb-supply = <&vdd2_reg>;
27 nvidia,num-lanes = <4>;
32 nvidia,num-lanes = <1>;
35 /* I210/I211 Gigabit Ethernet Controller (on-module) */
38 nvidia,num-lanes = <1>;
42 local-mac-address = [00 00 00 00 00 00];
49 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
50 nvidia,hpd-gpio =
52 pll-supply = <®_1v8_avdd_hdmi_pll>;
53 vdd-supply = <®_3v3_avdd_hdmi>;
58 pinctrl-names = "default";
59 pinctrl-0 = <&state_default>;
62 /* Analogue Audio (On-module) */
63 clk1-out-pw4 {
68 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
70 dap3-fs-pp0 {
86 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
90 uart3-rts-n-pc0 {
95 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
98 uart3-cts-n-pa1 {
103 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
107 spi2-cs0-n-px3 {
117 spi2-cs1-n-pw2 {
122 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
126 gmi-a16-pj7 {
134 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
137 spi2-cs2-n-pw3 {
142 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
146 clk1-req-pee2 {
152 clk2-out-pw5 {
157 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
159 dap1-fs-pn0 {
170 kb-col0-pq0 {
182 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
190 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
194 hdmi-cec-pee3 {
199 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
200 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
202 hdmi-int-pn7 {
207 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
211 gen1-i2c-scl-pc4 {
217 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
218 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
222 ddc-scl-pv4 {
228 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
232 cam-i2c-scl-pbb1 {
238 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
239 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
243 lcd-d0-pe0 {
275 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
279 sdmmc3-clk-pa6 {
285 sdmmc3-dat0-pb7 {
305 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
309 cam-mclk-pcc0 {
314 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
316 vi-vsync-pd6 {
335 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
338 kb-col2-pq2 {
346 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
348 kb-row0-pr0 {
356 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
358 kb-row5-pr5 {
365 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
368 * VI level-shifter direction
369 * (pull-down => default direction input)
371 vi-mclk-pt1 {
376 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
412 gmi-rst-n-pi4 {
420 pex-l0-prsnt-n-pdd0 {
425 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
429 sdmmc1-clk-pz0 {
435 sdmmc1-cmd-pz1 {
446 clk2-req-pcc5 {
451 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
455 spdif-out-pk5 {
461 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
465 spi1-sck-px5 {
476 lcd-sck-pz4 {
487 * Apalis TS (Low-speed type specific)
490 kb-col5-pq5 {
495 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
497 kb-col6-pq6 {
505 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
509 ulpi-data0 {
524 ulpi-clk-py0 {
535 uart2-rxd-pc3 {
544 uart3-rxd-pw7 {
553 pex-l0-rst-n-pdd1 {
558 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
562 pex-l0-clkreq-n-pdd2 {
567 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
571 gen2-i2c-scl-pt5 {
574 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
580 gen2-i2c-sda-pt6 {
583 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
586 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
590 crt-hsync-pv6 {
596 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
605 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
608 /* eMMC (On-module) */
609 sdmmc4-clk-pcc4 {
616 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
618 sdmmc4-dat0-paa0 {
630 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
634 uart2-cts-n-pj5 {
639 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
642 /* LAN i210/i211 DEV_OFF_N, PE_RST_N (On-module) */
643 pex-l2-prsnt-n-pdd7 {
649 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
651 /* LAN i210/i211 PE_WAKE_N, SDP3 (On-module) */
652 pex-wake-n-pdd3 {
658 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
660 /* LAN i210/i211 SMB_ALERT_N (On-module) */
661 sys-clk-req-pz5 {
666 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
678 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
688 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
692 clk-32k-out-pa0 {
703 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
705 dap2-fs-pa2 {
719 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
721 gmi-ad0-pg0 {
753 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
755 gmi-cs0-n-pj0 {
762 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
764 gmi-cs6-n-pi3 {
769 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
771 gmi-cs7-n-pi6 {
776 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
778 lcd-pwr0-pb2 {
785 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
787 uart2-rts-n-pj6 {
792 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
795 /* Power I2C (On-module) */
796 pwr-i2c-scl-pz6 {
802 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
803 nvidia,open-drain = <TEGRA_PIN_ENABLE>;
807 * THERMD_ALERT#, unlatched I2C address pin of LM95245
811 lcd-dc1-pd2 {
816 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
819 /* TOUCH_PEN_INT# (On-module) */
825 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
831 compatible = "nvidia,tegra30-hsuart";
832 reset-names = "serial";
833 /delete-property/ reg-shift;
837 compatible = "nvidia,tegra30-hsuart";
838 reset-names = "serial";
839 /delete-property/ reg-shift;
843 compatible = "nvidia,tegra30-hsuart";
844 reset-names = "serial";
845 /delete-property/ reg-shift;
848 hdmi_ddc: i2c@7000c700 {
849 clock-frequency = <10000>;
853 * PWR_I2C: power I2C to audio codec, PMIC, temperature sensor and
856 i2c@7000d000 {
858 clock-frequency = <100000>;
864 #sound-dai-cells = <0>;
865 VDDA-supply = <®_module_3v3_audio>;
866 VDDD-supply = <®_1v8_vio>;
867 VDDIO-supply = <®_module_3v3>;
876 #interrupt-cells = <2>;
877 interrupt-controller;
879 ti,system-power-controller;
881 #gpio-cells = <2>;
882 gpio-controller;
884 vcc1-supply = <®_module_3v3>;
885 vcc2-supply = <®_module_3v3>;
886 vcc3-supply = <®_1v8_vio>;
887 vcc4-supply = <®_module_3v3>;
888 vcc5-supply = <®_module_3v3>;
889 vcc6-supply = <®_1v8_vio>;
890 vcc7-supply = <®_5v0_charge_pump>;
891 vccio-supply = <®_module_3v3>;
895 regulator-name = "+V1.35_VDDIO_DDR";
896 regulator-min-microvolt = <1350000>;
897 regulator-max-microvolt = <1350000>;
898 regulator-always-on;
902 regulator-name = "+V1.05";
903 regulator-min-microvolt = <1050000>;
904 regulator-max-microvolt = <1050000>;
908 regulator-name = "+V1.0_VDD_CPU";
909 regulator-min-microvolt = <1150000>;
910 regulator-max-microvolt = <1150000>;
911 regulator-always-on;
915 regulator-name = "+V1.8";
916 regulator-min-microvolt = <1800000>;
917 regulator-max-microvolt = <1800000>;
918 regulator-always-on;
926 regulator-name = "+VDDIO_SDMMC3_1V8";
927 regulator-min-microvolt = <1800000>;
928 regulator-max-microvolt = <1800000>;
929 regulator-always-on;
938 regulator-name = "EN_+V3.3";
939 regulator-min-microvolt = <3300000>;
940 regulator-max-microvolt = <3300000>;
941 regulator-always-on;
945 regulator-name = "+V1.2_CSI";
946 regulator-min-microvolt = <1200000>;
947 regulator-max-microvolt = <1200000>;
951 regulator-name = "+V1.2_VDD_RTC";
952 regulator-min-microvolt = <1200000>;
953 regulator-max-microvolt = <1200000>;
954 regulator-always-on;
962 regulator-name = "+V2.8_AVDD_VDAC";
963 regulator-min-microvolt = <2800000>;
964 regulator-max-microvolt = <2800000>;
965 regulator-always-on;
974 regulator-name = "+V1.05_AVDD_PLLE";
975 regulator-min-microvolt = <1100000>;
976 regulator-max-microvolt = <1100000>;
980 regulator-name = "+V1.2_AVDD_PLL";
981 regulator-min-microvolt = <1200000>;
982 regulator-max-microvolt = <1200000>;
983 regulator-always-on;
987 regulator-name = "+V1.0_VDD_DDR_HS";
988 regulator-min-microvolt = <1000000>;
989 regulator-max-microvolt = <1000000>;
990 regulator-always-on;
999 irq-gpio = <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
1002 irq-trigger = <0x1>;
1004 st,adc-freq = <1>;
1005 /* 12-bit ADC */
1006 st,mod-12b = <1>;
1008 st,ref-sel = <0>;
1010 st,sample-time = <4>;
1013 compatible = "st,stmpe-adc";
1014 /* forbid to use ADC channels 3-0 (touch) */
1015 st,norequest-mask = <0x0F>;
1019 compatible = "st,stmpe-ts";
1021 st,ave-ctrl = <3>;
1023 st,fraction-z = <7>;
1028 st,i-drive = <1>;
1032 st,touch-det-delay = <5>;
1040 temp-sensor@4c {
1050 regulator-name = "tps62362-vout";
1051 regulator-min-microvolt = <900000>;
1052 regulator-max-microvolt = <1400000>;
1053 regulator-boot-on;
1054 regulator-always-on;
1061 spi-max-frequency = <10000000>;
1067 interrupt-parent = <&gpio>;
1069 spi-max-frequency = <10000000>;
1076 spi-max-frequency = <10000000>;
1082 interrupt-parent = <&gpio>;
1084 spi-max-frequency = <10000000>;
1089 nvidia,invert-interrupt;
1090 nvidia,suspend-mode = <1>;
1091 nvidia,cpu-pwr-good-time = <5000>;
1092 nvidia,cpu-pwr-off-time = <5000>;
1093 nvidia,core-pwr-good-time = <3845 3845>;
1094 nvidia,core-pwr-off-time = <0>;
1095 nvidia,core-power-req-active-high;
1096 nvidia,sys-clock-req-active-high;
1099 i2c-thermtrip {
1100 nvidia,i2c-controller-id = <4>;
1101 nvidia,bus-addr = <0x2d>;
1102 nvidia,reg-addr = <0x3f>;
1103 nvidia,reg-data = <0x1>;
1120 bus-width = <8>;
1121 non-removable;
1122 vmmc-supply = <®_module_3v3>; /* VCC */
1123 vqmmc-supply = <®_1v8_vio>; /* VCCQ */
1124 mmc-ddr-1_8v;
1127 clk16m: clock-osc4 {
1128 compatible = "fixed-clock";
1129 #clock-cells = <0>;
1130 clock-frequency = <16000000>;
1133 clk32k_in: clock-xtal1 {
1134 compatible = "fixed-clock";
1135 #clock-cells = <0>;
1136 clock-frequency = <32768>;
1139 reg_1v8_avdd_hdmi_pll: regulator-1v8-avdd-hdmi-pll {
1140 compatible = "regulator-fixed";
1141 regulator-name = "+V1.8_AVDD_HDMI_PLL";
1142 regulator-min-microvolt = <1800000>;
1143 regulator-max-microvolt = <1800000>;
1144 enable-active-high;
1146 vin-supply = <®_1v8_vio>;
1149 reg_3v3_avdd_hdmi: regulator-3v3-avdd-hdmi {
1150 compatible = "regulator-fixed";
1151 regulator-name = "+V3.3_AVDD_HDMI";
1152 regulator-min-microvolt = <3300000>;
1153 regulator-max-microvolt = <3300000>;
1154 enable-active-high;
1156 vin-supply = <®_module_3v3>;
1159 reg_5v0_charge_pump: regulator-5v0-charge-pump {
1160 compatible = "regulator-fixed";
1161 regulator-name = "+V5.0";
1162 regulator-min-microvolt = <5000000>;
1163 regulator-max-microvolt = <5000000>;
1164 regulator-always-on;
1167 reg_module_3v3: regulator-module-3v3 {
1168 compatible = "regulator-fixed";
1169 regulator-name = "+V3.3";
1170 regulator-min-microvolt = <3300000>;
1171 regulator-max-microvolt = <3300000>;
1172 regulator-always-on;
1175 reg_module_3v3_audio: regulator-module-3v3-audio {
1176 compatible = "regulator-fixed";
1177 regulator-name = "+V3.3_AUDIO_AVDD_S";
1178 regulator-min-microvolt = <3300000>;
1179 regulator-max-microvolt = <3300000>;
1180 regulator-always-on;
1184 compatible = "toradex,tegra-audio-sgtl5000-apalis_t30",
1185 "nvidia,tegra-audio-sgtl5000";
1187 nvidia,audio-routing =
1191 nvidia,i2s-controller = <&tegra_i2s2>;
1192 nvidia,audio-codec = <&sgtl5000>;
1196 clock-names = "pll_a", "pll_a_out0", "mclk";
1198 assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
1201 assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,