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/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Dnvidia,tegra20-i2c.txt1 NVIDIA Tegra20/Tegra30/Tegra114 I2C controller driver.
4 - compatible : For Tegra20, must be one of "nvidia,tegra20-i2c-dvc" or
5 "nvidia,tegra20-i2c". For Tegra30, must be "nvidia,tegra30-i2c".
6 For Tegra114, must be "nvidia,tegra114-i2c". Otherwise, must be
7 "nvidia,<chip>-i2c", plus at least one of the above, where <chip> is
10 nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C
11 controller. This only support master mode of I2C communication. Register
12 interface/offset and interrupts handling are different than generic I2C
13 controller. Driver of DVC I2C controller is only compatible with
14 "nvidia,tegra20-i2c-dvc".
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H A Dnvidia,tegra20-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Thierry Reding <thierry.reding@gmail.com>
9 - Jon Hunter <jonathanh@nvidia.com>
11 title: NVIDIA Tegra I2C controller driver
16 - description: Tegra20 has 4 generic I2C controller. This can support
17 master and slave mode of I2C communication. The i2c-tegra driver
18 only support master mode of I2C communication. Driver of I2C
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/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra20.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra20-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra20
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H A Dtegra20-acer-a500-picasso.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-binding
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H A Dtegra30.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra30-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra30-mc.h>
5 #include <dt-binding
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H A Dtegra20-paz00.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
7 #include "tegra20.dtsi"
8 #include "tegra20-cpu-opp.dtsi"
9 #include "tegra20-cpu-opp-microvolt.dtsi"
13 compatible = "compal,paz00", "nvidia,tegra20";
18 rtc0 = "/i2c@7000d000/tps6586x@34";
25 stdout-path = "serial0:115200n8";
[all …]
H A Dtegra20-asus-tf101.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/atmel-maxtouch.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-binding
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H A Dtegra20-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra20.dtsi"
22 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
23 nvidia,hpd-gpio =
25 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
26 vdd-supply = <&reg_3v3_avdd_hdmi>;
31 lan-reset-n-hog {
32 gpio-hog;
34 output-high;
35 line-name = "LAN_RESET#";
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H A Dtegra114.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra114-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra114-mc.h>
5 #include <dt-binding
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H A Dtegra20-ventana.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/thermal/thermal.h>
6 #include "tegra20.dtsi"
7 #include "tegra20-cpu-op
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H A Dtegra20-colibri-iris.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra20-colibri.dtsi"
9 compatible = "toradex,colibri_t20-iris", "toradex,colibri_t20",
10 "nvidia,tegra20";
13 rtc0 = "/i2c
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H A Dtegra20-colibri-eval-v3.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra20-colibri.dtsi"
9 compatible = "toradex,colibri_t20-eval-v3", "toradex,colibri_t20",
10 "nvidia,tegra20";
[all...]
H A Dtegra124.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-binding
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H A Dtegra20-trimslice.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/leds/common.h>
6 #include "tegra20.dtsi"
7 #include "tegra20-cpu-opp.dtsi"
11 compatible = "compulab,trimslice", "nvidia,tegra20";
14 rtc0 = "/i2c@7000c500/rtc@56";
20 stdout-path = "serial0:115200n8";
31 vdd-supply = <&hdmi_vdd_reg>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/tegra/
H A Dnvidia,tegra20-host1x.txt4 - compatible: "nvidia,tegra<chip>-host1x"
5 - reg: Physical base address and length of the controller's registers.
6 For pre-Tegra186, one entry describing the whole register area.
7 For Tegra186, one entry for each entry in reg-names:
8 "vm" - VM region assigned to Linux
9 "hypervisor" - Hypervisor region (only if Linux acts as hypervisor)
10 - interrupts: The interrupt outputs from the controller.
11 - #address-cells: The number of cells used to represent physical base addresses
13 - #size-cells: The number of cells used to represent the size of an address
15 - ranges: The mapping of the host1x address space to the CPU address space.
[all …]
H A Dnvidia,tegra20-dc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^dc@[0-9a-f]+$"
19 - enum:
20 - nvidia,tegra20-dc
21 - nvidia,tegra30-dc
[all …]
H A Dnvidia,tegra20-hdmi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-hdmi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^hdmi@[0-9a-f]+$"
19 - enum:
20 - nvidia,tegra20-hdmi
21 - nvidia,tegra30-hdmi
[all …]
H A Dnvidia,tegra20-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - enum:
17 - nvidia,tegra20-dsi
18 - nvidia,tegra30-dsi
19 - nvidia,tegra114-dsi
[all …]
H A Dnvidia,tegra20-vi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-vi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^vi@[0-9a-f]+$"
19 - const: nvidia,tegra20-vi
20 - const: nvidia,tegra30-vi
21 - const: nvidia,tegra114-vi
[all …]
H A Dnvidia,tegra20-host1x.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-host1x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 description: The host1x top-level node defines a number of children, each
19 - enum:
20 - nvidia,tegra20-host1x
21 - nvidia,tegra30-host1x
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/freebsd/sys/contrib/device-tree/Bindings/arm/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
[all …]
H A Dnvidia,nvec.txt4 - compatible : should be "nvidia,nvec".
5 - reg : the iomem of the i2c slave controller
6 - interrupts : the interrupt line of the i2c slave controller
7 - clock-frequency : the frequency of the i2c bus
8 - gpios : the gpio used for ec request
9 - slave-addr: the i2c address of the slave controller
10 - clocks : Must contain an entry for each entry in clock-names.
11 See ../clocks/clock-bindings.txt for details.
12 - clock-names : Must include the following entries:
13 Tegra20/Tegra30:
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/freebsd/sys/contrib/device-tree/Bindings/soc/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra132.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra132-peripherals-opp.dtsi"
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dnvidia,tegra124-dpaux-padctl.txt5 which can be assigned to either the DPAUX channel or to an I2C
8 This document defines the device-specific binding for the DPAUX pad
9 controller. Refer to pinctrl-bindings.txt in this directory for generic
11 the binding document ../display/tegra/nvidia,tegra20-host1x.txt for more
15 -----------
18 from the pinctrl-bindings.txt document.
27 - groups: Must be "dpaux-io"
28 - function: Must be either "aux", "i2c" or "off".
31 --------
36 state_dpaux_aux: pinmux-aux {
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