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Searched +full:tegra194 +full:- +full:display (Results 1 – 15 of 15) sorted by relevance

/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra186-display.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-display.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 (and later) Display Hub
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^display-hub@[0-9a-f]+$"
19 - nvidia,tegra186-display
20 - nvidia,tegra194-display
[all …]
H A Dnvidia,tegra186-dc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra186-dc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra186 (and later) Display Controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^display@[0-9a-f]+$"
19 - nvidia,tegra186-dc
20 - nvidia,tegra194-dc
[all …]
H A Dnvidia,tegra124-sor.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-sor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
19 pattern: "^sor@[0-9a-f]+$"
23 - enum:
24 - nvidia,tegra124-sor
25 - nvidia,tegra210-sor
[all …]
H A Dnvidia,tegra124-dpaux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 The Tegra Display Port Auxiliary (DPAUX) pad controller manages two
24 pattern: "^dpaux@[0-9a-f]+$"
28 - enum:
29 - nvidia,tegra124-dpaux
[all …]
H A Dnvidia,tegra124-vic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-vic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^vic@[0-9a-f]+$"
19 - enum:
20 - nvidia,tegra124-vic
21 - nvidia,tegra210-vic
[all …]
H A Dnvidia,tegra20-host1x.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-host1x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 description: The host1x top-level node defines a number of children, each
19 - enum:
20 - nvidia,tegra20-host1x
21 - nvidia,tegra30-host1x
[all …]
H A Dnvidia,tegra20-vi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-vi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 pattern: "^vi@[0-9a-f]+$"
19 - const: nvidia,tegra20-vi
20 - const: nvidia,tegra30-vi
21 - const: nvidia,tegra114-vi
[all …]
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
[all …]
H A Dtegra194-p2972-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra194-p2888.dtsi"
11 compatible = "nvidia,p2972-0000", "nvidia,tegra194";
24 #address-cells = <1>;
25 #size-cells = <0>;
31 remote-endpoint = <&xbar_i2s1_ep>;
39 dai-format = "i2s";
[all …]
H A Dtegra194-p3509-0000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
19 #address-cells = <1>;
20 #size-cells = <0>;
26 remote-endpoint = <&xbar_i2s3_ep>;
34 dai-format = "i2s";
45 #address-cells = <1>;
46 #size-cells = <0>;
[all …]
/linux/drivers/iommu/arm/arm-smmu/
H A Darm-smmu-nvidia.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // Copyright (C) 2019-2020 NVIDIA CORPORATION. All rights reserved.
12 #include "arm-smmu.h"
15 * Tegra194 has three ARM MMU-500 Instances.
18 * non-isochronous HW devices.
23 * memory client. This is necessary to allow for use-case such as seamlessly
24 * handing over the display controller configuration from the firmware to the
52 return nvidia_smmu->bases[inst] + (page << smmu->pgshift); in nvidia_smmu_page()
69 for (i = 0; i < nvidia->num_instances; i++) { in nvidia_smmu_write_reg()
90 for (i = 0; i < nvidia->num_instances; i++) { in nvidia_smmu_write_reg64()
[all …]
/linux/sound/hda/controllers/
H A Dtegra.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
67 * Tegra194 does not reflect correct number of SDO lines. Below macro
97 "Automatic power-saving timeout (in seconds, 0 = disable).");
109 v = readl(hda->regs + HDA_IPFS_CONFIG); in hda_tegra_init()
111 writel(v, hda->regs + HDA_IPFS_CONFIG); in hda_tegra_init()
114 v = readl(hda->regs + HDA_CFG_CMD); in hda_tegra_init()
118 writel(v, hda->regs + HDA_CFG_CMD); in hda_tegra_init()
120 writel(HDA_BAR0_INIT_PROGRAM, hda->regs + HDA_CFG_BAR0); in hda_tegra_init()
121 writel(HDA_BAR0_FINAL_PROGRAM, hda->regs + HDA_CFG_BAR0); in hda_tegra_init()
[all …]
/linux/drivers/gpu/drm/tegra/
H A Ddrm.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
28 #include <asm/dma-iommu.h>
76 struct drm_device *drm = old_state->dev; in tegra_atomic_commit_tail()
77 struct tegra_drm *tegra = drm->dev_private; in tegra_atomic_commit_tail()
79 if (tegra->hub) { in tegra_atomic_commit_tail()
108 return -ENOMEM; in tegra_drm_open()
110 idr_init_base(&fpriv->legacy_contexts, 1); in tegra_drm_open()
111 xa_init_flags(&fpriv->contexts, XA_FLAGS_ALLOC1); in tegra_drm_open()
112 xa_init(&fpriv->syncpoints); in tegra_drm_open()
[all …]
/linux/drivers/dma/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
96 tristate "Arm DMA-350 support"
101 Enable support for the Arm DMA-350 controller.
119 tristate "Analog Devices AXI-DMAC DMA support"
125 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA
161 tristate "SA-11x0 DMA support"
166 Support the DMA engine found on Intel StrongARM SA-1100 and
167 SA-1110 SoCs. This DMA engine can only be used with on-chip
227 This module can be found on Freescale Vybrid and LS-1 SoCs.
270 Enable support for the IMG multi-threaded DMA controller (MDC).
[all …]
/linux/drivers/soc/tegra/
H A Dpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2018-2024, NVIDIA CORPORATION. All rights reserved.
12 #define pr_fmt(fmt) "tegra-pmc: " fmt
14 #include <linux/arm-smccc.h>
16 #include <linux/clk-provider.h>
18 #include <linux/clk/clk-conf.h>
37 #include <linux/pinctrl/pinconf-generic.h>
57 #include <dt-bindings/interrupt-controller/arm-gic.h>
58 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
59 #include <dt-bindings/gpio/tegra186-gpio.h>
[all …]