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Searched +full:tegra124 +full:- +full:cec (Results 1 – 11 of 11) sorted by relevance

/linux/Documentation/devicetree/bindings/media/cec/
H A Dnvidia,tegra114-cec.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/media/cec/nvidia,tegra114-cec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra HDMI CEC
10 - Hans Verkuil <hverkuil-cisco@xs4all.nl>
13 - $ref: cec-common.yaml#
18 - nvidia,tegra114-cec
19 - nvidia,tegra124-cec
20 - nvidia,tegra210-cec
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra124-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra124-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra124 Pinmux Controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 description: The Tegra124 pinctrl binding is very similar to the Tegra20 and
14 Tegra30 pinctrl binding, as described in nvidia,tegra20-pinmux.yaml and
15 nvidia,tegra30-pinmux.yaml. In fact, this document assumes that binding as a
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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra124-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra124-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/reset/tegra124-car.h>
8 #include <dt-bindings/thermal/tegra124-soctherm.h>
9 #include <dt-bindings/soc/tegra-pmc.h>
11 #include "tegra124-peripherals-opp.dtsi"
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H A Dtegra124-jetson-tk1.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra124.dtsi"
7 #include "tegra124-jetson-tk1-emc.dtsi"
10 model = "NVIDIA Tegra124 Jetson TK1";
11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
17 /* This order keeps the mapping DB9 connector <-> ttyS0 */
24 stdout-path = "serial0:115200n8";
34 avddio-pex-supply = <&vdd_1v05_run>;
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H A Dtegra124-apalis-v1.2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
6 #include "tegra124.dtsi"
7 #include "tegra124-apalis-emc.dtsi"
21 avddio-pex-supply = <&reg_1v05_vdd>;
22 avdd-pex-pll-supply = <&reg_1v05_vdd>;
23 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
24 dvddio-pex-supply = <&reg_1v05_vdd>;
25 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
26 hvdd-pex-supply = <&reg_module_3v3>;
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H A Dtegra124-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
6 #include "tegra124.dtsi"
7 #include "tegra124-apalis-emc.dtsi"
20 avddio-pex-supply = <&reg_1v05_vdd>;
21 avdd-pex-pll-supply = <&reg_1v05_vdd>;
22 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
23 dvddio-pex-supply = <&reg_1v05_vdd>;
24 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
25 hvdd-pex-supply = <&reg_module_3v3>;
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H A Dtegra124-venice2.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra124.dtsi"
8 model = "NVIDIA Tegra124 Venice2";
9 compatible = "nvidia,venice2", "nvidia,tegra124";
18 stdout-path = "serial0:115200n8";
29 vdd-supply = <&vdd_3v3_hdmi>;
30 pll-supply = <&vdd_hdmi_pll>;
31 hdmi-supply = <&vdd_5v0_hdmi>;
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H A Dtegra124-nyan-blaze.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra124-nyan.dtsi"
6 #include "tegra124-nyan-blaze-emc.dtsi"
10 compatible = "google,nyan-blaze-rev10", "google,nyan-blaze-rev9",
11 "google,nyan-blaze-rev8", "google,nyan-blaze-rev7",
12 "google,nyan-blaze-rev6", "google,nyan-blaze-rev5",
13 "google,nyan-blaze-rev4", "google,nyan-blaze-rev3",
14 "google,nyan-blaze-rev2", "google,nyan-blaze-rev1",
15 "google,nyan-blaze-rev0", "google,nyan-blaze",
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H A Dtegra124-nyan-big.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra124-nyan.dtsi"
6 #include "tegra124-nyan-big-emc.dtsi"
9 model = "Acer Chromebook 13 CB5-311";
10 compatible = "google,nyan-big-rev7", "google,nyan-big-rev6",
11 "google,nyan-big-rev5", "google,nyan-big-rev4",
12 "google,nyan-big-rev3", "google,nyan-big-rev2",
13 "google,nyan-big-rev1", "google,nyan-big-rev0",
14 "google,nyan-big", "google,nyan", "nvidia,tegra124";
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/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra124.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Pinctrl data for the NVIDIA Tegra124 pinmux
7 * Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.
16 #include "pinctrl-tegra.h"
208 /* All non-GPIO pins follow */
212 /* Non-GPIO pins */
1619 FUNCTION(cec),
1709 #define DRV_PINGROUP_REG(r) ((r) - DRV_PINGROUP_REG_A)
1710 #define PINGROUP_REG(r) ((r) - PINGROUP_REG_A)
1711 #define MIPI_PAD_CTRL_PINGROUP_REG_Y(r) ((r) - MIPI_PAD_CTRL_PINGROUP_REG_A)
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/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132-norrin.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
9 compatible = "nvidia,norrin", "nvidia,tegra132", "nvidia,tegra124";
18 stdout-path = "serial0:115200n8";
30 vdd-supply = <&vdd_3v3_hdmi>;
31 pll-supply = <&vdd_hdmi_pll>;
32 hdmi-supply = <&vdd_5v0_hdmi>;
34 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
35 nvidia,hpd-gpio =
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