Searched +full:tegra114 +full:- +full:mipi (Results 1 – 11 of 11) sorted by relevance
/linux/Documentation/devicetree/bindings/display/tegra/ |
H A D | nvidia,tegra114-mipi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra114-mipi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra MIPI pad calibration controller 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 pattern: "^mipi@[0-9a-f]+$" 19 - nvidia,tegra114-mipi 20 - nvidia,tegra210-mipi [all …]
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H A D | nvidia,tegra20-dsi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dsi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 16 - enum: 17 - nvidia,tegra20-dsi 18 - nvidia,tegra30-dsi 19 - nvidia,tegra114-dsi [all …]
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/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra114.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra114-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra114-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/soc/tegra-pmc.h> 10 compatible = "nvidia,tegra114"; 11 interrupt-parent = <&lic>; 12 #address-cells = <1>; [all …]
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H A D | tegra124.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra124-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra124-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/reset/tegra124-car.h> 8 #include <dt-bindings/thermal/tegra124-soctherm.h> 9 #include <dt-bindings/soc/tegra-pmc.h> 11 #include "tegra124-peripherals-opp.dtsi" [all …]
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/linux/Documentation/devicetree/bindings/soc/tegra/ |
H A D | nvidia,tegra20-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jonathan Hunter <jonathanh@nvidia.com> 16 - nvidia,tegra20-pmc 17 - nvidia,tegra30-pmc 18 - nvidia,tegra114-pmc 19 - nvidia,tegra124-pmc [all …]
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/linux/drivers/gpu/host1x/ |
H A D | mipi.c | 131 struct tegra_mipi *mipi; member 136 static inline u32 tegra_mipi_readl(struct tegra_mipi *mipi, in tegra_mipi_readl() argument 139 return readl(mipi->regs + (offset << 2)); in tegra_mipi_readl() 142 static inline void tegra_mipi_writel(struct tegra_mipi *mipi, u32 value, in tegra_mipi_writel() argument 145 writel(value, mipi->regs + (offset << 2)); in tegra_mipi_writel() 148 static int tegra_mipi_power_up(struct tegra_mipi *mipi) in tegra_mipi_power_up() argument 153 err = clk_enable(mipi->clk); in tegra_mipi_power_up() 157 value = tegra_mipi_readl(mipi, MIPI_CAL_BIAS_PAD_CFG0); in tegra_mipi_power_up() 160 if (mipi->soc->needs_vclamp_ref) in tegra_mipi_power_up() 163 tegra_mipi_writel(mipi, value, MIPI_CAL_BIAS_PAD_CFG0); in tegra_mipi_power_up() [all …]
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/linux/arch/arm64/boot/dts/nvidia/ |
H A D | tegra132.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra124-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra124-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/thermal/tegra124-soctherm.h> 9 #include <dt-bindings/soc/tegra-pmc.h> 11 #include "tegra132-peripherals-opp.dtsi" [all …]
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/linux/drivers/gpu/drm/tegra/ |
H A D | dsi.c | 1 // SPDX-License-Identifier: GPL-2.0-only 30 #include "mipi-phy.h" 73 struct tegra_mipi_device *mipi; member 81 /* for ganged-mode support */ 104 return to_dsi_state(dsi->output.connector.state); in tegra_dsi_get_state() 109 u32 value = readl(dsi->regs + (offset << 2)); in tegra_dsi_readl() 111 trace_dsi_readl(dsi->dev, offset, value); in tegra_dsi_readl() 119 trace_dsi_writel(dsi->dev, offset, value); in tegra_dsi_writel() 120 writel(value, dsi->regs + (offset << 2)); in tegra_dsi_writel() 201 struct drm_info_node *node = s->private; in tegra_dsi_show_regs() [all …]
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/linux/drivers/clk/tegra/ |
H A D | clk-tegra114.c | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <linux/clk-provider.h> 13 #include <dt-bindings/clock/tegra114-car.h> 16 #include "clk-id.h" 20 #define CPU_FINETRIM_DR 0x4d8 /* rise->rise prop dly A */ 21 #define CPU_FINETRIM_R 0x4e4 /* rise->rise prop dly inc A */ 613 #define MASK(x) (BIT(x) - 1) 870 { .dev_id = "rtc-tegra", .dt_id = TEGRA114_CLK_RTC }, 1059 clk = tegra_clk_register_periph_gate("mipi-cal", "clk_m", 0, clk_base, in tegra114_periph_clk_init() 1067 clks[data->clk_id] = clk; in tegra114_periph_clk_init() [all …]
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/linux/drivers/soc/tegra/ |
H A D | pmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * Copyright (c) 2018-2024, NVIDIA CORPORATION. All rights reserved. 12 #define pr_fmt(fmt) "tegra-pmc: " fmt 14 #include <linux/arm-smccc.h> 16 #include <linux/clk-provider.h> 18 #include <linux/clk/clk-conf.h> 37 #include <linux/pinctrl/pinconf-generic.h> 56 #include <dt-bindings/interrupt-controller/arm-gic.h> 57 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 58 #include <dt-bindings/gpio/tegra186-gpio.h> [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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