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/linux/drivers/soc/qcom/
H A Drpmh-rsc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2023-2024, Qualcomm Innovation Center, Inc. All rights reserved.
31 #include <soc/qcom/cmd-db.h>
32 #include <soc/qcom/tcs.h>
33 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
35 #include "rpmh-internal.h"
38 #include "trace-rpmh.h"
71 /* DRV TCS Configuration Information Register */
77 /* Offsets for CONTROL TCS Registers */
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H A Drpmh-internal.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
12 #include <soc/qcom/tcs.h>
23 * struct tcs_group: group of Trigger Command Sets (TCS) to send state requests
27 * @type: Type of the TCS in this group - active, sleep, wake.
29 * @offset: Start of the TCS group relative to the TCSes in the RSC.
31 * @ncpt: Number of commands in each TCS.
32 * @req: Requests that are sent from the TCS; only used for ACTIVE_ONLY
33 * transfers (could be on a wake/sleep TCS if we are borrowing for
35 * Start: grab drv->lock, set req, set tcs_in_use, drop drv->lock,
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/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,rpmh-rsc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/soc/qcom/qcom,rpmh-rsc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
15 resources can be written to the Trigger Command Set (TCS) registers and
16 using a (addr, val) pair and triggered. Messages in the TCS are then sent in
25 A TCS may be triggered from Linux or triggered by the F/W after all the CPUs
26 have powered off to facilitate idle power saving. TCS could be classified as::
27 ACTIVE - Triggered by Linux
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/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_lib.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
9 * ixgbe_cache_ring_dcb_sriov - Descriptor ring to register mapping for SR-IOV
12 * Cache the descriptor ring offsets for SR-IOV to the assigned rings. It
20 struct ixgbe_ring_feature *fcoe = &adapter->ring_feature[RING_F_FCOE]; in ixgbe_cache_ring_dcb_sriov()
22 struct ixgbe_ring_feature *vmdq = &adapter->ring_feature[RING_F_VMDQ]; in ixgbe_cache_ring_dcb_sriov()
25 u8 tcs = adapter->hw_tcs; in ixgbe_cache_ring_dcb_sriov() local
28 if (tcs <= 1) in ixgbe_cache_ring_dcb_sriov()
32 if (!(adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)) in ixgbe_cache_ring_dcb_sriov()
35 /* start at VMDq register offset for SR-IOV enabled setups */ in ixgbe_cache_ring_dcb_sriov()
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H A Dixgbe_82598.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2018 Intel Corporation. */
25 * ixgbe_set_pcie_completion_timeout - set pci-e completion timeout
30 * than the 10ms recommended by the pci-e spec. To address this we need to
39 if (ixgbe_removed(hw->hw_addr)) in ixgbe_set_pcie_completion_timeout()
71 struct ixgbe_mac_info *mac = &hw->mac; in ixgbe_get_invariants_82598()
76 mac->mcft_size = IXGBE_82598_MC_TBL_SIZE; in ixgbe_get_invariants_82598()
77 mac->vft_size = IXGBE_82598_VFT_TBL_SIZE; in ixgbe_get_invariants_82598()
78 mac->num_rar_entries = IXGBE_82598_RAR_ENTRIES; in ixgbe_get_invariants_82598()
79 mac->rx_pb_size = IXGBE_82598_RX_PB_SIZE; in ixgbe_get_invariants_82598()
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/linux/tools/testing/selftests/sgx/
H A Dmain.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2016-20 Intel Corporation. */
30 * instructions (eg. ENCLU[EACCEPT] and ENCLU[EMODPE]) holds meta-data
49 Elf64_Phdr *phdrtab = addr + ehdr->e_phoff; in vdso_get_dyntab()
52 for (i = 0; i < ehdr->e_phnum; i++) in vdso_get_dyntab()
74 symtab->elf_symtab = vdso_get_dyn(addr, dyntab, DT_SYMTAB); in vdso_get_symtab()
75 if (!symtab->elf_symtab) in vdso_get_symtab()
78 symtab->elf_symstrtab = vdso_get_dyn(addr, dyntab, DT_STRTAB); in vdso_get_symtab()
79 if (!symtab->elf_symstrtab) in vdso_get_symtab()
82 symtab->elf_hashtab = vdso_get_dyn(addr, dyntab, DT_HASH); in vdso_get_symtab()
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H A Dload.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2016-20 Intel Corporation. */
26 if (encl->encl_base) in encl_delete()
27 munmap((void *)encl->encl_base, encl->encl_size); in encl_delete()
29 if (encl->bin) in encl_delete()
30 munmap(encl->bin, encl->bin_size); in encl_delete()
32 if (encl->fd) in encl_delete()
33 close(encl->fd); in encl_delete()
35 if (encl->segment_tbl) { in encl_delete()
36 heap_seg = &encl->segment_tbl[encl->nr_segments - 1]; in encl_delete()
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/linux/arch/x86/include/uapi/asm/
H A Dsgx.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * Copyright(c) 2016-20 Intel Corporation.
12 * enum sgx_page_flags - page control flags
40 * struct sgx_enclave_create - parameter structure for the
49 * struct sgx_enclave_add_pages - parameter structure for the
52 * @offset: starting page offset
60 __u64 offset; member
68 * struct sgx_enclave_init - parameter structure for the
77 * struct sgx_enclave_provision - parameter structure for the
86 * struct sgx_enclave_restrict_permissions - parameters for ioctl
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/linux/arch/x86/include/asm/
H A Dsgx.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright(c) 2016-20 Intel Corporation.
49 * SGX_ENCLS_FAULT_FLAG - flag signifying an ENCLS return code is a trapnr
57 * convert all faults to -EFAULT.
67 * enum sgx_return_code - The return code type for ENCLS, ENCLU and ENCLV
87 /* The modulus size for 3072-bit RSA keys. */
91 * enum sgx_miscselect - additional information to an SSA frame
108 * enum sgx_attributes - the attributes field in &struct sgx_secs
111 * %SGX_ATTR_MODE64BIT: Tell that this a 64-bit enclave.
150 * struct sgx_secs - SGX Enclave Control Structure (SECS)
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/linux/Documentation/networking/device_drivers/ethernet/intel/
H A Diavf.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 2013-2018 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Additional Configurations
16 - Known Issues/Troubleshooting
17 - Support
30 The guest OS loading the iavf driver must support MSI-X interrupts.
53 ---------------------
58 # dmesg -n 8
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H A Di40e.rst1 .. SPDX-License-Identifier: GPL-2.0+
8 Copyright(c) 1999-2018 Intel Corporation.
13 - Overview
14 - Identifying Your Adapter
15 - Intel(R) Ethernet Flow Director
16 - Additional Configurations
17 - Known Issues
18 - Support
47 ----------------------
49 …intel.com/content/dam/www/public/us/en/documents/release-notes/xl710-ethernet-controller-feature-m…
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/linux/arch/x86/kernel/cpu/sgx/
H A Dioctl.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2016-20 Intel Corporation. */
28 if (!(encl->page_cnt % SGX_VA_SLOT_COUNT)) { in sgx_encl_grow()
31 return ERR_PTR(-ENOMEM); in sgx_encl_grow()
33 va_page->epc_page = sgx_alloc_va_page(reclaim); in sgx_encl_grow()
34 if (IS_ERR(va_page->epc_page)) { in sgx_encl_grow()
35 err = ERR_CAST(va_page->epc_page); in sgx_encl_grow()
40 WARN_ON_ONCE(encl->page_cnt % SGX_VA_SLOT_COUNT); in sgx_encl_grow()
42 encl->page_cnt++; in sgx_encl_grow()
48 encl->page_cnt--; in sgx_encl_shrink()
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/linux/include/soc/qcom/
H A Dtcs.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2016-2019, The Linux Foundation. All rights reserved.
31 * @addr: the address of the resource slv_id:18:16 | offset:0:15
35 * active-only transfers, this is because:
36 * rpmh_write() - Always waits.
38 * rpmh_write_async() - Never waits.
48 * struct tcs_request: A set of tcs_cmds sent together in a TCS
52 * (same as setting cmd->wait for all commands in the request)
72 /* Construct a Bus Clock Manager (BCM) specific TCS command */
/linux/drivers/net/ethernet/intel/ice/
H A Dice_dcb_lib.c1 // SPDX-License-Identifier: GPL-2.0
9 * ice_dcb_get_ena_tc - return bitmap of enabled TCs
10 * @dcbcfg: DCB config to evaluate for enabled TCs
43 if (vsi->tc_cfg.ena_tc & BIT(i)) in ice_is_pfc_causing_hung_q()
47 for (tc = 0; tc < num_tcs - 1; tc++) in ice_is_pfc_causing_hung_q()
48 if (ice_find_q_in_range(vsi->tc_cfg.tc_info[tc].qoffset, in ice_is_pfc_causing_hung_q()
49 vsi->tc_cfg.tc_info[tc + 1].qoffset, in ice_is_pfc_causing_hung_q()
56 up2tc = rd32(&pf->hw, PRTDCB_TUP2TC); in ice_is_pfc_causing_hung_q()
70 ref_prio_xoff[i] = pf->stats.priority_xoff_rx[i]; in ice_is_pfc_causing_hung_q()
76 if (pf->stats.priority_xoff_rx[i] > ref_prio_xoff[i]) in ice_is_pfc_causing_hung_q()
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H A Dice_dcb.c1 // SPDX-License-Identifier: GPL-2.0
13 * @buf: pointer to the caller-supplied buffer to store the MIB block
33 return -EINVAL; in ice_aq_get_lldp_mib()
37 cmd->type = mib_type & ICE_AQ_LLDP_MIB_TYPE_M; in ice_aq_get_lldp_mib()
38 cmd->type |= FIELD_PREP(ICE_AQ_LLDP_BRID_TYPE_M, bridge_type); in ice_aq_get_lldp_mib()
45 *local_len = le16_to_cpu(cmd->local_len); in ice_aq_get_lldp_mib()
47 *remote_len = le16_to_cpu(cmd->remote_len); in ice_aq_get_lldp_mib()
74 cmd->command |= ICE_AQ_LLDP_MIB_UPDATE_DIS; in ice_aq_cfg_lldp_mib_change()
76 cmd->command |= FIELD_PREP(ICE_AQ_LLDP_MIB_PENDING_M, in ice_aq_cfg_lldp_mib_change()
105 cmd->command |= ICE_AQ_LLDP_AGENT_SHUTDOWN; in ice_aq_stop_lldp()
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H A Dice_dcb_nl.c1 // SPDX-License-Identifier: GPL-2.0
11 * ice_dcbnl_devreset - perform enough of a ifdown/ifup to sync DCBNL info
18 while (ice_is_reset_in_progress(pf->state)) in ice_dcbnl_devreset()
28 * ice_dcbnl_getets - retrieve local ETS configuration
38 dcbxcfg = &pf->hw.port_info->qos_cfg.local_dcbx_cfg; in ice_dcbnl_getets()
40 ets->willing = dcbxcfg->etscfg.willing; in ice_dcbnl_getets()
41 ets->ets_cap = dcbxcfg->etscfg.maxtcs; in ice_dcbnl_getets()
42 ets->cbs = dcbxcfg->etscfg.cbs; in ice_dcbnl_getets()
43 memcpy(ets->tc_tx_bw, dcbxcfg->etscfg.tcbwtable, sizeof(ets->tc_tx_bw)); in ice_dcbnl_getets()
44 memcpy(ets->tc_rx_bw, dcbxcfg->etscfg.tcbwtable, sizeof(ets->tc_rx_bw)); in ice_dcbnl_getets()
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/linux/net/sched/
H A Dsch_mqprio_lib.c1 // SPDX-License-Identifier: GPL-2.0-only
26 for (i = 0; i < qopt->num_tc; i++) { in mqprio_validate_queue_counts()
27 unsigned int last = qopt->offset[i] + qopt->count[i]; in mqprio_validate_queue_counts()
29 if (!qopt->count[i]) { in mqprio_validate_queue_counts()
32 return -EINVAL; in mqprio_validate_queue_counts()
38 if (qopt->offset[i] >= dev->real_num_tx_queues || in mqprio_validate_queue_counts()
39 last > dev->real_num_tx_queues) { in mqprio_validate_queue_counts()
42 qopt->count[i], qopt->offset[i], in mqprio_validate_queue_counts()
43 i, dev->real_num_tx_queues); in mqprio_validate_queue_counts()
44 return -EINVAL; in mqprio_validate_queue_counts()
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/linux/arch/x86/entry/vdso/
H A Dvsgx.S1 /* SPDX-License-Identifier: GPL-2.0 */
35 .cfi_rel_offset %rbx, -8
56 /* Load TCS and AEP */
85 /* The out-of-line code runs with the pre-leave stack frame. */
89 mov $(-EINVAL), %eax
109 /* Save the untrusted RSP offset in %rbx (non-volatile register). */
114 * Align stack per x86_64 ABI. Note, %rsp needs to be 16-byte aligned
117 and $-0x10, %rsp
134 /* Undo the post-exit %rsp adjustment. */
139 * else re-execute ENCLU with the positive return value interpreted as
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_dcb.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
22 return -EINVAL; in i40e_get_dcbx_status()
41 u8 *buf = tlv->tlvinfo; in i40e_parse_ieee_etscfg_tlv()
42 u16 offset = 0; in i40e_parse_ieee_etscfg_tlv() local
47 * -------------------------- in i40e_parse_ieee_etscfg_tlv()
48 * |will-|CBS | Re- | Max | in i40e_parse_ieee_etscfg_tlv()
49 * |ing | |served| TCs | in i40e_parse_ieee_etscfg_tlv()
50 * -------------------------- in i40e_parse_ieee_etscfg_tlv()
53 etscfg = &dcbcfg->etscfg; in i40e_parse_ieee_etscfg_tlv()
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H A Di40e_main.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2021 Intel Corporation. */
31 static const char i40e_copyright[] = "Copyright (c) 2013 - 2019 Intel Corporation.";
57 /* i40e_pci_tbl - PCI Device ID Table
97 static int debug = -1;
116 if (is_unicast_ether_addr(f->macaddr) || is_link_local_ether_addr(f->macaddr)) in netdev_hw_addr_refcnt()
117 ha_list = &netdev->uc; in netdev_hw_addr_refcnt()
119 ha_list = &netdev->mc; in netdev_hw_addr_refcnt()
122 if (ether_addr_equal(ha->addr, f->macaddr)) { in netdev_hw_addr_refcnt()
123 ha->refcount += delta; in netdev_hw_addr_refcnt()
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/linux/drivers/net/ethernet/qlogic/qed/
H A Dqed_init_fw_funcs.c1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (c) 2015-2017 QLogic Corporation
4 * Copyright (c) 2019-2021 Marvell International Ltd.
36 0x100) - 1 : 0)
53 #define VOQS_BIT_MASK (BIT(MAX_NUM_VOQS) - 1)
79 #define QM_VP_WFQ_BYPASS_THRESH (QM_VP_WFQ_MIN_INC_VAL - 100)
98 /* RL increment value - rate is specified in mbps */
133 (ext_voq) * (PBF_REG_YCMD_QS_NUM_LINES_VOQ1_RT_OFFSET - \
138 (ext_voq) * (PBF_REG_BTB_GUARANTEED_VOQ1_RT_OFFSET - \
145 ((((pbf_cmd_lines) - 4) * 2) | QM_LINE_CRD_REG_SIGN_BIT)
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/linux/drivers/net/ethernet/broadcom/bnxt/
H A Dbnxt_ethtool.c1 /* Broadcom NetXtreme-C/E network driver.
3 * Copyright (c) 2014-2016 Broadcom Corporation
4 * Copyright (c) 2016-2017 Broadcom Limited
50 return bp->msg_enable; in bnxt_get_msglevel()
57 bp->msg_enable = value; in bnxt_set_msglevel()
71 coal->use_adaptive_rx_coalesce = bp->flags & BNXT_FLAG_DIM; in bnxt_get_coalesce()
73 hw_coal = &bp->rx_coal; in bnxt_get_coalesce()
74 mult = hw_coal->bufs_per_record; in bnxt_get_coalesce()
75 coal->rx_coalesce_usecs = hw_coal->coal_ticks; in bnxt_get_coalesce()
76 coal->rx_max_coalesced_frames = hw_coal->coal_bufs / mult; in bnxt_get_coalesce()
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/linux/drivers/net/ethernet/freescale/dpaa2/
H A Ddpni.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2013-2016 Freescale Semiconductor Inc.
20 * DPNI_MAX_TC - Maximum number of traffic classes
24 * DPNI_MAX_DPBP - Maximum number of buffer pools per DPNI
29 * DPNI_ALL_TCS - All traffic classes considered; see dpni_set_queue()
31 #define DPNI_ALL_TCS (u8)(-1)
33 * DPNI_ALL_TC_FLOWS - All flows within traffic class considered; see
36 #define DPNI_ALL_TC_FLOWS (u16)(-1)
38 * DPNI_NEW_FLOW_ID - Generate new flow ID; see dpni_set_queue()
40 #define DPNI_NEW_FLOW_ID (u16)(-1)
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/linux/arch/arm64/boot/dts/qcom/
H A Dsm4450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm4450-camcc.h>
8 #include <dt-bindings/clock/qcom,sm4450-dispcc.h>
9 #include <dt-bindings/clock/qcom,sm4450-gcc.h>
10 #include <dt-bindings/clock/qcom,sm4450-gpucc.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
16 interrupt-parent = <&intc>;
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/linux/arch/arm/boot/dts/qcom/
H A Dqcom-sdx55.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,gcc-sdx55.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interconnect/qcom,sdx55.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
15 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
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