/linux/Documentation/devicetree/bindings/ata/ |
H A D | nvidia,tegra-ahci.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/ata/nvidia,tegra-ahci.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jonathan Hunter <jonathanh@nvidia.com> 16 - nvidia,tegra124-ahci 17 - nvidia,tegra132-ahci 18 - nvidia,tegra210-ahci 19 - nvidia,tegra186-ahci [all …]
|
/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra124-apalis-v1.2-eval.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 3 * Copyright 2016-2018 Toradex AG 6 /dts-v1/; 8 #include <dt-bindings/input/input.h> 9 #include "tegra124-apalis-v1.2.dtsi" 13 compatible = "toradex,apalis-tk1-v1.2-eval", "toradex,apalis-tk1-eval", 14 "toradex,apalis-tk1-v1.2", "toradex,apalis-tk1", 28 stdout-path = "serial0:115200n8"; 40 hdmi-supply = <®_5v0>; 46 pex-perst-n-hog { [all …]
|
H A D | tegra124-apalis-eval.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR X11 3 * Copyright 2016-2019 Toradex AG 6 /dts-v1/; 8 #include <dt-bindings/input/input.h> 9 #include "tegra124-apalis.dtsi" 13 compatible = "toradex,apalis-tk1-eval", "toradex,apalis-tk1", 27 stdout-path = "serial0:115200n8"; 39 hdmi-supply = <®_5v0>; 45 pex-perst-n-hog { 46 gpio-hog; [all …]
|
H A D | tegra124-jetson-tk1.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 7 #include "tegra124-jetson-tk1-emc.dtsi" 11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124"; 17 /* This order keeps the mapping DB9 connector <-> ttyS0 */ 24 stdout-path = "serial0:115200n8"; 34 avddio-pex-supply = <&vdd_1v05_run>; 35 dvddio-pex-supply = <&vdd_1v05_run>; 36 avdd-pex-pll-supply = <&vdd_1v05_run>; [all …]
|
/linux/arch/arm/boot/dts/marvell/ |
H A D | armada-388-helios4.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 10 /dts-v1/; 11 #include "armada-388.dtsi" 12 #include "armada-38x-solidrun-microsom.dtsi" 25 /* So that mvebu u-boot can update the MAC addresses */ 30 stdout-path = "serial0:115200n8"; 33 reg_12v: regulator-12v { 34 compatible = "regulator-fixed"; 35 regulator-name = "power_brick_12V"; 36 regulator-min-microvolt = <12000000>; [all …]
|
H A D | armada-388-gp.dts | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 4 * (RD-88F6820-GP) 8 * Gregory CLEMENT <gregory.clement@free-electrons.com> 11 /dts-v1/; 12 #include "armada-388.dtsi" 13 #include <dt-bindings/gpio/gpio.h> 16 model = "Marvell Armada 388 DB-88F6820-GP"; 17 compatible = "marvell,a388-gp", "marvell,armada388", "marvell,armada380"; 20 stdout-path = "serial0:115200n8"; 35 internal-regs { [all …]
|
/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx6qdl-zii-rdu2.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 * Copyright (C) 2016-2017 Zodiac Inflight Innovations 6 #include <dt-bindings/gpio/gpio.h> 7 #include <dt-bindings/sound/fsl-imx-audmux.h> 11 stdout-path = &uart1; 15 mdio-gpio0 = &mdio1; 20 compatible = "virtual,mdio-gpio"; 21 #address-cells = <1>; 22 #size-cells = <0>; 23 pinctrl-names = "default"; [all …]
|
/linux/include/linux/mmc/ |
H A D | host.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 12 #include <linux/fault-inject.h> 18 #include <linux/dma-direction.h> 19 #include <linux/blk-crypto-profile.h> 40 unsigned char power_mode; /* power supply mode */ 67 #define MMC_TIMING_SD_EXP_1_2V 12 73 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */ 187 * ios->clock might be 0. For some controllers, setting 0Hz 197 * 1 for a read-only card 198 * -ENOSYS when not supported (equal to NULL callback) [all …]
|
/linux/sound/soc/codecs/ |
H A D | mt6358.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // mt6358.c -- mt6358 ALSA SoC audio codec driver 54 /* Supply widget subseq */ 107 priv->mtkaif_protocol = mtkaif_protocol; in mt6358_set_mtkaif_protocol() 115 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_set() 117 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_SET, in playback_gpio_set() 119 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_set() 130 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2_CLR, in playback_gpio_reset() 132 regmap_update_bits(priv->regmap, MT6358_GPIO_MODE2, in playback_gpio_reset() 134 regmap_update_bits(priv->regmap, MT6358_GPIO_DIR0, in playback_gpio_reset() [all …]
|
/linux/arch/arm/boot/dts/ti/omap/ |
H A D | omap4-l4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 compatible = "ti,omap4-l4-cfg", "simple-pm-bus"; 4 power-domains = <&prm_core>; 6 clock-names = "fck"; 10 reg-names = "ap", "la", "ia0"; 11 #address-cells = <1>; 12 #size-cells = <1>; 22 compatible = "simple-pm-bus"; 23 #address-cells = <1>; 24 #size-cells = <1>; [all …]
|
H A D | omap5-l4.dtsi | 2 compatible = "ti,omap5-l4-cfg", "simple-pm-bus"; 3 power-domains = <&prm_core>; 5 clock-names = "fck"; 9 reg-names = "ap", "la", "ia0"; 10 #address-cells = <1>; 11 #size-cells = <1>; 21 compatible = "simple-pm-bus"; 22 #address-cells = <1>; 23 #size-cells = <1>; 36 <0x00063000 0x00063000 0x001000>, /* ap 12 */ [all …]
|
H A D | omap3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/pinctrl/omap.h> 15 interrupt-parent = <&intc>; 16 #address-cells = <1>; 17 #size-cells = <1>; 33 #address-cells = <1>; [all …]
|
/linux/drivers/regulator/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 38 managed regulators and simple non-configurable regulators. 64 the netlink mechanism. User-space applications can subscribe to these events 65 for real-time updates on various regulator events. 75 They provide two I2C-controlled DC/DC step-down converters with 101 tristate "Active-semi act8865 voltage regulator" 106 This driver controls a active-semi act8865 voltage output 110 tristate "Active-semi ACT8945A voltage regulator" 113 This driver controls a active-semi ACT8945A voltage regulator 114 via I2C bus. The ACT8945A features three step-down DC/DC converters [all …]
|
/linux/drivers/clk/tegra/ |
H A D | clk-dfll.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * clk-dfll.c - Tegra DFLL clock source common code 5 * Copyright (C) 2012-2019 NVIDIA Corporation. All rights reserved. 12 * "CL-DVFS". To try to avoid confusion, this code refers to them 16 * supply voltage noise. Tegra124 uses it to clock the fast CPU 17 * complex when the target CPU speed is above a particular rate. The 18 * DFLL can be operated in either open-loop mode or closed-loop mode. 19 * In open-loop mode, the DFLL generates an output clock appropriate 20 * to the supply voltage. In closed-loop mode, when configured with a 21 * target frequency, the DFLL minimizes supply voltage while [all …]
|
/linux/drivers/cdx/controller/ |
H A D | mc_cdx_pcol.h | 1 /* SPDX-License-Identifier: GPL-2.0 6 * Copyright (C) 2022-2023, Advanced Micro Devices, Inc. 22 * | | \--- Response 23 * | \------- Error 24 * \------------------------------ Resync (always set) 76 * - To advance a shared memory request if XFLAGS_EVREQ was set 77 * - As a notification (link state, i2c event), controlled 89 * - LEVEL==INFO Command succeeded 90 * - LEVEL==ERR Command failed 101 * non-existent MCDI command MC_CMD_DEBUG_LOG. [all …]
|
/linux/arch/mips/include/asm/mach-au1x00/ |
H A D | au1000.h | 6 * Copyright 2000-2001, 2006-2008 MontaVista Software Inc. 38 /* Au1000-style (IC0/1): 2 controllers with 32 sources each */ 45 /* Au1300-style (GPIC): 1 controller with up to 128 sources */ 48 #define ALCHEMY_GPIC_INT_LAST (ALCHEMY_GPIC_INT_BASE + ALCHEMY_GPIC_INT_NUM - 1) 293 #define MEM_SDADDR_CSBA_N(N) ((N) & (0x03FF << 22) >> 12) 358 # define SYS_CNTRL_BT1 (1 << 12) 392 # define SYS_PF_U1 (1 << 12) /* GPIO21/U1TXD */ 445 #define SYS_PINFUNC_U1T (1 << 12) 537 #define PCI_CONFIG_ET (1 << 26) /* error in target mode */ 544 #define PCI_CONFIG_NC (1 << 16) /* mark mem access non-coherent */ [all …]
|
/linux/drivers/media/i2c/ |
H A D | imx283.c | 1 // SPDX-License-Identifier: GPL-2.0 13 * Copyright (C) 2019-2020 Raspberry Pi (Trading) Ltd 32 #include <media/v4l2-cci.h> 33 #include <media/v4l2-ctrls.h> 34 #include <media/v4l2-device.h> 35 #include <media/v4l2-fwnode.h> 36 #include <media/v4l2-mediabus.h> 93 #define IMX283_HMAX_MAX (BIT(16) - 1) 97 #define IMX283_VMAX_MAX (BIT(16) - 1) 105 * Gain [dB] = -20log{(2048 - value [10:0]) /2048} [all …]
|
H A D | imx274.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * imx274.c - IMX274 CMOS Image Sensor driver 23 #include <linux/v4l2-mediabus.h> 26 #include <media/v4l2-ctrls.h> 27 #include <media/v4l2-device.h> 28 #include <media/v4l2-fwnode.h> 29 #include <media/v4l2-subdev.h> 49 #define IMX274_GAIN_SHIFT_MASK ((1 << IMX274_GAIN_SHIFT) - 1) 59 / (2048 - IMX274_GAIN_REG_MAX)) 76 * register SHR is limited to (SVR value + 1) x VMAX value - 4 [all …]
|
H A D | imx335.c | 1 // SPDX-License-Identifier: GPL-2.0-only 16 #include <media/v4l2-cci.h> 17 #include <media/v4l2-ctrls.h> 18 #include <media/v4l2-fwnode.h> 19 #include <media/v4l2-subdev.h> 126 #define IMX335_PIXEL_ARRAY_LEFT 12U 127 #define IMX335_PIXEL_ARRAY_TOP 12U 132 * struct imx335_reg_list - imx335 sensor register list 142 "avdd", /* Analog (2.9V) supply */ 143 "ovdd", /* Digital I/O (1.8V) supply */ [all …]
|
H A D | imx258.c | 1 // SPDX-License-Identifier: GPL-2.0 11 #include <media/v4l2-cci.h> 12 #include <media/v4l2-ctrls.h> 13 #include <media/v4l2-device.h> 14 #include <media/v4l2-fwnode.h> 33 /* HBLANK control - read only */ 42 #define IMX258_EXPOSURE_MAX (IMX258_VTS_MAX - IMX258_EXPOSURE_OFFSET) 163 /* V-timing */ 461 * - no flip 462 * - h flip [all …]
|
/linux/drivers/iio/imu/ |
H A D | adis16400.c | 1 // SPDX-License-Identifier: GPL-2.0-only 30 #define ADIS16400_SUPPLY_OUT 0x02 /* Power supply measurement */ 31 #define ADIS16400_XGYRO_OUT 0x04 /* X-axis gyroscope output */ 32 #define ADIS16400_YGYRO_OUT 0x06 /* Y-axis gyroscope output */ 33 #define ADIS16400_ZGYRO_OUT 0x08 /* Z-axis gyroscope output */ 34 #define ADIS16400_XACCL_OUT 0x0A /* X-axis accelerometer output */ 35 #define ADIS16400_YACCL_OUT 0x0C /* Y-axis accelerometer output */ 36 #define ADIS16400_ZACCL_OUT 0x0E /* Z-axis accelerometer output */ 37 #define ADIS16400_XMAGN_OUT 0x10 /* X-axis magnetometer measurement */ 38 #define ADIS16400_YMAGN_OUT 0x12 /* Y-axis magnetometer measurement */ [all …]
|
/linux/arch/powerpc/include/asm/ |
H A D | smu.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 25 * These commands are used to retrieve the sdb-partition-XX datas from 31 * - 0..1 : partition address 32 * - 2 : a byte containing the partition ID 33 * - 3 : length (maybe other bits are rest of header ?) 53 * --------------------- 61 * return the programmed/target speed. It _seems_ that the result is a bit 66 * ------------------------ 115 * 0: bus number (from device-tree usually, SMU has lots of busses !) 128 * - 0x00: Simple transfer [all …]
|
/linux/drivers/net/ethernet/sfc/siena/ |
H A D | mcdi_pcol.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 4 * Copyright 2009-2018 Solarflare Communications Inc. 5 * Copyright 2019-2020 Xilinx Inc. 13 /* Power-on reset state */ 35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */ 38 /* The rest of these are firmware-defined */ 46 /* Values to be written to the per-port status dword in shared 71 * | | \--- Response 72 * | \------- Error 73 * \------------------------------ Resync (always set) [all …]
|
/linux/drivers/net/ethernet/sfc/ |
H A D | mcdi_pcol.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 4 * Copyright 2009-2018 Solarflare Communications Inc. 5 * Copyright 2019-2020 Xilinx Inc. 13 /* Power-on reset state */ 35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */ 38 /* The rest of these are firmware-defined */ 46 /* Values to be written to the per-port status dword in shared 71 * | | \--- Response 72 * | \------- Error 73 * \------------------------------ Resync (always set) [all …]
|
/linux/include/soc/tegra/ |
H A D | bpmp-abi.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved. 66 * A well-defined subset of the MRQ messages that the CPU sends to the 130 * -BPMP_EBADMSG and ignore the request. 144 …* | -------------------- | ------------------------------------ | --------------------------------… 148 …* | MRQ_I2C | | 12 + cmd_i2c_xfer_request.data_s… 161 …* | MRQ_PG | CMD_PG_QUERY_ABI | 12 … 162 …* | MRQ_PG | CMD_PG_SET_STATE | 12 … 188 …* | MRQ_STRAP | STRAP_SET | 12 … 198 …* | MRQ_EC | CMD_EC_STATUS_EX_GET | 12 … [all …]
|