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/linux/Documentation/devicetree/bindings/ata/
H A Dnvidia,tegra-ahci.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ata/nvidia,tegra-ahci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra124-ahci
17 - nvidia,tegra132-ahci
18 - nvidia,tegra210-ahci
19 - nvidia,tegra186-ahci
[all …]
/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124-apalis-v1.2-eval.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "tegra124-apalis-v1.2.dtsi"
13 compatible = "toradex,apalis-tk1-v1.2-eval", "toradex,apalis-tk1-eval",
14 "toradex,apalis-tk1-v1.2", "toradex,apalis-tk1",
28 stdout-path = "serial0:115200n8";
40 hdmi-supply = <&reg_5v0>;
46 pex-perst-n-hog {
[all …]
H A Dtegra124-apalis-eval.dts1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
6 /dts-v1/;
8 #include <dt-bindings/input/input.h>
9 #include "tegra124-apalis.dtsi"
13 compatible = "toradex,apalis-tk1-eval", "toradex,apalis-tk1",
27 stdout-path = "serial0:115200n8";
39 hdmi-supply = <&reg_5v0>;
45 pex-perst-n-hog {
46 gpio-hog;
[all …]
H A Dtegra124-jetson-tk1.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
7 #include "tegra124-jetson-tk1-emc.dtsi"
11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
17 /* This order keeps the mapping DB9 connector <-> ttyS0 */
24 stdout-path = "serial0:115200n8";
34 avddio-pex-supply = <&vdd_1v05_run>;
35 dvddio-pex-supply = <&vdd_1v05_run>;
36 avdd-pex-pll-supply = <&vdd_1v05_run>;
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Darmada-388-helios4.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
10 /dts-v1/;
11 #include "armada-388.dtsi"
12 #include "armada-38x-solidrun-microsom.dtsi"
25 /* So that mvebu u-boot can update the MAC addresses */
30 stdout-path = "serial0:115200n8";
33 reg_12v: regulator-12v {
34 compatible = "regulator-fixed";
35 regulator-name = "power_brick_12V";
36 regulator-min-microvolt = <12000000>;
[all …]
H A Darmada-388-gp.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * (RD-88F6820-GP)
8 * Gregory CLEMENT <gregory.clement@free-electrons.com>
11 /dts-v1/;
12 #include "armada-388.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
16 model = "Marvell Armada 388 DB-88F6820-GP";
17 compatible = "marvell,a388-gp", "marvell,armada388", "marvell,armada380";
20 stdout-path = "serial0:115200n8";
35 internal-regs {
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-zii-rdu2.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2016-2017 Zodiac Inflight Innovations
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/sound/fsl-imx-audmux.h>
11 stdout-path = &uart1;
15 mdio-gpio0 = &mdio1;
20 compatible = "virtual,mdio-gpio";
21 #address-cells = <1>;
22 #size-cells = <0>;
23 pinctrl-names = "default";
[all …]
/linux/drivers/pci/controller/
H A Dpci-tegra.c1 // SPDX-License-Identifier: GPL-2.0+
9 * Copyright (c) 2008-2009, NVIDIA Corporation.
11 * Bits taken from arch/arm/mach-dove/pcie.c
26 #include <linux/irqchip/irq-msi-lib.h>
110 #define AFI_INTR_CLKCLAMP_SENSE 12
205 #define RP_VEND_CTL0_DSK_RST_PULSE_WIDTH_MASK (0xf << 12)
206 #define RP_VEND_CTL0_DSK_RST_PULSE_WIDTH (0x9 << 12)
258 * Fields in PADS_REFCLK_CFG*. Those registers form an array of 16-bit
265 #define PADS_REFCLK_CFG_DRVI_SHIFT 12 /* 15:12 */
380 writel(value, pcie->afi + offset); in afi_writel()
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Domap4-l4.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 compatible = "ti,omap4-l4-cfg", "simple-pm-bus";
4 power-domains = <&prm_core>;
6 clock-names = "fck";
10 reg-names = "ap", "la", "ia0";
11 #address-cells = <1>;
12 #size-cells = <1>;
22 compatible = "simple-pm-bus";
23 #address-cells = <1>;
24 #size-cells = <1>;
[all …]
H A Domap5-l4.dtsi2 compatible = "ti,omap5-l4-cfg", "simple-pm-bus";
3 power-domains = <&prm_core>;
5 clock-names = "fck";
9 reg-names = "ap", "la", "ia0";
10 #address-cells = <1>;
11 #size-cells = <1>;
21 compatible = "simple-pm-bus";
22 #address-cells = <1>;
23 #size-cells = <1>;
36 <0x00063000 0x00063000 0x001000>, /* ap 12 */
[all …]
H A Domap3.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/pinctrl/omap.h>
15 interrupt-parent = <&intc>;
16 #address-cells = <1>;
17 #size-cells = <1>;
33 #address-cells = <1>;
[all …]
/linux/drivers/clk/tegra/
H A Dclk-dfll.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * clk-dfll.c - Tegra DFLL clock source common code
5 * Copyright (C) 2012-2019 NVIDIA Corporation. All rights reserved.
12 * "CL-DVFS". To try to avoid confusion, this code refers to them
16 * supply voltage noise. Tegra124 uses it to clock the fast CPU
17 * complex when the target CPU speed is above a particular rate. The
18 * DFLL can be operated in either open-loop mode or closed-loop mode.
19 * In open-loop mode, the DFLL generates an output clock appropriate
20 * to the supply voltage. In closed-loop mode, when configured with a
21 * target frequency, the DFLL minimizes supply voltage while
[all …]
/linux/drivers/cdx/controller/
H A Dmc_cdx_pcol.h1 /* SPDX-License-Identifier: GPL-2.0
6 * Copyright (C) 2022-2023, Advanced Micro Devices, Inc.
22 * | | \--- Response
23 * | \------- Error
24 * \------------------------------ Resync (always set)
76 * - To advance a shared memory request if XFLAGS_EVREQ was set
77 * - As a notification (link state, i2c event), controlled
89 * - LEVEL==INFO Command succeeded
90 * - LEVEL==ERR Command failed
101 * non-existent MCDI command MC_CMD_DEBUG_LOG.
[all …]
/linux/arch/mips/include/asm/mach-au1x00/
H A Dau1000.h6 * Copyright 2000-2001, 2006-2008 MontaVista Software Inc.
38 /* Au1000-style (IC0/1): 2 controllers with 32 sources each */
45 /* Au1300-style (GPIC): 1 controller with up to 128 sources */
48 #define ALCHEMY_GPIC_INT_LAST (ALCHEMY_GPIC_INT_BASE + ALCHEMY_GPIC_INT_NUM - 1)
293 #define MEM_SDADDR_CSBA_N(N) ((N) & (0x03FF << 22) >> 12)
358 # define SYS_CNTRL_BT1 (1 << 12)
392 # define SYS_PF_U1 (1 << 12) /* GPIO21/U1TXD */
445 #define SYS_PINFUNC_U1T (1 << 12)
537 #define PCI_CONFIG_ET (1 << 26) /* error in target mode */
544 #define PCI_CONFIG_NC (1 << 16) /* mark mem access non-coherent */
[all …]
/linux/drivers/iio/imu/
H A Dadis16400.c1 // SPDX-License-Identifier: GPL-2.0-only
30 #define ADIS16400_SUPPLY_OUT 0x02 /* Power supply measurement */
31 #define ADIS16400_XGYRO_OUT 0x04 /* X-axis gyroscope output */
32 #define ADIS16400_YGYRO_OUT 0x06 /* Y-axis gyroscope output */
33 #define ADIS16400_ZGYRO_OUT 0x08 /* Z-axis gyroscope output */
34 #define ADIS16400_XACCL_OUT 0x0A /* X-axis accelerometer output */
35 #define ADIS16400_YACCL_OUT 0x0C /* Y-axis accelerometer output */
36 #define ADIS16400_ZACCL_OUT 0x0E /* Z-axis accelerometer output */
37 #define ADIS16400_XMAGN_OUT 0x10 /* X-axis magnetometer measurement */
38 #define ADIS16400_YMAGN_OUT 0x12 /* Y-axis magnetometer measurement */
[all …]
/linux/arch/powerpc/include/asm/
H A Dsmu.h1 /* SPDX-License-Identifier: GPL-2.0 */
25 * These commands are used to retrieve the sdb-partition-XX datas from
31 * - 0..1 : partition address
32 * - 2 : a byte containing the partition ID
33 * - 3 : length (maybe other bits are rest of header ?)
53 * ---------------------
61 * return the programmed/target speed. It _seems_ that the result is a bit
66 * ------------------------
115 * 0: bus number (from device-tree usually, SMU has lots of busses !)
128 * - 0x00: Simple transfer
[all …]
/linux/drivers/net/ethernet/sfc/siena/
H A Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
[all …]
/linux/drivers/net/ethernet/sfc/
H A Dmcdi_pcol.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
[all …]
/linux/include/soc/tegra/
H A Dbpmp-abi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2014-2022, NVIDIA CORPORATION. All rights reserved.
66 * A well-defined subset of the MRQ messages that the CPU sends to the
130 * -BPMP_EBADMSG and ignore the request.
144 …* | -------------------- | ------------------------------------ | --------------------------------…
148 …* | MRQ_I2C | | 12 + cmd_i2c_xfer_request.data_s…
161 …* | MRQ_PG | CMD_PG_QUERY_ABI | 12 …
162 …* | MRQ_PG | CMD_PG_SET_STATE | 12 …
188 …* | MRQ_STRAP | STRAP_SET | 12 …
198 …* | MRQ_EC | CMD_EC_STATUS_EX_GET | 12 …
[all …]
/linux/drivers/pci/controller/dwc/
H A Dpci-imx6.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
37 #include "pcie-designware.h"
42 #define IMX8MQ_GPR_PCIE_VREG_BYPASS BIT(12)
82 #define to_imx_pcie(x) dev_get_drvdata((x)->dev)
118 #define imx_check_flag(pci, val) (pci->drvdata->flags & val)
183 /* PCIe Port Logic registers (memory-mapped) */
196 /* PHY registers (not memory-mapped) */
233 WARN_ON(imx_pcie->drvdata->variant != IMX8MQ && in imx_pcie_grp_offset()
[all …]
/linux/Documentation/virt/kvm/
H A Dapi.rst1 .. SPDX-License-Identifier: GPL-2.0
4 The Definitive KVM (Kernel-based Virtual Machine) API Documentation
24 - System ioctls: These query and set global attributes which affect the
28 - VM ioctls: These query and set attributes that affect an entire virtual
35 - vcpu ioctls: These query and set attributes that control the operation
43 - device ioctls: These query and set attributes that control the operation
92 facility that allows backward-compatible extensions to the API to be
111 API version 12 (see :ref:`KVM_GET_API_VERSION <KVM_GET_API_VERSION>`),
133 -----------------------
139 :Returns: the constant KVM_API_VERSION (=12)
[all …]
/linux/drivers/media/i2c/ccs/
H A Dccs-core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/media/i2c/ccs/ccs-core.c
8 * Copyright (C) 2010--2012 Nokia Corporation
13 * Based on smia-sensor.c by Tuukka Toivonen <tuukkat76@gmail.com>
27 #include <linux/v4l2-mediabus.h>
28 #include <media/v4l2-cc
1306 u32 v; ccs_read_nvm_page() local
2077 ccs_propagate(struct v4l2_subdev * subdev,struct v4l2_subdev_state * sd_state,int which,int target) ccs_propagate() argument
3461 u32 v; ccs_probe() local
[all...]
/linux/arch/arm64/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
288 ARM 64-bit (AArch64) Linux support.
296 # required due to use of the -Zfixed-x18 flag.
299 # -Zsanitizer=shadow-call-stack flag.
309 depends on $(cc-option,-fpatchable-function-entry=2)
335 # VA_BITS - PTDESC_TABLE_SHIFT
413 def_bool !$(as-instr,1:\n.inst 0\n.rept . - 1b\n\nnop\n.endr\n)
418 # https://github.com/llvm/llvm-project/commit/2a96f47c5ffca84cd774ad402cacd137f4bf45e2
461 ID_AA64MMFR1_EL1.HAFDBS, but (V)TCR_ELx.{HA,HD} are not RES0
468 at stage-2.
[all …]
/linux/
H A DCREDITS1 This is at least a partial credits-file of people that have
4 scripts. The fields are: name (N), email (E), web-address
6 snail-mail address (S).
10 ----------
51 D: in-kernel DRM Maintainer
76 E: tim_alpaerts@toyota-motor-europe.com
80 S: B-2610 Wilrijk-Antwerpen
85 W: http://www-stu.christs.cam.ac.uk/~aia21/
106 D: Maintainer of ide-cd and Uniform CD-ROM driver,
107 D: ATAPI CD-Changer support, Major 2.1.x CD-ROM update.
[all …]
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
[all …]

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