| /linux/Documentation/devicetree/bindings/sram/ |
| H A D | allwinner,sun4i-a10-system-control.yaml | 1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/sram/allwinner,sun4i-a10-system-control.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A10 System Control
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
15 by a regular node for the SRAM controller itself, with sub-nodes
19 "#address-cells":
22 "#size-cells":
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | sprd,pinctrl.txt | 5 The first block comprises some global control registers, and each
8 pad driving level, system control select and so on ("domain pad
11 select 3.0v, then the pin can output 3.0v. "system control" is used
12 to choose one function (like: UART0) for which system, since we
16 of them, so we can not make every Spreadtrum-special configuration
18 global configuration in future. Then we add one "sprd,control" to
19 set these various global control configuration, and we need use
23 bits in one global control register as one pin, thus we should
32 Now we have 4 systems for sleep mode on SC9860 SoC: AP system,
33 PUBCP system, TGLDSP system and AGDSP system. And the pin sleep
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| /linux/arch/powerpc/include/asm/ |
| H A D | mpc5121.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
18 u32 rcr; /* Reset Control Register */
19 u32 rcer; /* Reset Control Enable Register */
23 * Clock Control Module
26 u32 spmr; /* System PLL Mode Register */
27 u32 sccr1; /* System Clock Control Register 1 */
28 u32 sccr2; /* System Clock Control Register 2 */
29 u32 scfr1; /* System Clock Frequency Register 1 */
30 u32 scfr2; /* System Clock Frequency Register 2 */
31 u32 scfr2s; /* System Clock Frequency Shadow Register 2 */
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|
| H A D | ipic.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
26 #define IPIC_SICFR 0x00 /* System Global Interrupt Configuration Register */
27 #define IPIC_SIVCR 0x04 /* System Global Interrupt Vector Register */
28 #define IPIC_SIPNR_H 0x08 /* System Internal Interrupt Pending Register (HIGH) */
29 #define IPIC_SIPNR_L 0x0C /* System Internal Interrupt Pending Register (LOW) */
30 #define IPIC_SIPRR_A 0x10 /* System Internal Interrupt group A Priority Register */
31 #define IPIC_SIPRR_B 0x14 /* System Internal Interrupt group B Priority Register */
32 #define IPIC_SIPRR_C 0x18 /* System Internal Interrupt group C Priority Register */
33 #define IPIC_SIPRR_D 0x1C /* System Internal Interrupt group D Priority Register */
34 #define IPIC_SIMSR_H 0x20 /* System Internal Interrupt Mask Register (HIGH) */
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| /linux/Documentation/userspace-api/ |
| H A D | dcdbas.rst | 9 systems management software such as Dell OpenManage to perform system
10 management interrupts and host control actions (system power cycle or
24 System Management Interrupt
28 management information via a system management interrupt (SMI). The SMI data
29 buffer must reside in 32-bit address space, and the physical address of the
33 software to perform these system management interrupts::
44 2) Write system management command to smi_data.
47 4) Read system management command response from smi_data.
51 Host Control Action
54 Dell OpenManage supports a host control feature that allows the administrator
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| /linux/drivers/ras/amd/atl/ |
| H A D | reg_fields.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
50 * D18F1x208 [System Fabric ID Mask 0]
53 * D18F1x150 [System Fabric ID Mask 0]
56 * D18F4x1B0 [System Fabric ID Mask 0]
76 * D18F7xE08 [DRAM Address Control]
79 * D18F7x208 [DRAM Address Control]
96 * D18F1x208 [System Fabric ID Mask]
99 * D18F1x20C [System Fabric ID Mask 1]
102 * D18F1x158 [System Fabric ID Mask 2]
105 * D18F4x1B8 [System Fabric ID Mask 2]
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| /linux/drivers/firmware/arm_scmi/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "ARM System Control and Management Interface Protocol"
5 tristate "ARM System Control and Management Interface (SCMI) Message Protocol"
8 ARM System Control and Management Interface (SCMI) protocol is a
9 set of operating system-independent software interfaces that are
10 used in system management. SCMI is extensible and currently provides
11 interfaces for: Discovery and self-description of the interfaces
13 a given device or domain into the various power-saving states that
14 it supports, Performance management which is the ability to control
78 firmware bugs on system already deployed in the wild.
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| /linux/drivers/firmware/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
4 # see Documentation/kbuild/kconfig-language.rst.
12 tristate "ARM System Control and Power Interface (SCPI) Message Protocol"
16 System Control and Power Interface (SCPI) Message Protocol is
18 Cores(AP) and the System Control Processor(SCP). The MHU peripheral
19 provides a mechanism for inter-processor communication between SCP
23 Processors. It offers control and management of: the core/cluster
25 certain system clocks configuration, thermal sensors and many
61 bool "Add firmware-provided memory map to sysfs" if EXPERT
64 Add the firmware-provided (unmodified) memory map to /sys/firmware/memmap.
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| /linux/drivers/media/usb/dvb-usb-v2/ |
| H A D | rtl28xxu.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
138 * 0x3000 SYS : system
145 /* SIE Control Registers */
146 #define USB_SYSCTL 0x2000 /* USB system control */
147 #define USB_SYSCTL_0 0x2000 /* USB system control */
148 #define USB_SYSCTL_1 0x2001 /* USB system control */
149 #define USB_SYSCTL_2 0x2002 /* USB system control */
150 #define USB_SYSCTL_3 0x2003 /* USB system control */
153 #define USB_CTRL 0x2010 /* USB control */
165 #define USB_EP0_CTL 0x2108 /* EP 0 control */
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| /linux/drivers/macintosh/ |
| H A D | windfarm_pm81.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Windfarm PowerMac thermal control. iMac G5
8 * The algorithm used is the PID control algorithm, used the same
11 * that none of the code has been re-used, it's a complete re-implementation
13 * The various control loops found in Darwin config file are:
18 * System Fans control loop. Different based on models. In addition to the
19 * usual PID algorithm, the control loop gets 2 additional pairs of linear
24 * - the linked control (second control) gets the target value as-is
26 * - the main control (first control) gets the target value scaled with
28 * - the value of the target of the CPU Fan control loop is retrieved,
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| /linux/Documentation/devicetree/bindings/power/ |
| H A D | power-controller.txt | 1 * Generic system power control capability
3 Power-management integrated circuits or miscellaneous hardware components are
4 sometimes able to control the system power. The device driver associated with these
6 it can be used to switch off the system. The corresponding device must have the
7 standard property "system-power-controller" in its device node. This property
8 marks the device as able to control the system power. In order to test if this
15 compatible = "active-semi,act8846";
16 system-power-controller;
|
| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | ti-phy.txt | 3 OMAP CONTROL PHY
6 - compatible: Should be one of
7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4.
8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register
10 "ti,control-phy-pipe3" - if it has DPLL and individual Rx & Tx power control
12 "ti,control-phy-pcie" - for pcie to support external clock for pcie and to
15 "ti,control-phy-usb2-dra7" - if it has power down register like USB2 PHY on
17 "ti,control-phy-usb2-am437" - if it has power down register like USB2 PHY on
19 - reg : register ranges as listed in the reg-names property
20 - reg-names: "otghs_control" for control-phy-otghs
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| /linux/Documentation/devicetree/bindings/mfd/ |
| H A D | max77620.txt | 4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
19 are defined at dt-bindings/mfd/max77620.h.
21 - system-power-controller: Indicates that this PMIC is controlling the
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| /linux/Documentation/edac/ |
| H A D | scrub.rst | 1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.2-no-invariants-or-later
4 Scrub Control
7 Copyright (c) 2024-2025 HiSilicon Limited.
11 Invariant Sections, Front-Cover Texts nor Back-Cover Texts.
14 - Written for: 6.15
17 ------------
24 Memory scrubbing is a feature where an ECC (Error-Correcting Code) engine
49 2. On-demand scrubbing for a specific address range or region of memory.
55 The control mechanisms vary across different memory scrubbers. To enable
59 A generic memory EDAC scrub control allows users to manage underlying
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| /linux/Documentation/admin-guide/LSM/ |
| H A D | Smack.rst | 7 - The Elevator, from Dark Star
9 Smack is the Simplified Mandatory Access Control Kernel.
11 control that includes simplicity in its primary design goals.
13 Smack is not the only Mandatory Access Control scheme
14 available for Linux. Those new to Mandatory Access Control
21 - The kernel
22 - Basic utilities, which are helpful but not required
23 - Configuration data
35 Smack is used in the Tizen operating system. Please
41 git://github.com/smack-team/smack.git
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| /linux/drivers/cxl/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
26 The CXL specification defines a "CXL memory device" sub-class in the
29 memory to be mapped into the system address map (Host-managed Device
70 (https://www.computeexpresslink.org/spec-landing). The CXL core
72 hierarchy to map regions that represent System RAM, or Persistent
84 managed via a bridge driver from CXL to the LIBNVDIMM system
95 The CXL.mem protocol allows a device to act as a provider of "System
98 known as HDM "Host-managed Device Memory".
101 memory expansion and control of HDM. See Chapter 9.13 in the CXL 2.0
125 control the EDAC memory features configurations of CXL memory
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| /linux/Documentation/devicetree/bindings/soc/ti/ |
| H A D | ti,j721e-system-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/
4 ---
5 $id: http://devicetree.org/schemas/soc/ti/ti,j721e-system-controller.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: TI J721e System Controller Registers R/W
11 This represents the Control Module registers (CTRL_MMR0) on the SoC.
12 System controller node represents a register region containing a set
14 represent as any specific type of device. The typical use-case is
15 for some other node's driver, or platform-specific code, to acquire
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| /linux/Documentation/admin-guide/thermal/ |
| H A D | intel_powerclamp.rst | 6 - Arjan van de Ven <arjan@linux.intel.com>
7 - Jacob Pan <jacob.jun.pan@linux.intel.com>
12 - Goals and Objectives
15 - Idle Injection
16 - Calibration
19 - Effectiveness and Limitations
20 - Power vs Performance
21 - Scalability
22 - Calibration
23 - Comparison with Alternative Techniques
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| /linux/Documentation/driver-api/usb/ |
| H A D | power-management.rst | 1 .. _usb-power-management:
7 :Date: Last-updated: February 2014
11 ---------
17 * Changing the default idle-delay time
23 * Interaction between dynamic PM and system PM
25 * USB Port Power Control
26 * User Interface for Port Power Control
31 -------------------------
34 parts of a computer system when they aren't being used. While a
35 component is ``suspended`` it is in a nonfunctional low-power state; it
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|
| /linux/sound/core/seq/ |
| H A D | seq_ump_convert.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
68 return port->ump_group ? (port->ump_group - 1) : 0; in get_ump_group()
76 * UMP -> MIDI1 sequencer event
85 ev->data.note.channel = val->note.channel; in ump_midi1_to_note_ev()
86 ev->data.note.note = val->note.note; in ump_midi1_to_note_ev()
87 ev->data.note.velocity = val->note.velocity; in ump_midi1_to_note_ev()
94 ev->data.control.channel = val->caf.channel; in ump_midi1_to_ctrl_ev()
95 ev->data.control.value = val->caf.data; in ump_midi1_to_ctrl_ev()
102 ev->data.control.channel = val->pb.channel; in ump_midi1_to_pitchbend_ev()
103 ev->data.control.value = (val->pb.data_msb << 7) | val->pb.data_lsb; in ump_midi1_to_pitchbend_ev()
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| /linux/arch/sparc/include/asm/ |
| H A D | bbc.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
3 * bbc.h: Defines for BootBus Controller found on UltraSPARC-III
12 /* Register sizes are indicated by "B" (Byte, 1-byte),
13 * "H" (Half-word, 2 bytes), "W" (Word, 4 bytes) or
26 #define BBC_CSC 0x0d /* [B] Clock Synthesizers Control*/
27 #define BBC_ES_CTRL 0x0e /* [H] Energy Star Control */
29 #define BBC_ES_DACT 0x14 /* [B] E* De-Assert Change Time */
30 #define BBC_ES_DABT 0x15 /* [B] E* De-Assert Bypass Time */
36 #define BBC_JTAG_CTRL 0x2c /* [B] JTAG+ Control */
38 #define BBC_I2C_0_S1 0x2e /* [B] I2C ctrlr-0 reg S1 */
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| /linux/Documentation/driver-api/gpio/ |
| H A D | drivers-on-gpio.rst | 6 the right in-kernel and userspace APIs/ABIs for the job, and that these
10 - leds-gpio: drivers/leds/leds-gpio.c will handle LEDs connected to GPIO
13 - ledtrig-gpio: drivers/leds/trigger/ledtrig-gpio.c will provide a LED trigger,
15 (and that LED may in turn use the leds-gpio as per above).
17 - gpio-keys: drivers/input/keyboard/gpio_keys.c is used when your GPIO line
20 - gpio-keys-polled: drivers/input/keyboard/gpio_keys_polled.c is used when your
24 - gpio_mouse: drivers/input/mouse/gpio_mouse.c is used to provide a mouse with
29 - gpio-beeper: drivers/input/misc/gpio-beeper.c is used to provide a beep from
31 off/on, for an actual PWM waveform, see pwm-gpio below.)
33 - pwm-gpio: drivers/pwm/pwm-gpio.c is used to toggle a GPIO with a high
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| /linux/arch/arm/nwfpe/ |
| H A D | fpsr.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 (c) Rebel.com, 1998-1999
17 SYSTEM ID
19 SYSTEM CONTROL BYTE
25 /* SYSTEM ID
26 ------------
27 Note: the system id byte is read only */
30 typedef unsigned int FPCR; /* type for floating point control register */
34 #define FP_EMULATOR 0x01000000 /* System ID for emulator */
35 #define FP_ACCELERATOR 0x81000000 /* System ID for FPA11 */
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| /linux/Documentation/ABI/testing/ |
| H A D | sysfs-devices-system-cpu | 1 What: /sys/devices/system/cpu/
2 Date: pre-git history
3 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
10 /sys/devices/system/cpu/cpuX/
12 What: /sys/devices/system/cpu/kernel_max
13 /sys/devices/system/cpu/offline
14 /sys/devices/system/cpu/online
15 /sys/devices/system/cpu/possible
16 /sys/devices/system/cpu/present
18 Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
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| /linux/Documentation/admin-guide/hw-vuln/ |
| H A D | l1tf.rst | 1 L1TF - L1 Terminal Fault
10 -------------------
15 - Processors from AMD, Centaur and other non Intel vendors
17 - Older processor models, where the CPU family is < 6
19 - A range of Intel ATOM processors (Cedarview, Cloverview, Lincroft,
22 - The Intel XEON PHI family
24 - Intel processors which have the ARCH_CAP_RDCL_NO bit set in the
33 ------------
38 CVE-2018-3615 L1 Terminal Fault SGX related aspects
39 CVE-2018-3620 L1 Terminal Fault OS, SMM related aspects
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|