| /freebsd/contrib/ntp/html/ |
| H A D | discipline.html | 1 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
4 <meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
6 <title>Clock Discipline Algorithm</title>
7 <!-- Changed by: stenn, 03-Jan-2020 -->
11 <h3>Clock Discipline Algorithm</h3>
13 <!-- #BeginDate format:En2m -->3-Jan-2020 02:12<!-- #EndDate -->
18 <li class="inline"><a href="#pll">Phase-Lock Loop Operations</a></li>
20 <li class="inline"><a href="#house">Clock Initialization and Management</a></li>
24 …clock discipline algorithm, which is best described as an adaptive parameter, hybrid phase/frequen…
26 <p>Figure 1. Clock Discipline Algorithm</p>
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| H A D | clock.html | 1 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
4 <meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
6 <title>Clock State Machine</title>
10 <h3>Clock State Machine</h3>
12 <!-- #BeginDate format:En2m -->4-Aug-2011 23:40<!-- #EndDate -->
25 …on and reference implementation a state machine is used to manage the system clock under exception…
26 … the clock discipline algorithm. its primary purpose is to determines whether the clock is slewed …
28 …-of-year (TOY) chip to maintain the time when the power is off. When the computer is restarted, t…
30 …clock discipline gradually slews the clock to the correct time, so that the time is effectively co…
31 …ed and the clock is always slewed. The daemon sets the step threshold to 600 s using the <tt>-x</t…
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| H A D | extern.html | 1 <!DOCTYPE html PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
4 <meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
6 <title>External Clock Discipline and the Local Clock Driver</title>
10 <h3>External Clock Discipline and the Local Clock Driver</h3>
12 <!-- #BeginDate format:En2m -->9-May-2014 04:46<!-- #EndDate -->
15 <p>The NTPv4 implementation includes provisions for an external clock, where
16 the system clock is implemented by some external hardware device.
20 Service (DTSS), where the system time is disciplined to this protocol and
22 A third implementation might be a completely separate clock discipline algorithm
25 …clock driver and NTP daemon <tt>ntpd</tt> to communicate and determine which discipline is in cont…
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| H A D | history.html | 1 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
4 <meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
12 <!-- #BeginDate format:En2m -->10-Mar-2014 05:07<!-- #EndDate -->
27 … and upgrade circa 2003. Headway violations result in an optional <em>kiss-o'-death</em> (KoD) pac…
31 <h4>5. Frequency File</h4>
32 …frequency training has always been a problem, as it can take a very long time to trim the frequenc…
33 …clock state machine so that, if no frequency file is available, an initial training interval of 30…
34 …frequency error is large, the time offset at the end of the period can be moderately large, which …
35 …frequency file was written at one-hour intervals. This apparently makes embedded systems folks ner…
37 …show leap warning bits or if one or more of the survivors are a reference clock with leap warning …
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| /freebsd/lib/libsys/ |
| H A D | ntp_adjtime.2 | 36 .Nd Network Time Protocol (NTP) daemon interface system calls
46 The two system calls
55 function is used by the NTP daemon to adjust the system clock to an
61 to adjust the phase and frequency of the phase- or frequency-lock loop
62 (PLL resp. FLL) which controls the system clock.
78 .Bd -literal
80 unsigned int modes; /* clock mode bits (wo) */
82 long freq; /* frequency offset (scaled ppm) (rw) */
85 int status; /* clock status bits (rw) */
87 long precision; /* clock precision (us) (ro) */
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| /freebsd/contrib/ntp/ntpd/ |
| H A D | ntpd.1ntpdmdoc | 4 .\" EDIT THIS FILE WITH CAUTION (ntpd-opts.mdoc)
6 .\" It has been AutoGen-ed May 25, 2024 at 12:03:54 AM by AutoGen 5.18.16
7 .\" From the definitions ntpd-opts.def
8 .\" and the template file agmdoc-cmd.tpl
17 .Op Fl \-option\-name Ns Oo Oo Ns "=| " Oc Ns Ar value Oc
23 utility is an operating system daemon which sets
24 and maintains the system time of day in synchronism with Internet
27 Network Time Protocol (NTP) version 4, as defined by RFC\-5905,
29 version 3, as defined by RFC\-130
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| H A D | ntpd.mdoc.in | 4 .\" EDIT THIS FILE WITH CAUTION (ntpd-opts.mdoc)
6 .\" It has been AutoGen-ed May 25, 2024 at 12:03:54 AM by AutoGen 5.18.16
7 .\" From the definitions ntpd-opts.def
8 .\" and the template file agmdoc-cmd.tpl
17 .Op Fl \-option\-name Ns Oo Oo Ns "=| " Oc Ns Ar value Oc
23 utility is an operating system daemon which sets
24 and maintains the system time of day in synchronism with Internet
27 Network Time Protocol (NTP) version 4, as defined by RFC\-5905,
29 version 3, as defined by RFC\-130
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| H A D | ntpd-opts.def | 1 /* -*- Mode: Text -*- */
7 prog-name = "ntpd";
8 prog-title = "set clock via Network Time Protocol daemon";
11 #include ntpdbase-opts.def
14 explain = <<- _END_EXPLAIN
17 doc-section = {
18 ds-type = 'DESCRIPTION';
19 ds-format = 'mdoc';
20 ds-text = <<- _END_PROG_MDOC_DESCRIP
23 utility is an operating system daemon which sets
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| H A D | ntpd.1ntpdman | 2 . it 1 an-trap
6 .ds B-Font [CB]
7 .ds I-Font [CI]
8 .ds R-Font [CR]
10 .ds B-Font B
11 .ds I-Font I
12 .ds R-Font R
15 .\" EDIT THIS FILE WITH CAUTION (in-mem file)
17 .\" It has been AutoGen-ed May 25, 2024 at 12:04:07 AM by AutoGen 5.18.16
18 .\" From the definitions ntpd-opt
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| H A D | ntpd.man.in | 2 . it 1 an-trap
6 .ds B-Font [CB]
7 .ds I-Font [CI]
8 .ds R-Font [CR]
10 .ds B-Font B
11 .ds I-Font I
12 .ds R-Font R
15 .\" EDIT THIS FILE WITH CAUTION (in-mem file)
17 .\" It has been AutoGen-ed May 25, 2024 at 12:04:07 AM by AutoGen 5.18.16
18 .\" From the definitions ntpd-opt
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| H A D | ntp_loopfilter.c | 2 * ntp_loopfilter.c - implements the NTP loop filter algorithm
32 * This is an implementation of the clock discipline algorithm described
33 * in UDel TR 97-4-3, as amended. It operates as an adaptive parameter,
34 * hybrid phase/frequency-lock loop. A number of sanity checks are
41 #define CLOCK_PHI 15e-6 /* max frequency error (s/s) */
47 #define CLOCK_LIMIT 30 /* poll-adjust threshold */
48 #define CLOCK_PGATE 4. /* poll-adjus
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| /freebsd/sys/contrib/device-tree/Bindings/clock/ |
| H A D | qoriq-clock.txt | 1 * Clock Block on Freescale QorIQ Platforms
4 SYSCLK signal. The SYSCLK input (frequency) is multiplied using
14 --------------- -------------
18 1. Clock Block Binding
21 - compatible: Should contain a chip-specific clock block compatible
22 string and (if applicable) may contain a chassis-version clock
25 Chip-specific strings are of the form "fsl,<chip>-clockgen", such as:
26 * "fsl,p2041-clockgen"
27 * "fsl,p3041-clockgen"
28 * "fsl,p4080-clockgen"
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| H A D | nvidia,tegra124-car.yaml | 1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/nvidia,tegra124-ca
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| H A D | lpc1850-cgu.txt | 1 * NXP LPC1850 Clock Generation Unit (CGU)
4 peripheral blocks of the LPC18xx. Each independent clock is called
5 a base clock and itself is one of the inputs to the two Clock
9 The CGU selects the inputs to the clock generators from multiple
10 clock sources, controls the clock generation, and routes the outputs
11 of the clock generators through the clock source bus to the output
12 stages. Each output stage provides an independent clock source and
15 - Above text taken from NXP LPC1850 User Manual.
18 This binding uses the common clock binding:
19 Documentation/devicetree/bindings/clock/clock-bindings.txt
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| H A D | renesas,emev2-smu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/renesas,emev2-smu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas EMMA Mobile EV2 System Management Unit
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Magnus Damm <magnus.damm@gmail.com>
14 The System Management Unit is described in user's manual R19UH0037EJ1000_SMU.
15 This is not a clock provider, but clocks under SMU depend on it.
19 const: renesas,emev2-smu
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| /freebsd/sys/contrib/device-tree/Bindings/ptp/ |
| H A D | ptp-qoriq.txt | 1 * Freescale QorIQ 1588 timer based PTP clock
5 - compatible Should be "fsl,etsec-ptp" for eTSEC
6 Should be "fsl,fman-ptp-timer" for DPAA FMan
7 Should be "fsl,dpaa2-ptp" for DPAA2
8 Should be "fsl,enetc-ptp" for ENETC
9 - reg Offset and length of the register set for the device
10 - interrupts There should be at least two interrupts. Some devices
13 Clock Properties:
15 - fsl,cksel Timer reference clock source.
16 - fsl,tclk-period Timer reference clock period in nanoseconds.
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| H A D | fsl,ptp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale QorIQ 1588 timer based PTP clock
10 - Frank Li <Frank.Li@nxp.com>
15 - enum:
16 - fsl,etsec-ptp
17 - fsl,fman-ptp-timer
18 - fsl,dpaa2-ptp
19 - items:
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| /freebsd/contrib/ntp/html/hints/ |
| H A D | solaris.html | 10 <!-- #BeginDate format:En2m -->27-Jan-2014 05:31<!-- #EndDate -->
13 <! -- This is deliberately not a mailto -- > <jhawk@MIT.EDU>
23 <A HREF="solaris-dosynctodr.html">Here is the report</A>.
26 variable <I>dosynctodr</I> to zero (meaning "do not synchronize the clock
27 to the hardware time-of-day clock"). This can be done with the
30 tickadj -s
34 echo dosynctodr/W0 | adb -k -w /dev/ksyms /dev/mem
37 Or, it can also be set by adding a line to /etc/system:
43 systems use to control microseconds added to the system time every
44 clock tick (c.f. <A HREF="#frequency_tolerance">Dealing
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| /freebsd/sys/contrib/device-tree/Bindings/timer/ |
| H A D | brcm,bcm2835-system-timer.txt | 1 BCM2835 System Timer
3 The System Timer peripheral provides four 32-bit timer channels and a
4 single 64-bit free running counter. Each channel has an output compare
10 - compatible : should be "brcm,bcm2835-system-timer"
11 - reg : Specifies base physical address and size of the registers.
12 - interrupts : A list of 4 interrupt sinks; one per timer channel.
13 - clock-frequency : The frequency of the clock that drives the counter, in Hz.
18 compatible = "brcm,bcm2835-system-timer";
21 clock-frequency = <1000000>;
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| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | simple-card.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/simple-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
14 frame-maste
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| /freebsd/contrib/ntp/html/drivers/ |
| H A D | driver36.html | 1 <!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN">
4 <meta http-equiv="content-type" content="text/html;charset=iso-8859-1">
13 <!-- #BeginDate format:En2m -->15-Nov-2012 06:42<!-- #EndDate -->
20 Autotune Port: <tt>/dev/icom</tt>; 1200/9600 baud, 8-bits, no parity<br>
23 …frequency stations <a href="http://www.bldrdoc.gov/timefreq/stations/wwv.html">WWV</a> in Ft. Coll…
24 …-law companding to demodulate the data. This is the same standard as used by the telephone industr…
25 …o-hop propagation delay varies from 9.3 ms in sunlight to 9.0 ms in moonlight. When not tracking t…
26 …r, the mean offset with a 2.4-GHz P4 running FreeBSD 6.1 is generally within 0.1 ms short-term wit…
27 …his page. Note that additional checks are done elsewhere in the reference clock interface routines…
28 …okup, debugging and monitoring, see the <a href="../audio.html">Reference Clock Audio Drivers</a> …
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| /freebsd/contrib/ntp/kernel/sys/ |
| H A D | timex.h | 21 * Added defines for hybrid phase/frequency-lock loop.
25 * defines for PPS phase-lock loop.
28 * Revised status codes and structures for external clock and PPS
45 * ntp_gettime - NTP user application interface
56 * ntp_adjtime - NTP daemon application interface
76 * phase-lock loop (PLL) model used in the kernel implementation. These
81 * establishes the timer interrupt frequency, 100 Hz for the SunOS
98 #define SHIFT_KF 16 /* PLL frequency factor (shift) */
99 #define SHIFT_KH 2 /* FLL frequency factor (shift) */
105 * possible without overflow of a 32-bit word.
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| /freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
| H A D | nvidia,tegra30-mc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/nvidia,tegra30-mc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dmitry Osipenko <digetx@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Thierry Reding <thierry.reding@gmail.com>
18 clock from a group of clients. Typically, a system has a single Arbitration
20 Arbitration Domains to increase the effective system bandwidth.
22 Protocol Arbiter, which manage a related pool of memory devices. A system
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| /freebsd/sys/contrib/device-tree/src/arm64/broadcom/ |
| H A D | bcm2712.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #address-cells = <2>;
8 #size-cells = <2>;
10 interrupt-parent = <&gicv2>;
13 /* The oscillator is the root of the clock tree. */
14 clk_osc: clk-osc {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-output-names = "osc";
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| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | cirrus,lochnagar.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - patches@opensource.cirrus.com
15 Logic devices on mini-cards, as well as allowing connection of
17 platform. Audio system topology, clocking and power can all be
25 [2] include/dt-bindings/pinctrl/lochnagar.h
26 [3] include/dt-bindings/clock/lochnagar.h
28 And these documents for the required sub-node binding details:
29 [4] Clock: ../clock/cirrus,lochnagar.yaml
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