| /linux/arch/riscv/boot/dts/starfive/ |
| H A D | jh7110.dtsi | 65 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>;
98 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>;
131 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>;
164 clocks = <&syscrg JH7110_SYSCLK_CPU_CORE>;
392 clocks = <&syscrg JH7110_SYSCLK_UART0_CORE>,
393 <&syscrg JH7110_SYSCLK_UART0_APB>;
395 resets = <&syscrg JH7110_SYSRST_UART0_APB>,
396 <&syscrg JH7110_SYSRST_UART0_CORE>;
406 clocks = <&syscrg JH7110_SYSCLK_UART1_CORE>,
407 <&syscrg JH7110_SYSCLK_UART1_APB>;
[all …]
|
| H A D | jh7110-starfive-visionfive-2-v1.2a.dts | 17 assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>,
18 <&syscrg JH7110_SYSCLK_GMAC1_RX>;
19 assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>,
20 <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
|
| H A D | jh7110-common.dtsi | 271 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO0_SDCARD>;
289 assigned-clocks = <&syscrg JH7110_SYSCLK_SDIO1_SDCARD>;
367 &syscrg {
368 assigned-clocks = <&syscrg JH7110_SYSCLK_CPU_ROOT>,
369 <&syscrg JH7110_SYSCLK_BUS_ROOT>,
370 <&syscrg JH7110_SYSCLK_PERH_ROOT>,
371 <&syscrg JH7110_SYSCLK_QSPI_REF>,
372 <&syscrg JH7110_SYSCLK_CPU_CORE>,
377 <&syscrg JH7110_SYSCLK_QSPI_REF_SRC>;
|
| H A D | jh7110-starfive-visionfive-2-v1.3b.dts | 23 assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>;
24 assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
|
| H A D | jh7110-pine64-star64.dts | 28 assigned-clocks = <&syscrg JH7110_SYSCLK_GMAC1_TX>;
29 assigned-clock-parents = <&syscrg JH7110_SYSCLK_GMAC1_RMII_RTX>;
|
| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | starfive,jh7110-tdm.yaml | 83 clocks = <&syscrg 184>,
84 <&syscrg 185>,
85 <&syscrg 186>,
86 <&syscrg 187>,
87 <&syscrg 17>,
92 resets = <&syscrg 105>,
93 <&syscrg 107>,
94 <&syscrg 106>;
|
| H A D | starfive,jh7110-pwmdac.yaml | 69 clocks = <&syscrg 157>,
70 <&syscrg 158>;
72 resets = <&syscrg 96>;
|
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | starfive,jh7110-stgcrg.yaml | 69 <&syscrg JH7110_SYSCLK_HIFI4_CORE>,
70 <&syscrg JH7110_SYSCLK_STG_AXIAHB>,
71 <&syscrg JH7110_SYSCLK_USB_125M>,
72 <&syscrg JH7110_SYSCLK_CPU_BUS>,
73 <&syscrg JH7110_SYSCLK_HIFI4_AXI>,
74 <&syscrg JH7110_SYSCLK_NOCSTG_BUS>,
75 <&syscrg JH7110_SYSCLK_APB_BUS>;
|
| H A D | starfive,jh7110-voutcrg.yaml | 77 clocks = <&syscrg JH7110_SYSCLK_VOUT_SRC>,
78 <&syscrg JH7110_SYSCLK_VOUT_TOP_AHB>,
79 <&syscrg JH7110_SYSCLK_VOUT_TOP_AXI>,
80 <&syscrg JH7110_SYSCLK_VOUT_TOP_HDMITX0_MCLK>,
81 <&syscrg JH7110_SYSCLK_I2STX0_BCLK>,
86 resets = <&syscrg JH7110_SYSRST_VOUT_TOP_SRC>;
|
| H A D | starfive,jh7110-ispcrg.yaml | 75 clocks = <&syscrg JH7110_SYSCLK_ISP_TOP_CORE>,
76 <&syscrg JH7110_SYSCLK_ISP_TOP_AXI>,
77 <&syscrg JH7110_SYSCLK_NOC_BUS_ISP_AXI>,
81 resets = <&syscrg JH7110_SYSRST_ISP_TOP>,
82 <&syscrg JH7110_SYSRST_ISP_TOP_AXI>,
83 <&syscrg JH7110_SYSRST_NOC_BUS_ISP_AXI>;
|
| H A D | starfive,jh7110-aoncrg.yaml | 97 <&syscrg JH7110_SYSCLK_STG_AXIAHB>,
98 <&syscrg JH7110_SYSCLK_APB_BUS>,
99 <&syscrg JH7110_SYSCLK_GMAC0_GTXCLK>,
|
| H A D | starfive,jh7110-syscrg.yaml | 4 $id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml#
14 const: starfive,jh7110-syscrg
102 compatible = "starfive,jh7110-syscrg";
|
| /linux/Documentation/devicetree/bindings/media/ |
| H A D | starfive,jh7110-camss.yaml | 133 <&syscrg 51>,
134 <&syscrg 52>;
146 <&syscrg 41>,
147 <&syscrg 42>;
|
| /linux/Documentation/devicetree/bindings/mmc/ |
| H A D | starfive,jh7110-mmc.yaml | 66 clocks = <&syscrg 91>,
67 <&syscrg 93>;
69 resets = <&syscrg 64>;
|
| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | starfive,jh7110-sys-pinctrl.yaml | 113 clocks = <&syscrg 112>;
114 resets = <&syscrg 2>;
|
| /linux/drivers/clk/starfive/ |
| H A D | clk-starfive-jh7110.h | 7 /* top clocks of ISP/VOUT domain from JH7110 SYSCRG */
|
| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | starfive,jh7110-usb-phy.yaml | 46 clocks = <&syscrg 95>,
|
| H A D | starfive,jh7110-dphy-tx.yaml | 64 resets = <&syscrg 10>;
|
| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | starfive,jh7110-usb.yaml | 92 clocks = <&syscrg 4>,
|
| /linux/include/dt-bindings/reset/ |
| H A D | starfive,jh7110-crg.h | 10 /* SYSCRG resets */
|
| /linux/include/dt-bindings/clock/ |
| H A D | starfive,jh7110-crg.h | 16 /* SYSCRG clocks */
|