| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | ti,j721e-pci-host.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com/ 4 --- 5 $id: http://devicetree.org/schemas/pci/ti,j721e-pci-host.yaml# 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: TI J721E PCI Host (PCIe Wrapper) 11 - Kishon Vijay Abraham I <kishon@ti.com> 16 - const: ti,j721e-pcie-host 17 - const: ti,j784s4-pcie-host 18 - description: PCIe controller in AM64 [all …]
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| H A D | ti,j721e-pci-ep.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 # Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ 4 --- [all...] |
| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | syscon.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/mfd/syscon.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 12 represent as any specific type of device. The typical use-case is 13 for some other node's driver, or platform-specific code, to acquire 14 a reference to the syscon node (e.g. by phandle, node path, or 20 - Lee Jones <lee@kernel.org> 24 # syscon fallback. 30 - al,alpine-sysfabric-servic [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/soc/imx/ |
| H A D | fsl,imx8mp-hsio-blk-ctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/imx/fsl,imx8mp-hsio-blk-ctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8MP HSIO blk-ctrl 10 - Lucas Stach <l.stach@pengutronix.de> 13 The i.MX8MP HSIO blk-ctrl is a top-level peripheral providing access to 14 the NoC and ensuring proper power sequencing of the high-speed IO 15 (USB an PCIe) peripherals located in the HSIO domain of the SoC. 20 - const: fsl,imx8mp-hsio-blk-ctrl [all …]
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| /freebsd/sys/contrib/device-tree/Bindings/phy/ |
| H A D | ti-phy.txt | 6 - compatible: Should be one of 7 "ti,control-phy-otghs" - if it has otghs_control mailbox register as on OMAP4. 8 "ti,control-phy-usb2" - if it has Power down bit in control_dev_conf register 10 "ti,control-phy-pipe3" - i [all...] |
| /freebsd/sys/contrib/device-tree/src/arm64/ti/ |
| H A D | k3-j784s4-evm-pcie0-pcie1-ep.dtso | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 8 * Copyright (C) 2024 Texas Instruments Incorporated - https://www.ti.com/ 11 /dts-v1/; 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 #include <dt-bindings/soc/ti,sci_pm_domain.h> 17 #include "k3-pinctrl.h" 32 #address-cells = <2>; 33 #size-cells = <2>; 34 interrupt-parent = <&gic500>; 36 pcie0_ep: pcie-ep@2900000 { [all …]
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| H A D | k3-j721s2-evm-pcie1-ep.dtso | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 8 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 11 /dts-v1/; 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 #include <dt-bindings/soc/ti,sci_pm_domain.h> 17 #include "k3-pinctrl.h" 28 #address-cells = <2>; 29 #size-cells = <2>; 30 interrupt-parent = <&gic500>; 32 pcie1_ep: pcie-ep@2910000 { [all …]
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| H A D | k3-j721e-evm-pcie0-ep.dtso | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 8 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 11 /dts-v1/; 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 #include <dt-bindings/soc/ti,sci_pm_domain.h> 17 #include "k3-pinctrl.h" 28 #address-cells = <2>; 29 #size-cells = <2>; 30 interrupt-parent = <&gic500>; 32 pcie0_ep: pcie-ep@2900000 { [all …]
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| H A D | k3-j722s-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clk-0 { 13 compatible = "fixed-clock"; 14 #clock-cells = <0>; 15 clock-frequency = <0>; 21 compatible = "ti,am64-wiz-10g"; 23 #address-cells = <1>; [all …]
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| H A D | k3-am65-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy-am654-serdes.h> 11 compatible = "mmio-sram"; 13 #address-cells = <1>; 14 #size-cells = <1>; 17 atf-sram@0 { 21 sysfw-sram@f0000 { 25 l3cache-sram@100000 { 30 gic500: interrupt-controller@1800000 { [all …]
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| H A D | k3-j784s4-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/mux/mux.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/phy/phy-ti.h> 12 #include "k3-serdes.h" 15 serdes_refclk: clock-serdes { 16 #clock-cells = <0>; 17 compatible = "fixed-clock"; 25 compatible = "mmio-sram"; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/mediatek/ |
| H A D | mt7629.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/mt7629-clk.h> 11 #include <dt-bindings/power/mt7622-power.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/phy/phy.h> 14 #include <dt-bindings/reset/mt7629-resets.h> 18 interrupt-parent = <&sysirq>; 19 #address-cells = <1>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/hisilicon/ |
| H A D | hip06.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 compatible = "hisilicon,hip06-d03"; 12 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <2>; 17 compatible = "arm,psci-0.2"; 22 #address-cells = <1>; 23 #size-cells = <0>; 25 cpu-map { [all …]
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| H A D | hip07.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 compatible = "hisilicon,hip07-d05"; 12 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <2>; 17 compatible = "arm,psci-0.2"; 22 #address-cells = <1>; 23 #size-cells = <0>; 25 cpu-map { [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
| H A D | mt7622.dtsi | 6 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/clock/mt7622-clk.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/power/mt7622-power.h> 14 #include <dt-bindings/reset/mt7622-reset.h> 15 #include <dt-bindings/thermal/thermal.h> 19 interrupt-parent = <&sysirq>; 20 #address-cells = <2>; [all …]
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| /freebsd/sys/contrib/device-tree/src/mips/brcm/ |
| H A D | bcm7435.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <175625000>; 42 cpu_intc: interrupt-controller { 43 #address-cells = <0>; 44 compatible = "mti,cpu-interrupt-controller"; 46 interrupt-controller; [all …]
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| H A D | bcm7425.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #address-cells = <1>; 4 #size-cells = <1>; 8 #address-cells = <1>; 9 #size-cells = <0>; 11 mips-hpt-frequency = <163125000>; 30 cpu_intc: interrupt-controller { 31 #address-cells = <0>; 32 compatible = "mti,cpu-interrupt-controller"; 34 interrupt-controller; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8mp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mp-clock.h> 7 #include <dt-bindings/power/imx8mp-power.h> 8 #include <dt-bindings/reset/imx8mp-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/input/input.h> 11 #include <dt-bindings/interconnect/fsl,imx8mp.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 15 #include "imx8mp-pinfunc.h" [all …]
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| H A D | imx8mm.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8mm-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/input/input.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/power/imx8mm-power.h> 11 #include <dt-bindings/reset/imx8mq-reset.h> 12 #include <dt-bindings/thermal/thermal.h> 14 #include "imx8mm-pinfunc.h" 17 interrupt-parent = <&gic>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/marvell/ |
| H A D | armada-cp11x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 8 #include <dt-bindings/interrupt-controller/mvebu-icu.h> 9 #include <dt-bindings/thermal/thermal.h> 11 #include "armada-common.dtsi" 27 thermal-zones { 28 CP11X_LABEL(thermal_ic): CP11X_NODE_NAME(ic-thermal) { 29 polling-delay-passive = <0>; /* Interrupt driven */ 30 polling-delay = <0>; /* Interrupt driven */ 32 thermal-sensors = <&CP11X_LABEL(thermal) 0>; 42 cooling-maps { }; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/marvell/ |
| H A D | dove.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/gpio/gpio.h> 3 #include <dt-bindings/interrupt-controller/irq.h> 8 #address-cells = <1>; 9 #size-cells = <1>; 12 interrupt-parent = <&intc>; 21 #address-cells = <1>; 22 #size-cells = <0>; 25 compatible = "marvell,pj4a", "marvell,sheeva-v7"; 27 next-level-cache = <&l2>; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/qcom/ |
| H A D | qcom-apq8064.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/clock/qcom,gcc-msm8960.h> 5 #include <dt-bindings/clock/qcom,lcc-msm8960.h> 6 #include <dt-bindings/reset/qcom,gcc-msm8960.h> 7 #include <dt-bindings/clock/qcom,mmcc-msm8960.h> 8 #include <dt-bindings/clock/qcom,rpmcc.h> 9 #include <dt-bindings/soc/qcom,gsbi.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
| H A D | bcm-nsp.dtsi | 33 #include <dt-bindings/interrupt-controller/arm-gic.h> 34 #include <dt-bindings/interrupt-controller/irq.h> 35 #include <dt-bindings/clock/bcm-nsp.h> 38 #address-cells = <1>; 39 #size-cells = <1>; 42 interrupt-paren [all...] |
| /freebsd/sys/contrib/device-tree/src/arm64/broadcom/bcm4908/ |
| H A D | bcm4908.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 3 #include <dt-bindings/interrupt-controller/irq.h> 4 #include <dt-bindings/interrupt-controller/arm-gic.h> 5 #include <dt-bindings/phy/phy.h> 6 #include <dt-bindings/soc/bcm-pmb.h> 8 /dts-v1/; 11 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <2>; 21 stdout-path = "serial0:115200n8"; [all …]
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| /freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | dra7.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/clock/dra7.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/dra.h> 12 #include <dt-bindings/clock/dra7.h> 17 #address-cells = <2>; 18 #size-cells = <2>; 21 interrupt-parent = <&crossbar_mpu>; [all …]
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