1*8d13bc63SEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0 2*8d13bc63SEmmanuel Vadot/** 3*8d13bc63SEmmanuel Vadot * DT Overlay for enabling PCIE0 instance in Endpoint Configuration with the 4*8d13bc63SEmmanuel Vadot * J7 common processor board. 5*8d13bc63SEmmanuel Vadot * 6*8d13bc63SEmmanuel Vadot * J7 Common Processor Board Product Link: https://www.ti.com/tool/J721EXCPXEVM 7*8d13bc63SEmmanuel Vadot * 8*8d13bc63SEmmanuel Vadot * Copyright (C) 2023 Texas Instruments Incorporated - https://www.ti.com/ 9*8d13bc63SEmmanuel Vadot */ 10*8d13bc63SEmmanuel Vadot 11*8d13bc63SEmmanuel Vadot/dts-v1/; 12*8d13bc63SEmmanuel Vadot/plugin/; 13*8d13bc63SEmmanuel Vadot 14*8d13bc63SEmmanuel Vadot#include <dt-bindings/interrupt-controller/arm-gic.h> 15*8d13bc63SEmmanuel Vadot#include <dt-bindings/soc/ti,sci_pm_domain.h> 16*8d13bc63SEmmanuel Vadot 17*8d13bc63SEmmanuel Vadot#include "k3-pinctrl.h" 18*8d13bc63SEmmanuel Vadot 19*8d13bc63SEmmanuel Vadot/* 20*8d13bc63SEmmanuel Vadot * Since Root Complex and Endpoint modes are mutually exclusive 21*8d13bc63SEmmanuel Vadot * disable Root Complex mode. 22*8d13bc63SEmmanuel Vadot */ 23*8d13bc63SEmmanuel Vadot&pcie0_rc { 24*8d13bc63SEmmanuel Vadot status = "disabled"; 25*8d13bc63SEmmanuel Vadot}; 26*8d13bc63SEmmanuel Vadot 27*8d13bc63SEmmanuel Vadot&cbass_main { 28*8d13bc63SEmmanuel Vadot #address-cells = <2>; 29*8d13bc63SEmmanuel Vadot #size-cells = <2>; 30*8d13bc63SEmmanuel Vadot interrupt-parent = <&gic500>; 31*8d13bc63SEmmanuel Vadot 32*8d13bc63SEmmanuel Vadot pcie0_ep: pcie-ep@2900000 { 33*8d13bc63SEmmanuel Vadot compatible = "ti,j721e-pcie-ep"; 34*8d13bc63SEmmanuel Vadot reg = <0x00 0x02900000 0x00 0x1000>, 35*8d13bc63SEmmanuel Vadot <0x00 0x02907000 0x00 0x400>, 36*8d13bc63SEmmanuel Vadot <0x00 0x0d000000 0x00 0x00800000>, 37*8d13bc63SEmmanuel Vadot <0x00 0x10000000 0x00 0x08000000>; 38*8d13bc63SEmmanuel Vadot reg-names = "intd_cfg", "user_cfg", "reg", "mem"; 39*8d13bc63SEmmanuel Vadot interrupt-names = "link_state"; 40*8d13bc63SEmmanuel Vadot interrupts = <GIC_SPI 318 IRQ_TYPE_EDGE_RISING>; 41*8d13bc63SEmmanuel Vadot ti,syscon-pcie-ctrl = <&scm_conf 0x4070>; 42*8d13bc63SEmmanuel Vadot max-link-speed = <3>; 43*8d13bc63SEmmanuel Vadot num-lanes = <1>; 44*8d13bc63SEmmanuel Vadot power-domains = <&k3_pds 239 TI_SCI_PD_EXCLUSIVE>; 45*8d13bc63SEmmanuel Vadot clocks = <&k3_clks 239 1>; 46*8d13bc63SEmmanuel Vadot clock-names = "fck"; 47*8d13bc63SEmmanuel Vadot max-functions = /bits/ 8 <6>; 48*8d13bc63SEmmanuel Vadot max-virtual-functions = /bits/ 8 <4 4 4 4 0 0>; 49*8d13bc63SEmmanuel Vadot dma-coherent; 50*8d13bc63SEmmanuel Vadot phys = <&serdes0_pcie_link>; 51*8d13bc63SEmmanuel Vadot phy-names = "pcie-phy"; 52*8d13bc63SEmmanuel Vadot }; 53*8d13bc63SEmmanuel Vadot}; 54