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/linux/arch/arm/boot/dts/ti/omap/
H A Domap4.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
6 #include <dt-bindings/bus/ti-sysc.h>
7 #include <dt-bindings/clock/omap4.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/omap.h>
11 #include <dt-bindings/clock/omap4.h>
14 compatible = "ti,omap4430", "ti,omap4";
15 interrupt-parent = <&wakeupgen>;
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H A Domap5-l4-abe.dtsi2 compatible = "ti,omap5-l4-abe", "simple-pm-bus";
5 reg-names = "la", "ap";
6 power-domains = <&prm_abe>;
7 /* OMAP5_L4_ABE_CLKCTRL is read-only */
8 #address-cells = <1>;
9 #size-cells = <1>;
13 compatible = "simple-pm-bus";
14 #address-cells = <1>;
15 #size-cells = <1>;
89 target-module@22000 { /* 0x40122000, ap 2 02.0 */
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H A Domap5.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
5 * Based on "omap4.dtsi"
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/omap.h>
12 #include <dt-bindings/clock/omap5.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
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H A Dam33xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/am33xx.h>
11 #include <dt-bindings/clock/am3.h>
15 interrupt-parent = <&intc>;
16 #address-cells = <1>;
17 #size-cells = <1>;
30 d-can0 = &dcan0;
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H A Ddra7.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
5 * Based on "omap4.dtsi"
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/clock/dra7.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/dra.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
20 interrupt-parent = <&crossbar_mpu>;
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H A Ddra72x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
5 * Based on "omap4.dtsi"
20 compatible = "arm,cortex-a15-pmu";
21 interrupt-parent = <&wakeupgen>;
27 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */
28 compatible = "ti,sysc-omap4", "ti,sysc";
31 reg-names = "rev", "sysc";
32 ti,sysc-midle = <SYSC_IDLE_FORCE>,
34 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
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H A Ddra74x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
5 * Based on "omap4.dtsi"
16 compatible = "arm,cortex-a15";
18 operating-points-v2 = <&cpu0_opp_table>;
21 clock-names = "cpu";
23 clock-latency = <300000>; /* From omap-cpufreq driver */
26 #cooling-cells = <2>; /* min followed by max */
28 vbb-supply = <&abb_mpu>;
40 compatible = "arm,cortex-a15-pmu";
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H A Ddra76x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/
12 target-module@42c01900 {
13 compatible = "ti,sysc-dra7-mcan", "ti,sysc";
15 #address-cells = <1>;
16 #size-cells = <1>;
20 reg-names = "rev", "sysc", "syss";
21 ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET |
23 ti,syss-mask = <1>;
25 clock-names = "fck";
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/linux/Documentation/devicetree/bindings/bus/
H A Dti-sysc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/ti-sysc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
31 pattern: "^target-module(@[0-9a-f]+)?$"
35 - items:
36 - enum:
37 - ti,sysc-omap2
38 - ti,sysc-omap4
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/linux/arch/arm/mach-omap2/
H A Domap_hwmod_81xx_data.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010 Texas Instruments, Inc. - https://www.ti.com/
11 #include <linux/platform_data/hsmmc-omap.h>
25 * Common alwon .clkctrl_offs from dm814x TRM "Table 2-278. CM_ALWON REGISTERS"
78 #define DM816X_CM_ALWON_TIMER_1_CLKCTRL (0x1570 - DM816X_DM_ALWON_BASE)
79 #define DM816X_CM_ALWON_TIMER_2_CLKCTRL (0x1574 - DM816X_DM_ALWON_BASE)
80 #define DM816X_CM_ALWON_TIMER_3_CLKCTRL (0x1578 - DM816X_DM_ALWON_BASE)
81 #define DM816X_CM_ALWON_TIMER_4_CLKCTRL (0x157c - DM816X_DM_ALWON_BASE)
82 #define DM816X_CM_ALWON_TIMER_5_CLKCTRL (0x1580 - DM816X_DM_ALWON_BASE)
83 #define DM816X_CM_ALWON_TIMER_6_CLKCTRL (0x1584 - DM816X_DM_ALWON_BASE)
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H A Dwd_timer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * OMAP2+ MPU WD_TIMER-specific code
12 #include <linux/platform_data/omap-wd-timer.h>
37 return -EINVAL; in omap2_wd_timer_disable()
43 oh->name, __func__); in omap2_wd_timer_disable()
44 return -EINVAL; in omap2_wd_timer_disable()
60 * omap2_wd_timer_reset - reset and disable the WDTIMER IP block
65 * because the watchdog is re-armed upon OCP softreset. (On OMAP4,
67 * re-armed after an OCP soft-reset.) Returns -ETIMEDOUT if the reset
75 * Returns: %0 on success or -errno value on error.
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H A Domap_hwmod_common_data.c1 // SPDX-License-Identifier: GPL-2.0-only
12 * This data/structures are to be used while defining OMAP on-chip module
17 #include <linux/platform_data/ti-sysc.h>
24 * struct omap_hwmod_sysc_type1 - TYPE1 sysconfig scheme.
40 * struct omap_hwmod_sysc_type2 - TYPE2 sysconfig scheme.
44 * OMAP4 IPs.
54 * struct omap_hwmod_sysc_type3 - TYPE3 sysconfig scheme.
H A Ddisplay.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
63 .id = -1,
91 return -ENODEV; in omap4_dsi_mux_pads()
170 return -ENODEV; in omapdss_init_fbdev()
202 /* add DSI info for omap4 */ in omapdss_init_fbdev()
212 "ti,omap2-dss",
213 "ti,omap3-dss",
214 "ti,omap4-dss",
215 "ti,omap5-dss",
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H A Dpdata-quirks.c1 // SPDX-License-Identifier: GPL-2.0-only
20 #include <linux/platform_data/pinctrl-single.h>
21 #include <linux/platform_data/hsmmc-omap.h>
22 #include <linux/platform_data/iommu-omap.h>
23 #include <linux/platform_data/ti-sysc.h>
25 #include <linux/platform_data/asoc-ti-mcbsp.h>
26 #include <linux/platform_data/ti-prm.h>
30 #include "common-board-devices.h"
33 #include "omap-secure.h"
58 * Note that if the pins are used for MMC1, pbias-regulator
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H A Domap_hwmod.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
13 * These headers and macros are used to define OMAP on-chip module
16 * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this
20 * - add interconnect error log structures
21 * - init_conn_id_bit (CONNID_BIT_VECTOR)
22 * - implement default hwmod SMS/SDRC flags?
23 * - move Linux-specific data ("non-ROM data") out
65 * with the new PRCM protocol defined for new OMAP4 IPs.
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/linux/Documentation/devicetree/bindings/gpio/
H A Dti,omap-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/ti,omap-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Grygorii Strashko <grygorii.strashko@ti.com>
13 The general-purpose interface combines general-purpose input/output (GPIO) banks.
14 Each GPIO banks provides up to 32 dedicated general-purpose pins with input
15 and output capabilities; interrupt generation in active mode and wake-up
21 - enum:
22 - ti,omap2-gpio
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/linux/include/dt-bindings/bus/
H A Dti-sysc.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* TI sysc interconnect target module defines */
4 /* Generic sysc found on omap2 and later, also known as type1 */
11 /* Generic sysc found on omap4 and later, also known as type2 */
16 /* SmartReflex sysc found on 36xx and later */
21 /* PRUSS sysc found on AM33xx/AM43xx/AM57xx */
/linux/Documentation/devicetree/bindings/mailbox/
H A Dti,omap-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
35 lines can also be routed to different processor sub-systems on DRA7xx as they
49 within a SoC. The sub-mailboxes (actual communication channels) are
56 "mbox-names" (please see Documentation/devicetree/bindings/mailbox/mailbox.txt
59 phandle to the intended sub-mailbox child node to be used for communication.
60 The equivalent "mbox-names" property value can be used to give a name to the
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/linux/drivers/clocksource/
H A Dtimer-ti-32k.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * timer-ti-32k.c - OMAP2 32k Timer Support
15 * OMAP Dual-mode timer framework support by Timo Teras
19 * Copyright (C) 2004-2009 Texas Instruments, Inc.
22 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
24 * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com
38 * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
62 return (u64)readl_relaxed(ti->counter); in ti_32k_read_cycles()
86 clock = of_clk_get_by_name(np->parent, name); in ti_32k_timer_enable_clock()
89 if (PTR_ERR(clock) == -EINVAL && !strncmp("ick", name, 3)) in ti_32k_timer_enable_clock()
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/linux/drivers/usb/musb/
H A Domap2430.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2005-2007 by Texas Instruments
20 #include <linux/dma-mapping.h>
41 #define glue_to_musb(g) platform_get_drvdata(g->musb)
50 l = musb_readl(musb->mregs, OTG_FORCESTDBY); in omap2430_low_level_exit()
52 musb_writel(musb->mregs, OTG_FORCESTDBY, l); in omap2430_low_level_exit()
59 l = musb_readl(musb->mregs, OTG_FORCESTDBY); in omap2430_low_level_init()
61 musb_writel(musb->mregs, OTG_FORCESTDBY, l); in omap2430_low_level_init()
70 return -EPROBE_DEFER; in omap2430_musb_mailbox()
72 glue->status = status; in omap2430_musb_mailbox()
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/linux/drivers/tty/serial/8250/
H A D8250_omap.c1 // SPDX-License-Identifier: GPL-2.0
3 * 8250-core based driver for the OMAP internal UART
5 * based on omap-serial.c, Copyright (C) 2010 Texas Instruments.
28 #include <linux/dma-mapping.h>
71 /* SYSC register bitmasks */
176 return readl(priv->membase + (reg << OMAP_UART_REGSHIFT)); in uart_read()
186 struct omap8250_priv *priv = port->private_data; in __omap8250_set_mctrl()
191 if (!mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS)) { in __omap8250_set_mctrl()
198 if ((mctrl & TIOCM_RTS) && (port->status & UPSTAT_AUTORTS)) in __omap8250_set_mctrl()
199 priv->efr |= UART_EFR_RTS; in __omap8250_set_mctrl()
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/linux/
H A DMAINTAINERS5 ----------
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