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/linux/arch/arm/boot/dts/ti/omap/
H A Domap2420.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include "omap2.dtsi"
11 compatible = "ti,omap2420", "ti,omap2";
15 compatible = "ti,omap2-l4", "simple-bus";
16 #address-cells = <1>;
17 #size-cells = <1>;
21 compatible = "ti,omap2-prcm";
25 #address-cells = <1>;
26 #size-cells = <0>;
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H A Domap4.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
6 #include <dt-bindings/bus/ti-sysc.h>
7 #include <dt-bindings/clock/omap4.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/omap.h>
11 #include <dt-bindings/clock/omap4.h>
15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
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H A Domap5.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/omap.h>
12 #include <dt-bindings/clock/omap5.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
19 interrupt-parent = <&wakeupgen>;
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H A Ddra7.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/clock/dra7.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/dra.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
20 interrupt-parent = <&crossbar_mpu>;
47 compatible = "arm,armv7-timer";
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H A Ddra74x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
16 compatible = "arm,cortex-a15";
18 operating-points-v2 = <&cpu0_opp_table>;
21 clock-names = "cpu";
23 clock-latency = <300000>; /* From omap-cpufreq driver */
26 #cooling-cells = <2>; /* min followed by max */
28 vbb-supply = <&abb_mpu>;
40 compatible = "arm,cortex-a15-pmu";
41 interrupt-parent = <&wakeupgen>;
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H A Dam3517.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
11 /delete-node/ &aes1_target;
12 /delete-node/ &aes2_target;
24 operating-points-v2 = <&cpu0_opp_table>;
26 clock-latency = <300000>; /* From legacy driver */
30 cpu0_opp_table: opp-table {
31 compatible = "operating-points-v2-ti-cpu";
38 opp-50-300000000 {
40 opp-hz = /bits/ 64 <300000000>;
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H A Domap5-l4-abe.dtsi2 compatible = "ti,omap5-l4-abe", "simple-pm-bus";
5 reg-names = "la", "ap";
6 power-domains = <&prm_abe>;
7 /* OMAP5_L4_ABE_CLKCTRL is read-only */
8 #address-cells = <1>;
9 #size-cells = <1>;
13 compatible = "simple-pm-bus";
14 #address-cells = <1>;
15 #size-cells = <1>;
89 target-module@22000 { /* 0x40122000, ap 2 02.0 */
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H A Dam33xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/am33xx.h>
11 #include <dt-bindings/clock/am3.h>
15 interrupt-parent = <&intc>;
16 #address-cells = <1>;
17 #size-cells = <1>;
30 d-can0 = &dcan0;
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H A Domap34xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/media/omap3-isp.h>
16 /* OMAP343x/OMAP35xx variants OPP1-6 */
17 operating-points-v2 = <&cpu0_opp_table>;
19 clock-latency = <300000>; /* From legacy driver */
20 #cooling-cells = <2>;
24 cpu0_opp_table: opp-table {
25 compatible = "operating-points-v2-ti-cpu";
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/linux/arch/arm/mach-omap2/
H A Domap_hwmod_2xxx_ipblock_data.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap_hwmod_2xxx_ipblock_data.c - common IP block data for OMAP2xxx
13 #include "cm-regbits-24xx.h"
14 #include "prm-regbits-24xx.h"
35 .sysc = &omap2_dispc_sysc,
52 .sysc = &omap2xxx_timer_sysc,
57 * 32-bit watchdog upward counter that generates a pulse on the reset pin on
72 .sysc = &omap2xxx_wd_timer_sysc,
94 .sysc = &omap2xxx_gpio_sysc,
99 * mailbox module allowing communication between the on-chip processors
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H A Domap_hwmod_3xxx_data.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx chips
5 * Copyright (C) 2009-2011 Nokia Corporation
12 * XXX these should be marked initdata for multi-OMAP kernels
15 #include <linux/platform_data/i2c-omap.h>
17 #include <linux/platform_data/hsmmc-omap.h>
25 #include "prm-regbits-34xx.h"
26 #include "cm-regbits-34xx.h"
36 * is driver-specific or driver-kernel integration-specific belongs
105 .omap2 = {
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H A Domap_hwmod_2430_data.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips
5 * Copyright (C) 2009-2011 Nokia Corporation
10 * XXX these should be marked initdata for multi-OMAP kernels
13 #include <linux/platform_data/i2c-omap.h>
14 #include <linux/platform_data/hsmmc-omap.h>
21 #include "prm-regbits-24xx.h"
22 #include "cm-regbits-24xx.h"
31 * is driver-specific or driver-kernel integration-specific belongs
66 .sysc = &i2c_sysc,
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H A Dwd_timer.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * OMAP2+ MPU WD_TIMER-specific code
12 #include <linux/platform_data/omap-wd-timer.h>
37 return -EINVAL; in omap2_wd_timer_disable()
43 oh->name, __func__); in omap2_wd_timer_disable()
44 return -EINVAL; in omap2_wd_timer_disable()
60 * omap2_wd_timer_reset - reset and disable the WDTIMER IP block
63 * After the WDTIMER IP blocks are reset on OMAP2/3, we must also take
65 * because the watchdog is re-armed upon OCP softreset. (On OMAP4,
67 * re-armed after an OCP soft-reset.) Returns -ETIMEDOUT if the reset
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H A Domap_hwmod_2420_data.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips
5 * Copyright (C) 2009-2011 Nokia Corporation
10 * XXX these should be marked initdata for multi-OMAP kernels
13 #include <linux/platform_data/i2c-omap.h>
21 #include "cm-regbits-24xx.h"
22 #include "prm-regbits-24xx.h"
32 * is driver-specific or driver-kernel integration-specific belongs
88 .sysc = &i2c_sysc,
97 .omap2 = {
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H A Domap_hwmod_common_ipblock_data.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap_hwmod_common_ipblock_data.c - common IP block data for OMAP2+
15 * display sub-system
29 .sysc = &omap2_dss_sysc,
50 .sysc = &omap2_rfbi_sysc,
H A Domap_hwmod_2xxx_3xxx_ipblock_data.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap_hwmod_2xxx_3xxx_ipblock_data.c - common IP block data for OMAP2/3
11 #include <linux/omap-dma.h>
33 .sysc = &omap2_uart_sysc,
76 .sysc = &omap2_hdq1w_sysc,
H A Di2c.c1 // SPDX-License-Identifier: GPL-2.0-only
24 * omap_i2c_reset - reset the omap i2c module.
27 * The i2c moudle in omap2, omap3 had a special sequence to reset. The
29 * - Disable the I2C.
30 * - Write to SOFTRESET bit.
31 * - Enable the I2C.
32 * - Poll on the RESETDONE bit.
62 oh->class->sysc->syss_offs) in omap_i2c_reset()
68 __func__, oh->name, MAX_MODULE_SOFTRESET_WAIT); in omap_i2c_reset()
71 oh->name, c); in omap_i2c_reset()
H A Dhdq1w.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * IP block integration code for the HDQ1W/1-wire IP block
8 * Based on the I2C reset code in arch/arm/mach-omap2/i2c.c by
26 * omap_hdq1w_reset - reset the OMAP HDQ1W module
29 * OCP soft reset the HDQ1W IP block. Section 20.6.1.4 "HDQ1W/1-Wire
52 oh->class->sysc->syss_offs) in omap_hdq1w_reset()
58 __func__, oh->name, MAX_MODULE_SOFTRESET_WAIT); in omap_hdq1w_reset()
61 oh->name, c); in omap_hdq1w_reset()
H A Domap_hwmod.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2009-2011 Nokia Corporation
6 * Copyright (C) 2011-2012 Texas Instruments, Inc.
13 * These headers and macros are used to define OMAP on-chip module
16 * omap_hwmod code, in arch/arm/mach-omap2/omap_hwmod.c (as of this
20 * - add interconnect error log structures
21 * - init_conn_id_bit (CONNID_BIT_VECTOR)
22 * - implement default hwmod SMS/SDRC flags?
23 * - move Linux-specific data ("non-ROM data") out
155 * struct omap_hwmod_rst_info - IPs reset lines use by hwmod
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/linux/Documentation/devicetree/bindings/bus/
H A Dti-sysc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/ti-sysc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
31 pattern: "^target-module(@[0-9a-f]+)?$"
35 - items:
36 - enum:
37 - ti,sysc-omap2
38 - ti,sysc-omap4
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/linux/include/dt-bindings/bus/
H A Dti-sysc.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* TI sysc interconnect target module defines */
4 /* Generic sysc found on omap2 and later, also known as type1 */
11 /* Generic sysc found on omap4 and later, also known as type2 */
16 /* SmartReflex sysc found on 36xx and later */
21 /* PRUSS sysc found on AM33xx/AM43xx/AM57xx */
/linux/drivers/clocksource/
H A Dtimer-ti-32k.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * timer-ti-32k.c - OMAP2 32k Timer Support
15 * OMAP Dual-mode timer framework support by Timo Teras
19 * Copyright (C) 2004-2009 Texas Instruments, Inc.
22 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
24 * Copyright (C) 2015 Texas Instruments Incorporated - https://www.ti.com
38 * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
62 return (u64)readl_relaxed(ti->counter); in ti_32k_read_cycles()
86 clock = of_clk_get_by_name(np->parent, name); in ti_32k_timer_enable_clock()
89 if (PTR_ERR(clock) == -EINVAL && !strncmp("ick", name, 3)) in ti_32k_timer_enable_clock()
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/linux/Documentation/devicetree/bindings/mfd/
H A Dsyscon-common.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mfd/syscon-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 represent as any specific type of device. The typical use-case is
13 for some other node's driver, or platform-specific code, to acquire
20 - Lee Jones <lee@kernel.org>
29 - compatible
39 reg-io-width:
46 - compatible
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/linux/Documentation/devicetree/bindings/gpio/
H A Dti,omap-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/ti,omap-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Grygorii Strashko <grygorii.strashko@ti.com>
13 The general-purpose interface combines general-purpose input/output (GPIO) banks.
14 Each GPIO banks provides up to 32 dedicated general-purpose pins with input
15 and output capabilities; interrupt generation in active mode and wake-up
21 - enum:
22 - ti,omap2-gpio
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/linux/Documentation/devicetree/bindings/mailbox/
H A Dti,omap-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI OMAP2+ and K3 Mailbox devices
10 - Suman Anna <s-anna@ti.com>
35 lines can also be routed to different processor sub-systems on DRA7xx as they
49 within a SoC. The sub-mailboxes (actual communication channels) are
56 "mbox-names" (please see Documentation/devicetree/bindings/mailbox/mailbox.txt
59 phandle to the intended sub-mailbox child node to be used for communication.
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