/linux/arch/mips/boot/dts/mscc/ |
H A D | jaguar2_pcb111.dts | 64 synce_builtin_pins: synce-builtin-pins { 74 cpld_fifo_pins: synce-builtin-pins {
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H A D | jaguar2_pcb110.dts | 173 synce_pins: synce-pins { 178 synce_builtin_pins: synce-builtin-pins {
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/linux/drivers/gpu/drm/nouveau/dispnv50/ |
H A D | atom.h | 40 u16 synce; member 46 u16 synce; member
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H A D | headc37d.c | 225 NVVAL(NVC37D, HEAD_SET_RASTER_SYNC_END, X, m->h.synce) | in headc37d_mode() 226 NVVAL(NVC37D, HEAD_SET_RASTER_SYNC_END, Y, m->v.synce), in headc37d_mode()
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H A D | headc57d.c | 217 NVVAL(NVC57D, HEAD_SET_RASTER_SYNC_END, X, m->h.synce) | in headc57d_mode() 218 NVVAL(NVC57D, HEAD_SET_RASTER_SYNC_END, Y, m->v.synce), in headc57d_mode()
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H A D | head907d.c | 343 NVVAL(NV907D, HEAD_SET_RASTER_SYNC_END, X, m->h.synce) | in head907d_mode() 344 NVVAL(NV907D, HEAD_SET_RASTER_SYNC_END, Y, m->v.synce), in head907d_mode()
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H A D | head507d.c | 375 NVVAL(NV507D, HEAD_SET_RASTER_SYNC_END, X, m->h.synce) | in head507d_mode() 376 NVVAL(NV507D, HEAD_SET_RASTER_SYNC_END, Y, m->v.synce), in head507d_mode()
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H A D | head.c | 294 m->h.synce = mode->crtc_hsync_end - mode->crtc_hsync_start - 1; in nv50_head_atomic_check_mode() 299 m->v.synce = mode->crtc_vsync_end - mode->crtc_vsync_start - 1; in nv50_head_atomic_check_mode()
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/linux/Documentation/devicetree/bindings/mips/ |
H A D | mscc.txt | 31 configuration and status of PLL5, RCOMP, SyncE, SerDes configurations and
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/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | brcm,nsp-pinmux.txt | 67 "synce": "synce_grp"
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H A D | marvell,ac5-pinctrl.yaml | 35 spi0, spi1, synce, tsen_int, uart0, uart1, uart2, uart3, uartsd, wd_int, xg ]
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/linux/drivers/pinctrl/mvebu/ |
H A D | pinctrl-ac5.c | 188 MPP_FUNCTION(1, "synce", "clk_out0")), 191 MPP_FUNCTION(1, "synce", "clk_out1")),
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/linux/drivers/pinctrl/bcm/ |
H A D | pinctrl-nsp-mux.c | 164 NSP_PIN_DESC(18, "synce", 0), 251 NSP_PIN_GROUP(synce, NSP_MUX_BASE0, 17, 0x01, 0x01), 303 NSP_PIN_FUNCTION(synce),
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/linux/Documentation/driver-api/ |
H A D | dpll.rst | 133 'type': 'synce-eth-port' 559 SyncE enablement 561 For SyncE enablement it is required to allow control over dpll device
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/linux/drivers/pinctrl/ |
H A D | pinctrl-ocelot.c | 303 [FUNC_SYNCE] = "synce", 1207 LAN969X_P(27, GPIO, SYNCE, FC, MIIM, QSPI1, NONE, NONE, … 1208 LAN969X_P(28, GPIO, SYNCE, FC, MIIM, QSPI1, NONE, NONE, … 1209 LAN969X_P(29, GPIO, SYNCE, FC, MIIM_IRQ, QSPI1, NONE, NONE, … 1234 LAN969X_P(54, GPIO, SYNCE, FC, NONE, NONE, NONE, NONE, … 1235 LAN969X_P(55, GPIO, SYNCE, FC, NONE, NONE, NONE, NONE, … 1236 LAN969X_P(56, GPIO, SYNCE, FC, NONE, NONE, NONE, NONE, …
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/linux/Documentation/usb/ |
H A D | usb-serial.rst | 119 the USB connection. Please visit http://synce.sourceforge.net which 123 from the PDA and xcerdisp, synce utilities from the Linux side.
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/linux/drivers/clk/ |
H A D | clk-sparx5.c | 34 "synce",
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/linux/drivers/media/pci/tw68/ |
H A D | tw68-risc.c | 164 if (UNSET != bottom_offset) /* generates SYNCE */ in tw68_risc_buffer()
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/linux/Documentation/netlink/specs/ |
H A D | dpll.yaml | 157 name: synce-eth-port
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/linux/drivers/net/ethernet/intel/ice/ |
H A D | ice_debugfs.c | 48 "synce",
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H A D | ice.h | 521 ICE_FLAG_DPLL, /* SyncE/PTP dplls initialized */
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H A D | ice_adminq_cmd.h | 2838 /* 1588/SyncE commands/events */
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/linux/scripts/ |
H A D | get_dvb_firmware | 823 die "This firmware requires the unshield command - see http://sourceforge.net/projects/synce/\n";
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/linux/include/linux/ |
H A D | netdevice.h | 2036 * @dpll_pin: Pointer to the SyncE source pin of a DPLL subsystem,
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/linux/drivers/gpu/drm/amd/amdgpu/ |
H A D | gfx_v7_0.c | 3162 /* synce CE with ME to prevent CE fetch CEIB before context switch done */ in gfx_v7_0_ring_emit_vm_flush()
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