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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra124-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 emc_icc_dvfs_opp_table: opp-table-emc {
5 compatible = "operating-points-v2";
7 opp-12750000-800 {
8 opp-microvolt = <800000 800000 1150000>;
9 opp-hz = /bits/ 64 <12750000>;
10 opp-supported-hw = <0x0003>;
13 opp-12750000-950 {
14 opp-microvolt = <950000 950000 1150000>;
15 opp-hz = /bits/ 64 <12750000>;
[all …]
H A Dtegra30-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 core_opp_table: opp-table-core {
5 compatible = "operating-points-v2";
6 opp-shared;
8 core_opp_950: opp-950000 {
9 opp-microvolt = <950000 950000 1350000>;
10 opp-level = <950000>;
13 core_opp_1000: opp-1000000 {
14 opp-microvolt = <1000000 1000000 1350000>;
15 opp-level = <1000000>;
[all …]
H A Dtegra20-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 core_opp_table: opp-table-core {
5 compatible = "operating-points-v2";
6 opp-shared;
8 core_opp_950: opp-950000 {
9 opp-microvolt = <950000 950000 1300000>;
10 opp-level = <950000>;
13 core_opp_1000: opp-1000000 {
14 opp-microvolt = <1000000 1000000 1300000>;
15 opp-level = <1000000>;
[all …]
H A Dtegra30-cpu-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 cpu0_opp_table: opp-table-cpu0 {
5 compatible = "operating-points-v2";
6 opp-shared;
8 opp-51000000-800 {
9 clock-latency-ns = <100000>;
10 opp-supported-hw = <0x1F 0x31FE>;
11 opp-hz = /bits/ 64 <51000000>;
14 opp-51000000-850 {
15 clock-latency-ns = <100000>;
[all …]
H A Dtegra20-cpu-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 cpu0_opp_table: opp-table-cpu0 {
5 compatible = "operating-points-v2";
6 opp-shared;
8 opp-216000000-750 {
9 clock-latency-ns = <400000>;
10 opp-supported-hw = <0x0F 0x0003>;
11 opp-hz = /bits/ 64 <216000000>;
12 opp-suspend;
15 opp-216000000-800 {
[all …]
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra132-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 emc_icc_dvfs_opp_table: opp-table-dvfs0 {
6 compatible = "operating-points-v2";
8 opp-12750000-800 {
9 opp-microvolt = <800000 800000 1150000>;
10 opp-hz = /bits/ 64 <12750000>;
11 opp-supported-hw = <0x0003>;
14 opp-12750000-950 {
15 opp-microvolt = <950000 950000 1150000>;
16 opp-hz = /bits/ 64 <12750000>;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dmsm8996pro.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /delete-node/ opp-table-cluster0;
10 /delete-node/ opp-table-cluster1;
14 * nibble of supported hw, so speed bin 0 becomes 0x10, speed bin 1
18 cluster0_opp: opp-table-cluster0 {
19 compatible = "operating-points-v2-kryo-cpu";
20 nvmem-cells = <&speedbin_efuse>;
21 opp-shared;
23 opp-307200000 {
24 opp-hz = /bits/ 64 <307200000>;
[all …]
H A Dsdm660.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
13 compatible = "qcom,adreno-512.0", "qcom,adreno";
14 operating-points-v2 = <&gpu_sdm660_opp_table>;
16 gpu_sdm660_opp_table: opp-table {
17 compatible = "operating-points-v2";
23 * at the same opp-level
25 opp-750000000 {
26 opp-hz = /bits/ 64 <750000000>;
27 opp-level = <RPM_SMD_LEVEL_TURBO>;
28 opp-peak-kBps = <5412000>;
[all …]
/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h616-cpu-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 cpu_opp_table: opp-table-cpu {
6 compatible = "allwinner,sun50i-h616-operating-points";
7 nvmem-cells = <&cpu_speed_grade>;
8 opp-shared;
10 opp-480000000 {
11 opp-hz = /bits/ 64 <480000000>;
12 opp-microvolt = <900000>;
13 clock-latency-ns = <244144>; /* 8 32k periods */
14 opp-supported-hw = <0x3f>;
[all …]
/linux/drivers/net/ieee802154/
H A Datusb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * atusb.c - Driver for the ATUSB IEEE 802.15.4 dongle
7 * Copyright (c) 2015 - 2016 Stefan Schmidt <stefan@datenfreihafen.org>
12 * Written by: Dmitry Eremin-Solenikov <dmitry.baryshkov@siemens.com>
46 struct ieee802154_hw *hw; member
49 int shutdown; /* non-zero if shutting down */
80 struct usb_device *usb_dev = atusb->usb_dev; in atusb_write_subreg()
84 dev_dbg(&usb_dev->dev, "%s: 0x%02x <- 0x%02x\n", __func__, reg, value); in atusb_write_subreg()
110 ret = usb_control_msg_recv(lp->usb_dev, 0, ATUSB_REG_READ, ATUSB_REQ_FROM_DEV, in atusb_read_subreg()
122 int err = atusb->err; in atusb_get_and_clear_error()
[all …]
/linux/drivers/net/ethernet/atheros/alx/
H A Dethtool.c47 #include "hw.h"
51 * See hw.h
109 static u32 alx_get_supported_speeds(struct alx_hw *hw) in alx_get_supported_speeds() argument
111 u32 supported = SUPPORTED_10baseT_Half | in alx_get_supported_speeds() local
116 if (alx_hw_giga(hw)) in alx_get_supported_speeds()
117 supported |= SUPPORTED_1000baseT_Full; in alx_get_supported_speeds()
125 return supported; in alx_get_supported_speeds()
132 struct alx_hw *hw = &alx->hw; in alx_get_link_ksettings() local
133 u32 supported, advertising; in alx_get_link_ksettings() local
135 supported = SUPPORTED_Autoneg | in alx_get_link_ksettings()
[all …]
/linux/drivers/net/ethernet/intel/ice/
H A Dice_vlan_mode.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (C) 2019-2021, Intel Corporation. */
7 * ice_pkg_get_supported_vlan_mode - determine if DDP supports Double VLAN mode
8 * @hw: pointer to the HW struct
12 ice_pkg_get_supported_vlan_mode(struct ice_hw *hw, bool *dvm) in ice_pkg_get_supported_vlan_mode() argument
22 bld = ice_pkg_buf_alloc_single_section(hw, in ice_pkg_get_supported_vlan_mode()
26 return -ENOMEM; in ice_pkg_get_supported_vlan_mode()
29 sect->count = cpu_to_le16(1); in ice_pkg_get_supported_vlan_mode()
30 sect->offset = cpu_to_le16(ICE_META_VLAN_MODE_ENTRY); in ice_pkg_get_supported_vlan_mode()
32 status = ice_aq_upload_section(hw, in ice_pkg_get_supported_vlan_mode()
[all …]
/linux/drivers/net/ethernet/intel/i40e/
H A Di40e_ethtool.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
15 * struct i40e_stats - definition for an ethtool statistic
16 * @stat_string: statistic name to display in ethtool -S output
64 I40E_QUEUE_STAT("%s-%u.packets", stats.packets),
65 I40E_QUEUE_STAT("%s-%u.bytes", stats.bytes),
69 * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer
92 p = (char *)pointer + stat->stat_offset; in i40e_add_one_ethtool_stat()
93 switch (stat->sizeof_stat) { in i40e_add_one_ethtool_stat()
108 stat->stat_string); in i40e_add_one_ethtool_stat()
[all …]
/linux/Documentation/leds/
H A Dleds-class.rst8 of the LED (taking a value 0-max_brightness). Most LEDs don't have hardware
9 brightness support so will just be turned on for non-zero brightness settings.
14 existing subsystems with minimal additional code. Examples are the disk-activity,
15 nand-disk and sharpsl-charge triggers. With led triggers disabled, the code
48 - devicename:
57 - color:
59 include/dt-bindings/leds/common.h.
61 - function:
63 include/dt-bindings/leds/common.h.
66 to linux-leds@vger.kernel.org.
[all …]
/linux/drivers/net/ethernet/atheros/atl1c/
H A Datl1c_ethtool.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright(c) 2009 - 2009 Atheros Corporation. All rights reserved.
6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
19 struct atl1c_hw *hw = &adapter->hw; in atl1c_get_link_ksettings() local
20 u32 supported, advertising; in atl1c_get_link_ksettings() local
22 supported = (SUPPORTED_10baseT_Half | in atl1c_get_link_ksettings()
28 if (hw->link_cap_flags & ATL1C_LINK_CAP_1000M) in atl1c_get_link_ksettings()
29 supported |= SUPPORTED_1000baseT_Full; in atl1c_get_link_ksettings()
33 advertising |= hw->autoneg_advertised; in atl1c_get_link_ksettings()
35 cmd->base.port = PORT_TP; in atl1c_get_link_ksettings()
[all …]
/linux/Documentation/devicetree/bindings/opp/
H A Dopp-v2-kryo-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ilia Lin <ilia.lin@kernel.org>
13 - $ref: opp-v2-base.yaml#
22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
23 the OPP framework with required information (existing HW bitmap).
25 operating-points-v2 table when it is parsed by the OPP framework.
30 - operating-points-v2-krait-cpu
[all …]
/linux/drivers/net/ethernet/atheros/atl1e/
H A Datl1e_ethtool.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
19 struct atl1e_hw *hw = &adapter->hw; in atl1e_get_link_ksettings() local
20 u32 supported, advertising; in atl1e_get_link_ksettings() local
22 supported = (SUPPORTED_10baseT_Half | in atl1e_get_link_ksettings()
28 if (hw->nic_type == athr_l1e) in atl1e_get_link_ksettings()
29 supported |= SUPPORTED_1000baseT_Full; in atl1e_get_link_ksettings()
34 advertising |= hw->autoneg_advertised; in atl1e_get_link_ksettings()
36 cmd->base.port = PORT_TP; in atl1e_get_link_ksettings()
37 cmd->base.phy_address = 0; in atl1e_get_link_ksettings()
[all …]
/linux/Documentation/devicetree/bindings/cpufreq/
H A Dimx-cpufreq-dt.txt1 i.MX CPUFreq-DT OPP bindings
6 the opp-supported-hw values for each OPP to check if the OPP is allowed.
9 --------------------
11 For each opp entry in 'operating-points-v2' table:
12 - opp-supported-hw: Two bitmaps indicating:
13 - Supported speed grade mask
14 - Supported market segment mask
21 --------
24 compatible = "operating-points-v2";
25 opp-1000000000 {
[all …]
/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_mdio.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright (c) 2016-2017 Hisilicon Limited.
46 struct hclge_dev *hdev = bus->priv; in hclge_mdio_write()
50 if (test_bit(HCLGE_COMM_STATE_CMD_DISABLE, &hdev->hw.hw.comm_state)) in hclge_mdio_write()
51 return -EBUSY; in hclge_mdio_write()
57 hnae3_set_field(mdio_cmd->phyid, HCLGE_MDIO_PHYID_M, in hclge_mdio_write()
59 hnae3_set_field(mdio_cmd->phyad, HCLGE_MDIO_PHYREG_M, in hclge_mdio_write()
62 hnae3_set_bit(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_START_B, 1); in hclge_mdio_write()
63 hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_ST_M, in hclge_mdio_write()
65 hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_OP_M, in hclge_mdio_write()
[all …]
/linux/drivers/net/ethernet/intel/ixgbe/
H A Dixgbe_ethtool.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 1999 - 2024 Intel Corporation. */
31 sizeof(((struct ixgbe_adapter *)0)->m), \
34 sizeof(((struct rtnl_link_stats64 *)0)->m), \
111 #define IXGBE_NUM_RX_QUEUES netdev->num_tx_queues
114 (netdev->num_tx_queues + IXGBE_NUM_RX_QUEUES) * \
118 (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
119 sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
120 sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
121 sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
[all …]
/linux/Documentation/networking/device_drivers/ethernet/huawei/
H A Dhinic.rst1 .. SPDX-License-Identifier: GPL-2.0
11 The driver supports a range of link-speed devices (10GbE, 25GbE, 40GbE, etc.).
14 Some HiNIC devices support SR-IOV. This driver is used for Physical Function
17 HiNIC devices support MSI-X interrupt vector for each Tx/Rx queue and
21 TCP Transmit Segmentation Offload(TSO), Receive-Side Scaling(RSS) and
25 Supported PCI vendor ID/device IDs:
28 19e5:1822 - HiNIC PF
34 hinic_dev - Implement a Logical Network device that is independent from
35 specific HW details about HW data structure formats.
37 hinic_hwdev - Implement the HW details of the device and include the components
[all …]
/linux/drivers/net/ethernet/oki-semi/pch_gbe/
H A Dpch_gbe_ethtool.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1999 - 2010 Intel Corporation.
14 * pch_gbe_stats - Stats item information
30 * pch_gbe_gstrings_stats - ethtool information status name list
67 * pch_gbe_get_link_ksettings - Get device-specific settings
78 u32 supported, advertising; in pch_gbe_get_link_ksettings() local
80 mii_ethtool_get_link_ksettings(&adapter->mii, ecmd); in pch_gbe_get_link_ksettings()
82 ethtool_convert_link_mode_to_legacy_u32(&supported, in pch_gbe_get_link_ksettings()
83 ecmd->link_modes.supported); in pch_gbe_get_link_ksettings()
85 ecmd->link_modes.advertising); in pch_gbe_get_link_ksettings()
[all …]
/linux/Documentation/networking/dsa/
H A Dlan9303.rst18 The LAN9303 can be managed both via MDIO and I2C, both supported by this driver.
21 interfaces (which is the default state of a DSA device). Due to HW limitations,
22 no HW MAC learning takes place in this mode.
24 When both user ports are joined to the same bridge, the normal HW MAC learning
25 is enabled. This means that unicast traffic is forwarded in HW. Broadcast and
26 multicast is flooded in HW. STP is also supported in this mode. The driver
27 support fdb/mdb operations as well, meaning IGMP snooping is supported.
36 - Support for VLAN filtering is not implemented
37 - The HW does not support VLAN-specific fdb entries
/linux/drivers/net/ethernet/intel/igc/
H A Digc_ethtool.c1 // SPDX-License-Identifier: GPL-2.0
118 ((((struct igc_adapter *)netdev_priv(netdev))->num_rx_queues * \
120 (((struct igc_adapter *)netdev_priv(netdev))->num_tx_queues * \
128 "legacy-rx",
129 "reverse-tsn-txq-prio",
138 struct igc_hw *hw = &adapter->hw; in igc_ethtool_get_drvinfo() local
142 strscpy(drvinfo->driver, igc_driver_name, sizeof(drvinfo->driver)); in igc_ethtool_get_drvinfo()
145 hw->nvm.ops.read(hw, IGC_NVM_DEV_STARTER, 1, &nvm_version); in igc_ethtool_get_drvinfo()
148 gphy_version = igc_read_phy_fw_version(hw); in igc_ethtool_get_drvinfo()
150 scnprintf(adapter->fw_version, in igc_ethtool_get_drvinfo()
[all …]
/linux/arch/arm64/boot/dts/ti/
H A Dk3-am625.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
7 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 /dts-v1/;
12 #include "k3-am62.dtsi"
16 #address-cells = <1>;
17 #size-cells = <0>;
19 cpu-map {
40 compatible = "arm,cortex-a53";
43 enable-method = "psci";
44 i-cache-size = <0x8000>;
[all …]

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