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/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra30-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 core_opp_table: opp-table-core {
5 compatible = "operating-points-v2";
6 opp-shared;
8 core_opp_950: opp-950000 {
9 opp-microvolt = <950000 950000 1350000>;
10 opp-level = <950000>;
13 core_opp_1000: opp-1000000 {
14 opp-microvolt = <1000000 1000000 1350000>;
15 opp-level = <1000000>;
[all …]
H A Dtegra124-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 emc_icc_dvfs_opp_table: opp-table-emc {
5 compatible = "operating-points-v2";
7 opp-12750000-800 {
8 opp-microvolt = <800000 800000 1150000>;
9 opp-hz = /bits/ 64 <12750000>;
10 opp-supported-hw = <0x0003>;
13 opp-12750000-950 {
14 opp-microvolt = <950000 950000 1150000>;
15 opp-hz = /bits/ 64 <12750000>;
[all …]
H A Dtegra20-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 core_opp_table: opp-table-core {
5 compatible = "operating-points-v2";
6 opp-shared;
8 core_opp_950: opp-950000 {
9 opp-microvolt = <950000 950000 1300000>;
10 opp-level = <950000>;
13 core_opp_1000: opp-1000000 {
14 opp-microvolt = <1000000 1000000 1300000>;
15 opp-level = <1000000>;
[all …]
H A Dtegra30-cpu-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 cpu0_opp_table: opp-table-cpu0 {
5 compatible = "operating-points-v2";
6 opp-shared;
8 opp-51000000-800 {
9 clock-latency-ns = <100000>;
10 opp-supported-hw = <0x1F 0x31FE>;
11 opp-hz = /bits/ 64 <51000000>;
14 opp-51000000-850 {
15 clock-latency-ns = <100000>;
[all …]
H A Dtegra20-cpu-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 cpu0_opp_table: opp-table-cpu0 {
5 compatible = "operating-points-v2";
6 opp-shared;
8 opp-216000000-750 {
9 clock-latency-ns = <400000>;
10 opp-supported-hw = <0x0F 0x0003>;
11 opp-hz = /bits/ 64 <216000000>;
12 opp-suspend;
15 opp-216000000-800 {
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra132-peripherals-opp.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 emc_icc_dvfs_opp_table: opp-table-dvfs0 {
6 compatible = "operating-points-v2";
8 opp-12750000-800 {
9 opp-microvolt = <800000 800000 1150000>;
10 opp-hz = /bits/ 64 <12750000>;
11 opp-supported-hw = <0x0003>;
14 opp-12750000-950 {
15 opp-microvolt = <950000 950000 1150000>;
16 opp-hz = /bits/ 64 <12750000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dmsm8996pro.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 /delete-node/ opp-table-cluster0;
10 /delete-node/ opp-table-cluster1;
14 * nibble of supported hw, so speed bin 0 becomes 0x10, speed bin 1
18 cluster0_opp: opp-table-cluster0 {
19 compatible = "operating-points-v2-kryo-cpu";
20 nvmem-cells = <&speedbin_efuse>;
21 opp-shared;
23 opp-307200000 {
24 opp-hz = /bits/ 64 <307200000>;
[all …]
H A Dsdm660.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
13 compatible = "qcom,adreno-512.0", "qcom,adreno";
14 operating-points-v2 = <&gpu_sdm660_opp_table>;
16 gpu_sdm660_opp_table: opp-table {
17 compatible = "operating-points-v2";
23 * at the same opp-level
25 opp-750000000 {
26 opp-hz = /bits/ 64 <750000000>;
27 opp-level = <RPM_SMD_LEVEL_TURBO>;
28 opp-peak-kBps = <5412000>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/opp/
H A Dqcom-nvmem-cpufreq.txt8 defines the voltage and frequency value based on the msm-id in SMEM
10 The qcom-cpufreq-nvmem driver reads the msm-id and efuse value from the SoC
11 to provide the OPP framework with required information (existing HW bitmap).
13 operating-points-v2 table when it is parsed by the OPP framework.
16 --------------------
18 - operating-points-v2: Phandle to the operating-points-v2 table to use.
20 In 'operating-points-v2' table:
21 - compatible: Should be
22 - 'operating-points-v2-kryo-cpu' for apq8096, msm8996, msm8974,
26 --------------------
[all …]
H A Doperating-points-v2-ti-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/operating-points-v2-ti-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
18 This document extends the operating-points-v2 binding by providing
22 - Dhruva Gole <d-gole@ti.com>
25 - $ref: opp-v2-base.yaml#
29 const: operating-points-v2-ti-cpu
37 opp-shared: true
40 '^opp(-?[0-9]+)*$':
[all …]
H A Dopp-v2-kryo-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/allwinner/
H A Dsun50i-h616-cpu-opp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 cpu_opp_table: opp-table-cpu {
6 compatible = "allwinner,sun50i-h616-operating-points";
7 nvmem-cells = <&cpu_speed_grade>;
8 opp-shared;
10 opp-480000000 {
11 opp-hz = /bits/ 64 <480000000>;
12 opp-microvolt = <900000>;
13 clock-latency-ns = <244144>; /* 8 32k periods */
14 opp-supported-hw = <0x3f>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/cpufreq/
H A Dti-cpufreq.txt6 The ti-cpufreq driver can use revision and an efuse value from the SoC to
7 provide the OPP framework with supported hardware information. This is
8 used to determine which OPPs from the operating-points-v2 table get enabled
12 --------------------
14 - operating-points-v2: Phandle to the operating-points-v2 table to use.
16 In 'operating-points-v2' table:
17 - compatible: Should be
18 - 'operating-points-v2-ti-cpu' for am335x, am43xx, and dra7xx/am57xx,
20 - syscon: A phandle pointing to a syscon node representing the control module
24 --------------------
[all …]
H A Dimx-cpufreq-dt.txt1 i.MX CPUFreq-DT OPP bindings
6 the opp-supported-hw values for each OPP to check if the OPP is allowed.
9 --------------------
11 For each opp entry in 'operating-points-v2' table:
12 - opp-supported-hw: Two bitmaps indicating:
13 - Supported speed grade mask
14 - Supported market segment mask
21 --------
24 compatible = "operating-points-v2";
25 opp-1000000000 {
[all …]
/freebsd/sys/dev/ice/
H A Dice_vlan_mode.c1 /* SPDX-License-Identifier: BSD-3-Clause */
36 * ice_pkg_get_supported_vlan_mode - chk if DDP supports Double VLAN mode (DVM)
37 * @hw: pointer to the HW struct
41 ice_pkg_get_supported_vlan_mode(struct ice_hw *hw, bool *dvm) in ice_pkg_get_supported_vlan_mode() argument
51 bld = ice_pkg_buf_alloc_single_section(hw, in ice_pkg_get_supported_vlan_mode()
58 sect->coun in ice_pkg_get_supported_vlan_mode()
92 ice_aq_get_vlan_mode(struct ice_hw * hw,struct ice_aqc_get_vlan_mode * get_params) ice_aq_get_vlan_mode() argument
118 ice_aq_is_dvm_ena(struct ice_hw * hw) ice_aq_is_dvm_ena() argument
142 ice_is_dvm_ena(struct ice_hw * hw) ice_is_dvm_ena() argument
155 ice_cache_vlan_mode(struct ice_hw * hw) ice_cache_vlan_mode() argument
164 ice_pkg_supports_dvm(struct ice_hw * hw) ice_pkg_supports_dvm() argument
183 ice_fw_supports_dvm(struct ice_hw * hw) ice_fw_supports_dvm() argument
211 ice_is_dvm_supported(struct ice_hw * hw) ice_is_dvm_supported() argument
234 ice_aq_set_vlan_mode(struct ice_hw * hw,struct ice_aqc_set_vlan_mode * set_params) ice_aq_set_vlan_mode() argument
268 ice_set_svm(struct ice_hw * hw) ice_set_svm() argument
301 ice_set_vlan_mode(struct ice_hw * hw) ice_set_vlan_mode() argument
322 ice_post_pkg_dwnld_vlan_mode_cfg(struct ice_hw * hw) ice_post_pkg_dwnld_vlan_mode_cfg() argument
[all...]
/freebsd/share/man/man4/
H A Dacpi.464 .Va hw.acpi.acline ) .
65 .Bl -tag -width indent
88 List of supported CPU idle states and their transition latency
111 List of supported CPU idle states and their transition methods, as
113 .It Va hw.acpi.acline
115 .It Va hw.acpi.disable_on_reboot
120 .It Va hw.acpi.handle_reboot
124 .It Va hw.acpi.lid_switch_state
132 .It Va hw.acpi.power_button_state
140 (power-off nicely).
[all …]
H A Dsfxge.41 .\" Copyright (c) 2011-2016 Solarflare Communications Inc.
39 .Bd -ragged -offset indent
46 .Bd -literal -offset indent
57 and Receive Side Scaling (RSS) using MSI-X interrupts.
88 .Bl -tag -width indent
89 .It Va hw.sfxge.rx_ring
91 Supported values are: 512, 1024, 2048 and 4096.
92 .It Va hw.sfxge.tx_ring
94 Supported values are: 512, 1024, 2048 and 4096.
95 .It Va hw.sfxge.tx_dpl_get_max
[all …]
H A Dsnd_uaudio.42 .\" SPDX-License-Identifier: BSD-2-Clause
50 .Cd hw.usb.uaudio.buffer_ms
51 .Cd hw.usb.uaudio.default_bits
52 .Cd hw.usb.uaudio.default_channels
53 .Cd hw.usb.uaudio.default_rate
54 .Cd hw.usb.uaudio.handle_hid
55 .Cd hw.usb.uaudio.debug
62 user-supplied values specified through the
64 interface, the driver will select the best matching configuration supported by
85 For a change to take effect during runtime, the device has to be re-attached.
[all …]
H A Dbce.41 .\" Copyright (c) 2006-2014 QLogic Corporation
35 .Bd -ragged -offset indent
43 .Bd -literal -offset indent
57 The following features are supported in the
62 .Bl -item -offset indent -compact
72 10/100/1000Mbps operation in full-duplex mode
74 10/100Mbps operation in half-duplex mode
80 .Bl -tag -width ".Cm 10baseT/UTP"
92 .Cm full-duplex
94 .Cm half-duplex
[all …]
H A Dpcm.42 .\" Copyright (c) 2009-2011 Joel Dahl <joel@FreeBSD.org>
39 .Bd -ragged -offset indent
48 It works in conjunction with a bridge device driver on supported devices
60 driver are: multichannel audio, per-application
74 .Bl -bullet -compact
118 .Xr snd_uaudio 4 (auto-loaded on device plug)
145 .Bl -tag -width ".Va snd_driver_load" -offset indent
171 is supported and enabled by default.
177 re-routing of channels.
198 Commonly used for ear-candy or frequency compensation due to the vast
[all …]
H A Dem.41 .\"-
2 .\" SPDX-License-Identifier: BSD-3-Clause
4 .\" Copyright (c) 2001-2003, Intel Corporation
47 .Bd -ragged -offset indent
55 .Bd -literal -offset indent
61 driver provides support for PCI/PCI-X Gigabit Ethernet adapters based on
86 on all but 82542-based adapters.
90 The identification LEDs of the adapters supported by the
114 .Bl -tag -width ".Cm 10baseT/UTP"
116 Enables auto-negotiation for speed and duplex.
[all …]
H A Dvmx.428 .Bd -ragged -offset indent
36 .Bd -literal -offset indent
61 checksum offloading, MSI/MSI-X support and hardware VLAN tagging in
70 .Bl -bullet -compact -offset indent
87 Multiple queues are only supported by certain VMware products, such as ESXi.
88 The number of queues allocated depends on the presence of MSI-X,
92 does not enable MSI-X support on VMware by default.
94 .Va hw.pci.honor_msi_blacklist
95 tunable must be disabled to enable MSI-X support.
101 .Bl -tag -width indent
[all …]
H A Dix.41 .\" Copyright (c) 2001-2008, Intel Corporation
42 .Bd -ragged -offset indent
50 .Bd -literal -offset indent
79 .Bl -bullet -compact
101 .Bl -tag -width "hw.ix.allow_unsupported_sfp"
102 .It Va hw.ix.max_interrupt_rate
104 .It Va hw.ix.flow_control
106 .It Va hw.ix.advertise_speed
108 .It Va hw.ix.enable_msix
109 Enable Message Signalled Interrupts (MSI-X).
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-am625.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
7 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/
10 /dts-v1/;
12 #include "k3-am62.dtsi"
16 #address-cells = <1>;
17 #size-cells = <0>;
19 cpu-map {
40 compatible = "arm,cortex-a53";
43 enable-method = "psci";
44 i-cache-size = <0x8000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap34xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/media/omap3-isp.h>
16 /* OMAP343x/OMAP35xx variants OPP1-6 */
17 operating-points-v2 = <&cpu0_opp_table>;
19 clock-latency = <300000>; /* From legacy driver */
20 #cooling-cells = <2>;
24 cpu0_opp_table: opp-table {
25 compatible = "operating-points-v2-ti-cpu";
[all …]

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