Searched +full:summation +full:- +full:disable (Results 1 – 6 of 6) sorted by relevance
/linux/Documentation/devicetree/bindings/hwmon/ |
H A D | ti,ina3221.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jean Delvare <jdelvare@suse.com> 11 - Guenter Roeck <linux@roeck-us.net> 20 ti,single-shot: 22 This chip has two power modes: single-shot (chip takes one measurement 25 hardware monitor type device, but the single-shot mode is more power- 26 friendly and useful for battery-powered device which cares power 29 If this property is present, the single-shot mode will be used, instead [all …]
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/linux/drivers/hwmon/ |
H A D | ina3221.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/ 11 #include <linux/hwmon-sysfs.h> 54 #define INA3221_CONFIG_CHx_EN(x) BIT(14 - (x)) 71 /* Alert Flags: SF is the summation-alert flag */ 99 * struct ina3221_input - channel input source specific information 103 * @summation_disable: channel summation status of input source 113 * struct ina3221_data - device specific information 121 * @summation_shunt_resistor: equivalent shunt resistor value for summation 123 * @single_shot: running in single-shot operating mode [all …]
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/linux/arch/arm64/boot/dts/nvidia/ |
H A D | tegra234-p3701.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 41 dma-controller@2930000 { 45 interrupt-controller@2a40000 { 58 vcc-supply = <&vdd_1v8_hs>; 59 address-width = <8>; 62 read-only; 70 compatible = "jedec,spi-nor"; 72 spi-max-frequency = <102000000>; 73 spi-tx-bus-width = <4>; 74 spi-rx-bus-width = <4>; [all …]
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/linux/fs/xfs/scrub/ |
H A D | fscounters.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Copyright (C) 2019-2023 Oracle. All Rights Reserved. 33 * AGs counting the number of free blocks, free space btree blocks, per-AG 35 * Then we compare what we computed against the in-core counters. 40 * freezing is costly. To get around this, we added a per-cpu counter of the 46 * walking all the AGs to make sure the incore per-AG structure has been 47 * initialized. The expected value calculation then iterates the incore per-AG 61 * Make sure the per-AG structure has been initialized from the on-disk header 74 struct xfs_mount *mp = sc->mp; in xchk_fscount_warmup() 88 error = xfs_ialloc_read_agi(pag, sc->tp, 0, &agi_bp); in xchk_fscount_warmup() [all …]
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/linux/block/ |
H A D | blk-iolatency.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Block rq-qos base io controller 7 * - It's bio based, so the latency covers the whole block layer in addition to 9 * - We will throttle all IO that comes in here if we need to. 10 * - We use the mean latency over the 100ms window. This is because writes can 13 * - By default there's no throttling, we set the queue_depth to UINT_MAX so 44 * number of IO's we're allowed to have in flight. This starts at (u64)-1 down 55 * total_time += min_lat_nsec - actual_io_completion 69 #include <linux/backing-dev.h> 76 #include <linux/blk-mq.h> [all …]
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/linux/drivers/usb/dwc2/ |
H A D | hcd.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * hcd.c - DesignWare HS OTG Controller host-mode routines 5 * Copyright (C) 2004-2013 Synopsys, Inc. 17 #include <linux/dma-mapping.h> 37 * dwc2_enable_common_interrupts() - Initializes the commmon interrupts, 55 if (!hsotg->params.host_dma) in dwc2_enable_common_interrupts() 57 if (!hsotg->params.external_id_pin_ctl) in dwc2_enable_common_interrupts() 63 if (dwc2_is_device_mode(hsotg) && hsotg->params.lpm) in dwc2_enable_common_interrupts() 73 switch (hsotg->hw_params.arch) { in dwc2_gahbcfg_init() 75 dev_err(hsotg->dev, "External DMA Mode not supported\n"); in dwc2_gahbcfg_init() [all …]
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