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Searched +full:stratix10 +full:- +full:svc (Results 1 – 9 of 9) sorted by relevance

/linux/Documentation/driver-api/firmware/
H A Dother_interfaces.rst5 --------------
7 .. kernel-doc:: drivers/firmware/dmi_scan.c
11 --------------
13 .. kernel-doc:: drivers/firmware/edd.c
17 -------------------------------------
19 .. kernel-doc:: drivers/firmware/sysfb.c
22 Intel Stratix10 SoC Service Layer
23 ---------------------------------
24 Some features of the Intel Stratix10 SoC require a level of privilege
30 The Intel Stratix10 SoC service layer provides an in kernel API for
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/linux/Documentation/devicetree/bindings/firmware/
H A Dintel,stratix10-svc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/intel,stratix10-svc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel Service Layer Driver for Stratix10 SoC
10 - Dinh Nguyen <dinguyen@kernel.org>
11 - Mahesh Rao <mahesh.rao@altera.com>
14 Intel Stratix10 SoC is composed of a 64 bit quad-core ARM Cortex A53 hard
26 Intel Stratix10 service layer driver, running at privileged exception level
35 - intel,stratix10-svc
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/linux/Documentation/devicetree/bindings/fpga/
H A Dintel,stratix10-soc-fpga-mgr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/fpga/intel,stratix10-soc-fpga-mgr.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Intel Stratix10 SoC FPGA Manager
10 - Mahesh Rao <mahesh.rao@altera.com>
11 - Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
12 - Niravkumar L Rabara <nirav.rabara@altera.com>
15 The Intel Stratix10 SoC consists of a 64-bit quad-core ARM Cortex A53 hard
16 processor system (HPS) and a Secure Device Manager (SDM). The Stratix10
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/linux/drivers/firmware/
H A Dstratix10-svc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2017-2018, Intel Corporation
19 #include <linux/firmware/intel/stratix10-smc.h>
20 #include <linux/firmware/intel/stratix10-svc-client.h>
24 * SVC_NUM_DATA_IN_FIFO - number of struct stratix10_svc_data in the FIFO
26 * SVC_NUM_CHANNEL - number of channel supported by service layer driver
28 * FPGA_CONFIG_DATA_CLAIM_TIMEOUT_MS - claim back the submitted buffer(s)
30 * when all bit-stream data had be send.
32 * FPGA_CONFIG_STATUS_TIMEOUT_SEC - poll the FPGA configuration status,
34 * timeout is set to 30 seconds (30 * 1000) at Intel Stratix10 SoC.
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
5 obj-$(CONFIG_ARM_SCPI_PROTOCOL) += arm_scpi.o
6 obj-$(CONFIG_ARM_SDE_INTERFACE) += arm_sdei.o
7 obj-$(CONFIG_DMI) += dmi_scan.o
8 obj-$(CONFIG_DMI_SYSFS) += dmi-sysfs.o
9 obj-$(CONFIG_EDD) += edd.o
10 obj-$(CONFIG_DMIID) += dmi-id.o
11 obj-$(CONFIG_INTEL_STRATIX10_SERVICE) += stratix10-svc.o
12 obj-$(CONFIG_INTEL_STRATIX10_RSU) += stratix10-rsu.o
13 obj-$(CONFIG_ISCSI_IBFT_FIND) += iscsi_ibft_find.o
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/linux/arch/arm64/boot/dts/altera/
H A Dsocfpga_stratix10.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/stratix10-clock.h>
12 compatible = "altr,socfpga-stratix10";
13 #address-cells = <2>;
14 #size-cells = <2>;
16 reserved-memory {
17 #address-cells = <2>;
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/linux/include/linux/firmware/intel/
H A Dstratix10-svc-client.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (C) 2017-2018, Intel Corporation
65 * timeout value used in Stratix10 FPGA manager driver.
77 * enum stratix10_svc_command_code - supported service commands
79 * @COMMAND_NOOP: do 'dummy' request for integration/debug/trouble-shooting
84 * @COMMAND_RECONFIG_DATA_SUBMIT: submit buffer(s) of bit-stream data for the
118 * @COMMAND_SMC_SVC_VERSION: Non-mailbox SMC SVC API Version,
172 /* Non-mailbox SMC Call */
177 * struct stratix10_svc_client_msg - message sent by client to service
195 * struct stratix10_svc_command_config_type - config type
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/linux/arch/arm64/boot/dts/intel/
H A Dsocfpga_agilex.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/agilex-clock.h>
13 compatible = "intel,socfpga-agilex";
14 #address-cells = <2>;
15 #size-cells = <2>;
17 reserved-memory {
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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