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Searched +full:stm32 +full:- +full:timers (Results 1 – 16 of 16) sorted by relevance

/linux/arch/arm/boot/dts/st/
H A Dstm32f746.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32fx-clock.h>
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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H A Dstm32f429.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include "../armv7-m.dtsi"
49 #include <dt-bindings/clock/stm32fx-clock.h>
50 #include <dt-bindings/mfd/stm32f4-rcc.h>
53 #address-cells = <1>;
54 #size-cells = <1>;
57 clk_hse: clk-hse {
58 #clock-cells = <0>;
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/linux/drivers/iio/trigger/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 menu "Triggers - standalone"
14 timers as interrupt source.
17 module will be called iio-trig-hrtimer.
26 module will be called iio-trig-interrupt.
29 tristate "STM32 Low-Power Timer Trigger"
32 Select this option to enable STM32 Low-Power Timer Trigger.
33 This can be used as trigger source for STM32 internal ADC
37 module will be called stm32-lptimer-trigger.
40 tristate "STM32 Timer Trigger"
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H A Dstm32-timer-trigger.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/iio/timer/stm32-timer-trigger.h>
14 #include <linux/mfd/stm32-timers.h>
130 div = (unsigned long long)clk_get_rate(priv->clk); in stm32_timer_start()
140 while (div > priv->max_arr) { in stm32_timer_start()
148 dev_err(priv->dev, "prescaler exceeds the maximum value\n"); in stm32_timer_start()
149 return -EINVAL; in stm32_timer_start()
153 regmap_read(priv->regmap, TIM_CCER, &ccer); in stm32_timer_start()
155 return -EBUSY; in stm32_timer_start()
157 guard(mutex)(&priv->lock); in stm32_timer_start()
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/linux/drivers/clocksource/
H A Dtimer-stm32.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com>
6 * Inspired by time-efm32.c from Uwe Kleine-Koenig
23 #include "timer-of.h"
54 * stm32_timer_of_bits_set - set accessor helper
58 * Accessor helper to set the number of bits in the timer-of private
64 struct stm32_timer_private *pd = to->private_data; in stm32_timer_of_bits_set()
66 pd->bits = bits; in stm32_timer_of_bits_set()
70 * stm32_timer_of_bits_get - get accessor helper
73 * Accessor helper to get the number of bits in the timer-of private
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
60 bool "OMAP dual-mode timer driver" if ARCH_K3 || COMPILE_TEST
64 Enables the support for the TI dual-mode timer driver.
149 This driver adds support for the timers found in the Realtek RTL83xx
183 Enables support for the timers and watchdogs found on NVIDIA
198 Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture,
221 32-bit free running decrementing counters.
256 bool "Integrator-AP timer driver" if COMPILE_TEST
259 Enables support for the Integrator-AP timer.
284 available on many OMAP-like platforms.
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/linux/Documentation/devicetree/bindings/mfd/
H A Dst,stm32-lptimer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Low-Power Timers
10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several
12 - PWM output (with programmable prescaler, configurable polarity)
13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT)
14 - Several counter modes:
15 - quadrature encoder to detect angular position and direction of rotary
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/linux/Documentation/devicetree/bindings/timer/
H A Dst,stm32-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/st,stm32-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 general-purpose 16 and 32 bits timers
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Patrice Chotard <patrice.chotard@foss.st.com>
15 const: st,stm32-timer
30 - compatible
31 - reg
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/linux/include/linux/mfd/
H A Dstm32-lptimer.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * STM32 Low-Power Timer parent driver.
6 * Inspired by Benjamin Gaignard's stm32-timers driver
26 #define STM32_LPTIM_HWCFGR2 0x3EC /* Hardware configuration register 2 - MP25 */
27 #define STM32_LPTIM_HWCFGR1 0x3F0 /* Hardware configuration register 1 - MP15 */
28 #define STM32_LPTIM_VERR 0x3F4 /* Version identification register - MP15 */
30 /* STM32_LPTIM_ISR - bit fields */
37 /* STM32_LPTIM_ICR - bit fields */
43 /* STM32_LPTIM_IER - bit fields */
46 /* STM32_LPTIM_CR - bit fields */
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/linux/Documentation/ABI/testing/
H A Dsysfs-bus-iio-adc-stm325 The STM32 ADC can be configured to use external trigger sources
6 (e.g. timers, pwm or exti gpio). Then, it can be tuned to start
9 - "rising-edge"
10 - "falling-edge"
11 - "both-edges".
/linux/drivers/counter/
H A Dstm32-timer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Timer Encoder and Counter driver
12 #include <linux/mfd/stm32-timers.h>
65 regmap_read(priv->regmap, TIM_CNT, &cnt); in stm32_count_read()
77 regmap_read(priv->regmap, TIM_ARR, &ceiling); in stm32_count_write()
79 return -EINVAL; in stm32_count_write()
81 return regmap_write(priv->regmap, TIM_CNT, val); in stm32_count_write()
91 regmap_read(priv->regmap, TIM_SMCR, &smcr); in stm32_count_function_read()
107 return -EINVAL; in stm32_count_function_read()
123 if (!priv->has_encoder) in stm32_count_function_write()
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/linux/drivers/pwm/
H A Dpwm-stm32.c1 // SPDX-License-Identifier: GPL-2.0
7 * Inspired by timer-stm32.c from Maxime Coquelin
8 * pwm-atmel.c from Bo Shen
12 #include <linux/mfd/stm32-timers.h>
50 regmap_read(dev->regmap, TIM_CCER, &ccer); in active_channels()
69 unsigned int ch = pwm->hwpwm; in stm32_pwm_round_waveform_tohw()
74 if (wf->period_length_ns == 0) { in stm32_pwm_round_waveform_tohw()
82 ret = clk_enable(priv->clk); in stm32_pwm_round_waveform_tohw()
86 wfhw->ccer = TIM_CCER_CCxE(ch + 1); in stm32_pwm_round_waveform_tohw()
87 if (priv->have_complementary_output) in stm32_pwm_round_waveform_tohw()
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/linux/drivers/clk/stm32/
H A Dclk-stm32mp1.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
9 #include <linux/clk-provider.h>
17 #include <linux/reset-controller.h>
21 #include <dt-bindings/clock/stm32mp1-clks.h>
23 #include "reset-stm32.h"
171 "ck_hse", "pll4_r", "clk-hse-div2"
384 /* STM32 Composite clock */
397 struct gate_cfg *gate_cfg = cfg->cfg; in _clk_hw_register_gate()
400 cfg->name, in _clk_hw_register_gate()
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H A Dclk-stm32mp21.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
8 #include <linux/clk-provider.h>
12 #include "clk-stm32-core.h"
13 #include "reset-stm32.h"
16 #include <dt-bindings/clock/st,stm32mp21-rcc.h>
17 #include <dt-bindings/reset/st,stm32mp21-rcc.h>
23 #define SECF_NONE -1
416 /* CSI-HOST */
432 /* CSI-PHY */
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H A Dclk-stm32mp25.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
8 #include <linux/clk-provider.h>
12 #include "clk-stm32-core.h"
13 #include "reset-stm32.h"
16 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
17 #include <dt-bindings/reset/st,stm32mp25-rcc.h>
20 #define SECF_NONE -1
523 /* CSI-HOST */
539 /* CSI-PHY */
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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