Lines Matching +full:stm32 +full:- +full:timers
2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32fx-clock.h>
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
52 clk_hse: clk-hse {
53 #clock-cells = <0>;
54 compatible = "fixed-clock";
55 clock-frequency = <0>;
58 clk-lse {
59 #clock-cells = <0>;
60 compatible = "fixed-clock";
61 clock-frequency = <32768>;
64 clk-lsi {
65 #clock-cells = <0>;
66 compatible = "fixed-clock";
67 clock-frequency = <32000>;
70 clk_i2s_ckin: clk-i2s-ckin {
71 #clock-cells = <0>;
72 compatible = "fixed-clock";
73 clock-frequency = <48000000>;
78 timers2: timers@40000000 {
79 #address-cells = <1>;
80 #size-cells = <0>;
81 compatible = "st,stm32-timers";
84 clock-names = "int";
88 compatible = "st,stm32-pwm";
89 #pwm-cells = <3>;
94 compatible = "st,stm32-timer-trigger";
100 timers3: timers@40000400 {
101 #address-cells = <1>;
102 #size-cells = <0>;
103 compatible = "st,stm32-timers";
106 clock-names = "int";
110 compatible = "st,stm32-pwm";
111 #pwm-cells = <3>;
116 compatible = "st,stm32-timer-trigger";
122 timers4: timers@40000800 {
123 #address-cells = <1>;
124 #size-cells = <0>;
125 compatible = "st,stm32-timers";
128 clock-names = "int";
132 compatible = "st,stm32-pwm";
133 #pwm-cells = <3>;
138 compatible = "st,stm32-timer-trigger";
144 timers5: timers@40000c00 {
145 #address-cells = <1>;
146 #size-cells = <0>;
147 compatible = "st,stm32-timers";
150 clock-names = "int";
154 compatible = "st,stm32-pwm";
155 #pwm-cells = <3>;
160 compatible = "st,stm32-timer-trigger";
166 timers6: timers@40001000 {
167 #address-cells = <1>;
168 #size-cells = <0>;
169 compatible = "st,stm32-timers";
172 clock-names = "int";
176 compatible = "st,stm32-timer-trigger";
182 timers7: timers@40001400 {
183 #address-cells = <1>;
184 #size-cells = <0>;
185 compatible = "st,stm32-timers";
188 clock-names = "int";
192 compatible = "st,stm32-timer-trigger";
198 timers12: timers@40001800 {
199 #address-cells = <1>;
200 #size-cells = <0>;
201 compatible = "st,stm32-timers";
204 clock-names = "int";
208 compatible = "st,stm32-pwm";
209 #pwm-cells = <3>;
214 compatible = "st,stm32-timer-trigger";
220 timers13: timers@40001c00 {
221 compatible = "st,stm32-timers";
224 clock-names = "int";
228 compatible = "st,stm32-pwm";
229 #pwm-cells = <3>;
234 timers14: timers@40002000 {
235 compatible = "st,stm32-timers";
238 clock-names = "int";
242 compatible = "st,stm32-pwm";
243 #pwm-cells = <3>;
249 compatible = "st,stm32-rtc";
252 assigned-clocks = <&rcc 1 CLK_RTC>;
253 assigned-clock-parents = <&rcc 1 CLK_LSE>;
254 interrupt-parent = <&exti>;
261 #address-cells = <1>;
262 #size-cells = <0>;
263 compatible = "st,stm32f7-spi";
271 #address-cells = <1>;
272 #size-cells = <0>;
273 compatible = "st,stm32f7-spi";
281 compatible = "st,stm32f7-uart";
289 compatible = "st,stm32f7-uart";
297 compatible = "st,stm32f7-uart";
305 compatible = "st,stm32f7-uart";
313 compatible = "st,stm32f7-i2c";
319 #address-cells = <1>;
320 #size-cells = <0>;
325 compatible = "st,stm32f7-i2c";
331 #address-cells = <1>;
332 #size-cells = <0>;
337 compatible = "st,stm32f7-i2c";
343 #address-cells = <1>;
344 #size-cells = <0>;
349 compatible = "st,stm32f7-i2c";
355 #address-cells = <1>;
356 #size-cells = <0>;
361 compatible = "st,stm32f4-bxcan";
364 interrupt-names = "tx", "rx0", "rx1", "sce";
367 st,can-primary;
373 compatible = "st,stm32f4-gcan", "syscon";
379 compatible = "st,stm32f4-bxcan";
382 interrupt-names = "tx", "rx0", "rx1", "sce";
385 st,can-secondary;
391 compatible = "st,stm32-cec";
395 clock-names = "cec", "hdmi-cec";
400 compatible = "st,stm32f7-uart";
408 compatible = "st,stm32f7-uart";
415 timers1: timers@40010000 {
416 #address-cells = <1>;
417 #size-cells = <0>;
418 compatible = "st,stm32-timers";
421 clock-names = "int";
425 compatible = "st,stm32-pwm";
426 #pwm-cells = <3>;
431 compatible = "st,stm32-timer-trigger";
437 timers8: timers@40010400 {
438 #address-cells = <1>;
439 #size-cells = <0>;
440 compatible = "st,stm32-timers";
443 clock-names = "int";
447 compatible = "st,stm32-pwm";
448 #pwm-cells = <3>;
453 compatible = "st,stm32-timer-trigger";
460 compatible = "st,stm32f7-uart";
468 compatible = "st,stm32f7-uart";
477 arm,primecell-periphid = <0x00880180>;
480 clock-names = "apb_pclk";
482 max-frequency = <48000000>;
488 arm,primecell-periphid = <0x00880180>;
491 clock-names = "apb_pclk";
493 max-frequency = <48000000>;
498 #address-cells = <1>;
499 #size-cells = <0>;
500 compatible = "st,stm32f7-spi";
508 #address-cells = <1>;
509 #size-cells = <0>;
510 compatible = "st,stm32f7-spi";
518 compatible = "st,stm32-syscfg", "syscon";
523 exti: interrupt-controller@40013c00 {
524 compatible = "st,stm32-exti";
525 interrupt-controller;
526 #interrupt-cells = <2>;
531 timers9: timers@40014000 {
532 #address-cells = <1>;
533 #size-cells = <0>;
534 compatible = "st,stm32-timers";
537 clock-names = "int";
541 compatible = "st,stm32-pwm";
542 #pwm-cells = <3>;
547 compatible = "st,stm32-timer-trigger";
553 timers10: timers@40014400 {
554 compatible = "st,stm32-timers";
557 clock-names = "int";
561 compatible = "st,stm32-pwm";
562 #pwm-cells = <3>;
567 timers11: timers@40014800 {
568 compatible = "st,stm32-timers";
571 clock-names = "int";
575 compatible = "st,stm32-pwm";
576 #pwm-cells = <3>;
582 #address-cells = <1>;
583 #size-cells = <0>;
584 compatible = "st,stm32f7-spi";
592 #address-cells = <1>;
593 #size-cells = <0>;
594 compatible = "st,stm32f7-spi";
601 ltdc: display-controller@40016800 {
602 compatible = "st,stm32-ltdc";
607 clock-names = "lcd";
611 pwrcfg: power-config@40007000 {
612 compatible = "st,stm32-power-config", "syscon";
617 compatible = "st,stm32f7-crc";
624 #reset-cells = <1>;
625 #clock-cells = <2>;
626 compatible = "st,stm32f746-rcc", "st,stm32-rcc";
630 assigned-clocks = <&rcc 1 CLK_HSE_RTC>;
631 assigned-clock-rates = <1000000>;
634 dma1: dma-controller@40026000 {
635 compatible = "st,stm32-dma";
646 #dma-cells = <4>;
650 dma2: dma-controller@40026400 {
651 compatible = "st,stm32-dma";
662 #dma-cells = <4>;
668 compatible = "st,stm32f7-hsotg";
672 clock-names = "otg";
673 g-rx-fifo-size = <256>;
674 g-np-tx-fifo-size = <32>;
675 g-tx-fifo-size = <128 128 64 64 64 64 32 32>;
680 compatible = "st,stm32f4x9-fsotg";
684 clock-names = "otg";