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/linux/Documentation/devicetree/bindings/mfd/
H A Dst,stm32-lptimer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Low-Power Timers
10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several
12 - PWM output (with programmable prescaler, configurable polarity)
13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT)
14 - Several counter modes:
15 - quadrature encoder to detect angular position and direction of rotary
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/linux/arch/arm/boot/dts/st/
H A Dstm32f746.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32fx-clock.h>
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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H A Dstm32f429.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include "../armv7-m.dtsi"
49 #include <dt-bindings/clock/stm32fx-clock.h>
50 #include <dt-bindings/mfd/stm32f4-rcc.h>
53 #address-cells = <1>;
54 #size-cells = <1>;
57 clk_hse: clk-hse {
58 #clock-cells = <0>;
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H A Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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/linux/drivers/iio/trigger/
H A Dstm32-lptimer-trigger.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer Trigger driver
9 * Inspired by Benjamin Gaignard's stm32-timer-trigger driver
13 #include <linux/iio/timer/stm32-lptim-trigger.h>
14 #include <linux/mfd/stm32-lptimer.h>
27 /* List Low-Power Timer triggers for H7, MP13, MP15 */
34 /* List Low-Power Timer triggers for STM32MP25 */
61 if (indio_dev->modes & INDIO_HARDWARE_TRIGGERED) in stm32_lptim_validate_device()
64 return -EINVAL; in stm32_lptim_validate_device()
75 * return true if the trigger is a valid STM32 IIO Low-Power Timer Trigger
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H A Dstm32-timer-trigger.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/iio/timer/stm32-timer-trigger.h>
14 #include <linux/mfd/stm32-timers.h>
22 /* List the triggers created by each timer */
41 { }, /* timer 18 */
42 { }, /* timer 19 */
46 /* List the triggers accepted by each timer */
53 { }, /* timer 6 */
54 { }, /* timer 7 */
57 { }, /* timer 10 */
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/linux/drivers/counter/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
14 Interval Timer (PIT). The Intel 825x family of chips was first
31 tristate "ACCES 104-QUAD-8 driver"
37 Say yes here to build support for the ACCES 104-QUAD-8 quadrature
38 encoder counter/interface device family (104-QUAD-8, 104-QUAD-4).
41 operation on the respective count value attribute. The 104-QUAD-8
50 tristate "Flex Timer Module Quadrature decoder driver"
54 Select this option to enable the Flex Timer Quadrature decoder
58 module will be called ftm-quaddec.
69 will be called intel-qep.
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H A Dstm32-lptimer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer Encoder and Counter driver
9 * Inspired by 104-quad-8 and stm32-timer-trigger drivers.
15 #include <linux/mfd/stm32-lptimer.h>
36 ret = regmap_read(priv->regmap, STM32_LPTIM_CR, &val); in stm32_lptim_is_enabled()
50 ret = regmap_write(priv->regmap, STM32_LPTIM_CR, val); in stm32_lptim_set_enable_state()
55 clk_disable(priv->clk); in stm32_lptim_set_enable_state()
56 priv->enabled = false; in stm32_lptim_set_enable_state()
60 ret = clk_enable(priv->clk); in stm32_lptim_set_enable_state()
64 /* LP timer must be enabled before writing CMP & ARR */ in stm32_lptim_set_enable_state()
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H A Dstm32-timer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Timer Encoder and Counter driver
12 #include <linux/mfd/stm32-timers.h>
64 regmap_read(priv->regmap, TIM_CNT, &cnt); in stm32_count_read()
76 regmap_read(priv->regmap, TIM_ARR, &ceiling); in stm32_count_write()
78 return -EINVAL; in stm32_count_write()
80 return regmap_write(priv->regmap, TIM_CNT, val); in stm32_count_write()
90 regmap_read(priv->regmap, TIM_SMCR, &smcr); in stm32_count_function_read()
106 return -EINVAL; in stm32_count_function_read()
122 if (!priv->has_encoder) in stm32_count_function_write()
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
6 obj-$(CONFIG_COUNTER) += counter.o
7 counter-y := counter-core.o counter-sysfs.o counter-chrdev.o
9 obj-$(CONFIG_I8254) += i8254.o
10 obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
11 obj-$(CONFIG_INTERRUPT_CNT) += interrupt-cnt.o
12 obj-$(CONFIG_RZ_MTU3_CNT) += rz-mtu3-cnt.o
13 obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o
14 obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o
15 obj-$(CONFIG_TI_EQEP) += ti-eqep.o
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/linux/Documentation/devicetree/bindings/timer/
H A Dst,stm32-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/st,stm32-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 general-purpose 16 and 32 bits timers
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Patrice Chotard <patrice.chotard@foss.st.com>
15 const: st,stm32-timer
30 - compatible
31 - reg
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/linux/drivers/clocksource/
H A Dtimer-stm32.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com>
6 * Inspired by time-efm32.c from Uwe Kleine-Koenig
23 #include "timer-of.h"
54 * stm32_timer_of_bits_set - set accessor helper
58 * Accessor helper to set the number of bits in the timer-of private
64 struct stm32_timer_private *pd = to->private_data; in stm32_timer_of_bits_set()
66 pd->bits = bits; in stm32_timer_of_bits_set()
70 * stm32_timer_of_bits_get - get accessor helper
73 * Accessor helper to get the number of bits in the timer-of private
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H A Darmv7m_systick.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com>
34 pr_warn("system-timer: invalid base address\n"); in system_timer_of_register()
35 return -ENXIO; in system_timer_of_register()
38 ret = of_property_read_u32(np, "clock-frequency", &rate); in system_timer_of_register()
52 ret = -EINVAL; in system_timer_of_register()
70 pr_info("ARM System timer initialized as clocksource\n"); in system_timer_of_register()
80 pr_warn("ARM System timer register failed (%d)\n", ret); in system_timer_of_register()
85 TIMER_OF_DECLARE(arm_systick, "arm,armv7m-systick",
/linux/include/linux/mfd/
H A Dstm32-lptimer.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * STM32 Low-Power Timer parent driver.
6 * Inspired by Benjamin Gaignard's stm32-timers driver
26 #define STM32_LPTIM_HWCFGR2 0x3EC /* Hardware configuration register 2 - MP25 */
27 #define STM32_LPTIM_HWCFGR1 0x3F0 /* Hardware configuration register 1 - MP15 */
28 #define STM32_LPTIM_VERR 0x3F4 /* Version identification register - MP15 */
30 /* STM32_LPTIM_ISR - bit fields */
37 /* STM32_LPTIM_ICR - bit fields */
43 /* STM32_LPTIM_IER - bit fields */
46 /* STM32_LPTIM_CR - bit fields */
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/linux/drivers/iio/adc/
H A Dstm32-adc.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file is part of STM32 ADC driver
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
13 #include <linux/dma-mapping.h>
17 #include <linux/iio/timer/stm32-lptim-trigger.h>
18 #include <linux/iio/timer/stm32-timer-trigger.h>
26 #include <linux/nvmem-consumer.h>
31 #include "stm32-adc-core.h"
58 /* extsel - trigger mux selection value */
84 STM32_ADC_INT_CH_NONE = -1,
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/linux/drivers/media/platform/st/stm32/dma2d/
H A Ddma2d.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * STM32 DMA2D - 2D Graphics Accelerator Driver
8 * based on s5p-g2d
16 #include <linux/timer.h>
24 #include <media/v4l2-mem2mem.h>
25 #include <media/v4l2-device.h>
26 #include <media/v4l2-ioctl.h>
27 #include <media/v4l2-event.h>
28 #include <media/videobuf2-v4l2.h>
29 #include <media/videobuf2-dma-contig.h>
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/linux/drivers/clk/stm32/
H A Dclk-stm32mp13.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved
11 #include <dt-bindings/clock/stm32mp13-clks.h>
12 #include "clk-stm32-core.h"
13 #include "reset-stm32.h"
19 /* STM32 Gates definition */
272 /* STM32 Divivers definition */
309 /* STM32 Muxes definition */
474 .scmi_id = -1,\
642 "ck_hse", "pll4_r", "clk-hse-div2"
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H A Dclk-stm32mp1.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2018 - All Rights Reserved
9 #include <linux/clk-provider.h>
17 #include <linux/reset-controller.h>
21 #include <dt-bindings/clock/stm32mp1-clks.h>
23 #include "reset-stm32.h"
171 "ck_hse", "pll4_r", "clk-hse-div2"
384 /* STM32 Composite clock */
397 struct gate_cfg *gate_cfg = cfg->cfg; in _clk_hw_register_gate()
400 cfg->name, in _clk_hw_register_gate()
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/linux/drivers/rtc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
44 This clock should be battery-backed, so that it reads the correct
45 time when the system boots from a power-off state. Otherwise, your
141 once-per-second update interrupts, used for synchronization.
159 will be called rtc-test.
173 will be called rtc-88pm860x.
183 will be called rtc-88pm80x.
193 will be called rtc-88pm886.
197 tristate "Abracon AB-RTCMC-32.768kHz-B5ZE-S3"
200 AB-RTCMC-32.768kHz-B5ZE-S3 I2C RTC chip.
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/linux/drivers/mfd/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
58 tristate "Active-semi ACT8945A"
63 Support for the ACT8945A PMIC from Active-semi. This device
64 features three step-down DC/DC converters and four low-dropout
80 sun4i-gpadc-iio and the hwmon driver iio_hwmon.
83 called sun4i-gpadc.
114 tablets etc. It has 4 DC/DC step-down regulators, 3 DC/DC step-down
146 over at91-usart-serial driver and usart-spi-driver. Only one function
162 tristate "Atmel HLCDC (High-end LCD Controller)"
199 tristate "X-Powers AC100"
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/linux/
H A DMAINTAINERS5 ----------
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/linux/arch/arm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
50 # https://github.com/llvm/llvm-project/commit/d130f402642fba3d065aacb506cb061c899558de
168 The ARM series is a line of low-power-consumption RISC chip designs
170 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
171 manufactured, but legacy ARM-based PC hardware remains popular in
179 relocations. The combined range is -/+ 256 MiB, which is usually
272 Patch phys-to-virt and virt-to-phys translation functions at
276 This can only be used with non-XIP MMU kernels where the base
322 bool "MMU-based Paged Memory Management Support"
325 Select if you want MMU-based virtualised addressing space
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/linux/drivers/usb/dwc2/
H A Dcore.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
3 * core.h - DesignWare HS OTG Controller common declarations
5 * Copyright (C) 2004-2013 Synopsys, Inc.
12 #include <linux/device-id/pci.h>
22 * - no_printk: Disable tracing
23 * - pr_info: Print this info to the console
24 * - trace_printk: Print this info to trace buffer (good for verbose logging)
33 dev_name(hsotg->dev), ##__VA_ARGS__)
38 dev_name(hsotg->dev), ##__VA_ARGS__)
43 /* dwc2-hsotg declarations */
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