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/linux/Documentation/devicetree/bindings/mfd/
H A Dst,stm32-lptimer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Low-Power Timers
10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several
12 - PWM output (with programmable prescaler, configurable polarity)
13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT)
14 - Several counter modes:
15 - quadrature encoder to detect angular position and direction of rotary
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/linux/arch/arm/boot/dts/st/
H A Dstm32f746.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32fx-clock.h>
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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H A Dstm32f429.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include "../armv7-m.dtsi"
49 #include <dt-bindings/clock/stm32fx-clock.h>
50 #include <dt-bindings/mfd/stm32f4-rcc.h>
53 #address-cells = <1>;
54 #size-cells = <1>;
57 clk_hse: clk-hse {
58 #clock-cells = <0>;
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H A Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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H A Dstm32f469-disco.dts2 * Copyright 2016 - Lee Jones <lee.jones@linaro.org>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 /dts-v1/;
50 #include "stm32f469-pinctrl.dtsi"
51 #include <dt-bindings/gpio/gpio.h>
52 #include <dt-bindings/input/input.h>
55 model = "STMicroelectronics STM32F469i-DISCO board";
56 compatible = "st,stm32f469i-disco", "st,stm32f469";
60 stdout-path = "serial0:115200n8";
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H A Dstm32429i-eval.dts2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 /dts-v1/;
50 #include "stm32f429-pinctrl.dtsi"
51 #include <dt-bindings/input/input.h>
52 #include <dt-bindings/gpio/gpio.h>
53 #include <dt-bindings/media/video-interfaces.h>
56 model = "STMicroelectronics STM32429i-EVAL board";
57 compatible = "st,stm32429i-eval", "st,stm32f429";
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H A Dstm32746g-eval.dts2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "stm32f746-pinctrl.dtsi"
46 #include <dt-bindings/input/input.h>
47 #include <dt-bindings/interrupt-controller/irq.h>
50 model = "STMicroelectronics STM32746g-EVAL board";
51 compatible = "st,stm32746g-eval", "st,stm32f746";
55 stdout-path = "serial0:115200n8";
68 compatible = "gpio-leds";
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H A Dstm32f769-disco.dts2 * Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "stm32f769-pinctrl.dtsi"
46 #include <dt-bindings/input/input.h>
47 #include <dt-bindings/gpio/gpio.h>
50 model = "STMicroelectronics STM32F769-DISCO board";
51 compatible = "st,stm32f769-disco", "st,stm32f769";
55 stdout-path = "serial0:115200n8";
63 reserved-memory {
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H A Dstm32f429-disco.dts2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 /dts-v1/;
50 #include "stm32f429-pinctrl.dtsi"
51 #include <dt-bindings/input/input.h>
52 #include <dt-bindings/interrupt-controller/irq.h>
53 #include <dt-bindings/gpio/gpio.h>
56 model = "STMicroelectronics STM32F429i-DISCO board";
57 compatible = "st,stm32f429i-disco", "st,stm32f429";
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/linux/drivers/iio/trigger/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 menu "Triggers - standalone"
10 tristate "High resolution timer trigger"
17 module will be called iio-trig-hrtimer.
26 module will be called iio-trig-interrupt.
29 tristate "STM32 Low-Power Timer Trigger"
32 Select this option to enable STM32 Low-Power Timer Trigger.
33 This can be used as trigger source for STM32 internal ADC
37 module will be called stm32-lptimer-trigger.
40 tristate "STM32 Timer Trigger"
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H A Dstm32-lptimer-trigger.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer Trigger driver
9 * Inspired by Benjamin Gaignard's stm32-timer-trigger driver
13 #include <linux/iio/timer/stm32-lptim-trigger.h>
14 #include <linux/mfd/stm32-lptimer.h>
28 /* List Low-Power Timer triggers for H7, MP13, MP15 */
35 /* List Low-Power Timer triggers for STM32MP25 */
62 if (indio_dev->modes & INDIO_HARDWARE_TRIGGERED) in stm32_lptim_validate_device()
65 return -EINVAL; in stm32_lptim_validate_device()
76 * return true if the trigger is a valid STM32 IIO Low-Power Timer Trigger
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H A Dstm32-timer-trigger.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/iio/timer/stm32-timer-trigger.h>
14 #include <linux/mfd/stm32-timers.h>
23 /* List the triggers created by each timer */
42 { }, /* timer 18 */
43 { }, /* timer 19 */
47 /* List the triggers accepted by each timer */
54 { }, /* timer 6 */
55 { }, /* timer 7 */
58 { }, /* timer 10 */
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for triggers not associated with iio-devices
8 obj-$(CONFIG_IIO_HRTIMER_TRIGGER) += iio-trig-hrtimer.o
9 obj-$(CONFIG_IIO_INTERRUPT_TRIGGER) += iio-trig-interrupt.o
10 obj-$(CONFIG_IIO_STM32_LPTIMER_TRIGGER) += stm32-lptimer-trigger.o
11 obj-$(CONFIG_IIO_STM32_TIMER_TRIGGER) += stm32-timer-trigger.o
12 obj-$(CONFIG_IIO_SYSFS_TRIGGER) += iio-trig-sysfs.o
13 obj-$(CONFIG_IIO_TIGHTLOOP_TRIGGER) += iio-trig-loop.o
/linux/drivers/counter/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
14 Interval Timer (PIT). The Intel 825x family of chips was first
31 tristate "ACCES 104-QUAD-8 driver"
37 Say yes here to build support for the ACCES 104-QUAD-8 quadrature
38 encoder counter/interface device family (104-QUAD-8, 104-QUAD-4).
41 operation on the respective count value attribute. The 104-QUAD-8
50 tristate "Flex Timer Module Quadrature decoder driver"
54 Select this option to enable the Flex Timer Quadrature decoder
58 module will be called ftm-quaddec.
69 will be called intel-qep.
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H A Dstm32-timer-cnt.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Timer Encoder and Counter driver
12 #include <linux/mfd/stm32-timers.h>
65 regmap_read(priv->regmap, TIM_CNT, &cnt); in stm32_count_read()
77 regmap_read(priv->regmap, TIM_ARR, &ceiling); in stm32_count_write()
79 return -EINVAL; in stm32_count_write()
81 return regmap_write(priv->regmap, TIM_CNT, val); in stm32_count_write()
91 regmap_read(priv->regmap, TIM_SMCR, &smcr); in stm32_count_function_read()
107 return -EINVAL; in stm32_count_function_read()
123 if (!priv->has_encoder) in stm32_count_function_write()
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
6 obj-$(CONFIG_COUNTER) += counter.o
7 counter-y := counter-core.o counter-sysfs.o counter-chrdev.o
9 obj-$(CONFIG_I8254) += i8254.o
10 obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
11 obj-$(CONFIG_INTERRUPT_CNT) += interrupt-cnt.o
12 obj-$(CONFIG_RZ_MTU3_CNT) += rz-mtu3-cnt.o
13 obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o
14 obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o
15 obj-$(CONFIG_TI_EQEP) += ti-eqep.o
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/linux/Documentation/devicetree/bindings/timer/
H A Dst,stm32-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/st,stm32-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 general-purpose 16 and 32 bits timers
10 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
11 - Patrice Chotard <patrice.chotard@foss.st.com>
15 const: st,stm32-timer
30 - compatible
31 - reg
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/linux/drivers/clocksource/
H A Dtimer-stm32.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com>
6 * Inspired by time-efm32.c from Uwe Kleine-Koenig
23 #include "timer-of.h"
54 * stm32_timer_of_bits_set - set accessor helper
58 * Accessor helper to set the number of bits in the timer-of private
64 struct stm32_timer_private *pd = to->private_data; in stm32_timer_of_bits_set()
66 pd->bits = bits; in stm32_timer_of_bits_set()
70 * stm32_timer_of_bits_get - get accessor helper
73 * Accessor helper to get the number of bits in the timer-of private
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H A Dtimer-stm32-lp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
12 #include <linux/mfd/stm32-lptimer.h>
44 regmap_write(priv->reg, STM32_LPTIM_CR, 0); in stm32_clkevent_lp_shutdown()
45 regmap_write(priv->reg, STM32_LPTIM_IER, 0); in stm32_clkevent_lp_shutdown()
47 regmap_write(priv->reg, STM32_LPTIM_ICR, STM32_LPTIM_ARRMCF); in stm32_clkevent_lp_shutdown()
57 regmap_read(priv->reg, STM32_LPTIM_CR, &val); in stm32mp25_clkevent_lp_set_evt()
60 regmap_write(priv->reg, STM32_LPTIM_CR, STM32_LPTIM_ENABLE); in stm32mp25_clkevent_lp_set_evt()
64 * 62.5 micro-seconds, round it up. in stm32mp25_clkevent_lp_set_evt()
69 regmap_write(priv->reg, STM32_LPTIM_ARR, evt); in stm32mp25_clkevent_lp_set_evt()
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_TIMER_OF) += timer-of.o
3 obj-$(CONFIG_TIMER_PROBE) += timer-probe.o
4 obj-$(CONFIG_ATMEL_PIT) += timer-atmel-pit.o
5 obj-$(CONFIG_ATMEL_ST) += timer-atmel-st.o
6 obj-$(CONFIG_ATMEL_TCB_CLKSRC) += timer-atmel-tcb.o
7 obj-$(CONFIG_X86_PM_TIMER) += acpi_pm.o
8 obj-$(CONFIG_SCx200HR_TIMER) += scx200_hrt.o
9 obj-$(CONFIG_CS5535_CLOCK_EVENT_SRC) += timer-cs5535.o
10 obj-$(CONFIG_CLKSRC_JCORE_PIT) += jcore-pit.o
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H A Darmv7m_systick.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com>
34 pr_warn("system-timer: invalid base address\n"); in system_timer_of_register()
35 return -ENXIO; in system_timer_of_register()
38 ret = of_property_read_u32(np, "clock-frequency", &rate); in system_timer_of_register()
52 ret = -EINVAL; in system_timer_of_register()
70 pr_info("ARM System timer initialized as clocksource\n"); in system_timer_of_register()
80 pr_warn("ARM System timer register failed (%d)\n", ret); in system_timer_of_register()
85 TIMER_OF_DECLARE(arm_systick, "arm,armv7m-systick",
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
36 bool "BCM2835 timer driver" if COMPILE_TEST
39 Enables the support for the BCM2835 timer driver.
42 bool "BCM mobile timer driver" if COMPILE_TEST
45 Enables the support for the BCM Kona mobile timer driver.
48 bool "Texas Instruments DaVinci timer driver" if COMPILE_TEST
50 Enables the support for the TI DaVinci timer driver.
53 bool "Digicolor timer driver" if COMPILE_TEST
57 Enables the support for the digicolor timer driver.
60 bool "OMAP dual-mode timer driver" if ARCH_K3 || COMPILE_TEST
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/linux/drivers/pwm/
H A Dpwm-stm32-lp.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer PWM driver
9 * Inspired by Gerald Baeza's pwm-stm32 driver
13 #include <linux/mfd/stm32-lptimer.h>
31 /* STM32 Low-Power Timer is preceded by a configurable power-of-2 prescaler */
41 if (!priv->num_cc_chans) in stm32_pwm_lp_update_allowed()
44 ret = regmap_read(priv->regmap, STM32_LPTIM_CCMR1, &ccmr1); in stm32_pwm_lp_update_allowed()
71 if (!priv->num_cc_chans) in stm32_pwm_lp_compare_channel_apply()
74 ret = regmap_read(priv->regmap, STM32_LPTIM_CCMR1, &ccmr1); in stm32_pwm_lp_compare_channel_apply()
79 /* Must disable CC channel (CCxE) to modify polarity (CCxP), then re-enable */ in stm32_pwm_lp_compare_channel_apply()
[all …]
/linux/include/linux/mfd/
H A Dstm32-lptimer.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * STM32 Low-Power Timer parent driver.
6 * Inspired by Benjamin Gaignard's stm32-timers driver
26 #define STM32_LPTIM_HWCFGR2 0x3EC /* Hardware configuration register 2 - MP25 */
27 #define STM32_LPTIM_HWCFGR1 0x3F0 /* Hardware configuration register 1 - MP15 */
28 #define STM32_LPTIM_VERR 0x3F4 /* Version identification register - MP15 */
30 /* STM32_LPTIM_ISR - bit fields */
37 /* STM32_LPTIM_ICR - bit fields */
43 /* STM32_LPTIM_IER - bit fields */
46 /* STM32_LPTIM_CR - bit fields */
[all …]
/linux/drivers/watchdog/
H A Dstm32_iwdg.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for STM32 Independent Watchdog
32 #define IWDG_EWCR 0x14 /* Early Wake-up Register */
103 dev_dbg(wdd->parent, "%s\n", __func__); in stm32_iwdg_start()
105 if (!wdd->pretimeout) in stm32_iwdg_start()
106 wdd->pretimeout = 3 * wdd->timeout / 4; in stm32_iwdg_start()
108 tout = clamp_t(unsigned int, wdd->timeout, in stm32_iwdg_start()
109 wdd->min_timeout, wdd->max_hw_heartbeat_ms / 1000); in stm32_iwdg_start()
110 ptot = clamp_t(unsigned int, tout - wdd->pretimeout, in stm32_iwdg_start()
111 wdd->min_timeout, tout); in stm32_iwdg_start()
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