Searched +full:stm32 +full:- +full:pwm +full:- +full:lp (Results 1 – 7 of 7) sorted by relevance
| /linux/Documentation/devicetree/bindings/mfd/ |
| H A D | st,stm32-lptimer.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 Low-Power Timers 10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several 12 - PWM output (with programmable prescaler, configurable polarity) 13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT) 14 - Several counter modes: 15 - quadrature encoder to detect angular position and direction of rotary [all …]
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| /linux/drivers/pwm/ |
| H A D | pwm-stm32-lp.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * STM32 Low-Power Timer PWM driver 9 * Inspired by Gerald Baeza's pwm-stm32 driver 13 #include <linux/mfd/stm32-lptimer.h> 18 #include <linux/pwm.h> 31 /* STM32 Low-Power Timer is preceded by a configurable power-of-2 prescaler */ 40 /* Only one PWM on this LPTIMER: enable, prescaler and reload value can be changed */ in stm32_pwm_lp_update_allowed() 41 if (!priv->num_cc_chans) in stm32_pwm_lp_update_allowed() 44 ret = regmap_read(priv->regmap, STM32_LPTIM_CCMR1, &ccmr1); in stm32_pwm_lp_update_allowed() 71 if (!priv->num_cc_chans) in stm32_pwm_lp_compare_channel_apply() [all …]
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| /linux/arch/arm/boot/dts/st/ |
| H A D | stm32h743.dtsi | 2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com> 4 * This file is dual-licensed: you can use it either under the terms 43 #include "../armv7-m.dtsi" 44 #include <dt-bindings/clock/stm32h7-clks.h> 45 #include <dt-bindings/mfd/stm32h7-rcc.h> 46 #include <dt-bindings/interrupt-controller/irq.h> 49 #address-cells = <1>; 50 #size-cells = <1>; 53 clk_hse: clk-hse { 54 #clock-cells = <0>; [all …]
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| H A D | stm32mp131.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp13-clks.h> 8 #include <dt-bindings/reset/stm32mp13-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
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| H A D | stm32f746.dtsi | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 43 #include "../armv7-m.dtsi" 44 #include <dt-bindings/clock/stm32fx-clock.h> 45 #include <dt-bindings/mfd/stm32f7-rcc.h> 46 #include <dt-bindings/interrupt-controller/irq.h> 49 #address-cells = <1>; 50 #size-cells = <1>; 53 clk_hse: clk-hse { 54 #clock-cells = <0>; [all …]
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| /linux/drivers/spi/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 13 dynamic device discovery; some are even write-only or read-only. 17 chips, analog to digital (and d-to-a) converters, and more. 44 If your system has an master-capable SPI controller (which 56 by providing a high-leve [all...] |
| /linux/ |
| H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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