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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dst,stm32-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: STM32 GPIO and Pin Mux/Config controller
11 - Alexandre TORGUE <alexandre.torgue@foss.st.com>
14 STMicroelectronics's STM32 MCUs integrate a GPIO and Pin mux/config hardware
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
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/linux/arch/arm/boot/dts/st/
H A Dstm32mp157c-phycore-stm32mp1-3.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
7 /dts-v1/;
9 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
12 #include "stm32mp15xxac-pinctrl.dtsi"
13 #include "stm32mp157c-phycore-stm32mp15-som.dtsi"
16 model = "PHYTEC phyCORE-STM32MP1-3 Dev Board";
17 compatible = "phytec,phycore-stm32mp1-3",
18 "phytec,phycore-stm32mp157c-som", "st,stm32mp157";
H A Dstm32mp157c-osd32mp1-red.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) Geanix ApS 2023 - All Rights Reserved
7 /dts-v1/;
11 #include "stm32mp15xx-osd32.dtsi"
12 #include "stm32mp15xxac-pinctrl.dtsi"
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
19 compatible = "oct,stm32mp157c-osd32-red", "oct,stm32mp15xx-osd32", "st,stm32mp157";
26 stdout-path = "serial0:115200n8";
29 led-controller-0 {
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H A Dstm32h7-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
47 i2c1_pins_a: i2c1-0 {
51 bias-disable;
52 drive-open-drain;
53 slew-rate = <0>;
57 ethernet_rmii: rmii-0 {
68 slew-rate = <2>;
72 sdmmc1_b4_pins_a: sdmmc1-b4-0 {
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H A Dstm32f7-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
7 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
8 #include <dt-bindings/mfd/stm32f7-rcc.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
16 interrupt-parent = <&exti>;
20 gpio-controller;
21 #gpio-cells = <2>;
22 interrupt-controller;
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H A Dstm32f4-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
44 #include <dt-bindings/mfd/stm32f4-rcc.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
52 interrupt-parent = <&exti>;
56 gpio-controller;
57 #gpio-cells = <2>;
58 interrupt-controller;
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H A Dstm32mp13-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
9 /omit-if-no-ref/
10 adc1_pins_a: adc1-pins-0 {
16 /omit-if-no-ref/
17 adc1_usb_cc_pins_a: adc1-usb-cc-pins-0 {
24 /omit-if-no-ref/
25 adc1_usb_cc_pins_b: adc1-usb-cc-pins-1 {
32 /omit-if-no-ref/
[all …]
/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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