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Searched +full:stm32 +full:- +full:exti (Results 1 – 14 of 14) sorted by relevance

/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Dst,stm32-exti.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/st,stm32-exti.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STM32 External Interrupt Controller
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Ludovic Barre <ludovic.barre@foss.st.com>
16 - items:
17 - enum:
18 - st,stm32-exti
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/linux/arch/arm/boot/dts/st/
H A Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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H A Dstm32f746.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32fx-clock.h>
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
52 clk_hse: clk-hse {
53 #clock-cells = <0>;
54 compatible = "fixed-clock";
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H A Dstm32f429.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include "../armv7-m.dtsi"
49 #include <dt-bindings/clock/stm32fx-clock.h>
50 #include <dt-bindings/mfd/stm32f4-rcc.h>
53 #address-cells = <1>;
54 #size-cells = <1>;
57 clk_hse: clk-hse {
58 #clock-cells = <0>;
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H A Dstm32f7-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
7 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
8 #include <dt-bindings/mfd/stm32f7-rcc.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
16 interrupt-parent = <&exti>;
20 gpio-controller;
21 #gpio-cells = <2>;
22 interrupt-controller;
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H A Dstm32f4-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
44 #include <dt-bindings/mfd/stm32f4-rcc.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
52 interrupt-parent = <&exti>;
56 gpio-controller;
57 #gpio-cells = <2>;
58 interrupt-controller;
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/linux/Documentation/devicetree/bindings/mfd/
H A Dst,stm32-lptimer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Low-Power Timers
10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several
12 - PWM output (with programmable prescaler, configurable polarity)
13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT)
14 - Several counter modes:
15 - quadrature encoder to detect angular position and direction of rotary
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dst,stm32-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: STM32 GPIO and Pin Mux/Config controller
11 - Alexandre TORGUE <alexandre.torgue@foss.st.com>
14 STMicroelectronics's STM32 MCUs integrate a GPIO and Pin mux/config hardware
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
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/linux/Documentation/devicetree/bindings/bus/
H A Dst,stm32-etzpc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/st,stm32-etzpc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STM32 Extended TrustZone protection controller
11 devices with programmable-security attributes (securable resources).
14 - Gatien Chevallier <gatien.chevallier@foss.st.com>
20 const: st,stm32-etzpc
22 - compatible
27 - const: st,stm32-etzpc
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/linux/Documentation/devicetree/bindings/rtc/
H A Dst,stm32-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Real Time Clock
10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
15 - st,stm32-rtc
16 - st,stm32h7-rtc
17 - st,stm32mp1-rtc
18 - st,stm32mp25-rtc
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/linux/Documentation/devicetree/bindings/mailbox/
H A Dst,stm32-ipcc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/st,stm32-ipcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 IPC controller
16 - Fabien Dessenne <fabien.dessenne@foss.st.com>
17 - Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
21 const: st,stm32mp1-ipcc
31 - description: rx channel occupied
32 - description: tx channel free
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/linux/Documentation/ABI/testing/
H A Dsysfs-bus-iio-adc-stm325 The STM32 ADC can be configured to use external trigger sources
6 (e.g. timers, pwm or exti gpio). Then, it can be tuned to start
9 - "rising-edge"
10 - "falling-edge"
11 - "both-edges".
/linux/drivers/irqchip/
H A Dirq-stm32-exti.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) STMicroelectronics 2017-2024
5 * Author: Maxime Coquelin <mcoquelin.stm32@gmail.com>
110 struct stm32_exti_chip_data *chip_data = gc->private; in stm32_exti_pending()
111 const struct stm32_exti_bank *stm32_bank = chip_data->reg_bank; in stm32_exti_pending()
113 return irq_reg_readl(gc, stm32_bank->rpr_ofst); in stm32_exti_pending()
120 unsigned int nbanks = domain->gc->num_chips; in stm32_irq_handler()
142 u32 mask = BIT(d->hwirq % IRQS_PER_BANK); in stm32_exti_set_type()
158 return -EINVAL; in stm32_exti_set_type()
167 struct stm32_exti_chip_data *chip_data = gc->private; in stm32_irq_set_type()
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_IRQCHIP) += irqchip.o
4 obj-$(CONFIG_AL_FIC) += irq-al-fic.o
5 obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o
6 obj-$(CONFIG_ATH79) += irq-ath79-cpu.o
7 obj-$(CONFIG_ATH79) += irq-ath79-misc.o
8 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
9 obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
10 obj-$(CONFIG_ARCH_ACTIONS) += irq-owl-sirq.o
11 obj-$(CONFIG_DAVINCI_CP_INTC) += irq-davinci-cp-intc.o
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