| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | rockchip,rk3399-dmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/rockchip,rk3399-dmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <briannorris@chromium.org>
15 - rockchip,rk3399-dmc
17 devfreq-events:
26 clock-names:
28 - const: dmc_clk
30 operating-points-v2: true
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| /linux/drivers/devfreq/ |
| H A D | rk3399_dmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Lin Huang <hl@rock-chips.com>
7 #include <linux/arm-smccc.h>
12 #include <linux/devfreq-event.h>
29 #define NS_TO_CYCLE(NS, MHz) (((NS) * (MHz)) / NSEC_PER_USEC) argument
75 unsigned long old_clk_rate = dmcfreq->rate; in rk3399_dmcfreq_target()
93 if (dmcfreq->rate == target_rate) in rk3399_dmcfreq_target()
96 mutex_lock(&dmcfreq->lock); in rk3399_dmcfreq_target()
99 * Ensure power-domain transitions don't interfere with ARM Trusted in rk3399_dmcfreq_target()
100 * Firmware power-domain idling. in rk3399_dmcfreq_target()
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| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3399-gru.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
9 #include "rk3399-op1.dtsi"
18 stdout-path = "serial2:115200n8";
27 * - Rails that only connect to the EC (or devices that the EC talks to)
29 * - Rails _are_ included if the rails go to the AP even if the AP
38 * - The EC controls the enable and the EC always enables a rail as
40 * - The rails are actually connected to each other by a jumper and
45 ppvar_sys: regulator-ppvar-sys {
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| H A D | rk3399-gru-chromebook.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Google Gru-Chromebook shared properties
8 #include "rk3399-gru.dtsi"
11 pp900_ap: regulator-pp900-ap {
12 compatible = "regulator-fixed";
13 regulator-name = "pp900_ap";
16 regulator-always-on;
17 regulator-boot-on;
18 regulator-min-microvolt = <900000>;
19 regulator-max-microvolt = <900000>;
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| /linux/drivers/spi/ |
| H A D | spi-stm32.c | 1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
12 #include <linux/dma-mapping.h>
202 #define STM32_SPI_HOST_MODE(stm32_spi) (!(stm32_spi)->device_mode)
203 #define STM32_SPI_DEVICE_MODE(stm32_spi) ((stm32_spi)->device_mode)
206 * struct stm32_spi_reg - stm32 SPI register & bitfield desc
218 * struct stm32_spi_regspec - stm32 registers definition, compatible dependent data
250 * struct stm32_spi_cfg - stm32 compatible configuration data
258 * @set_data_idleness: optional routine to configure registers to desired idle
305 * struct stm32_spi - private data of the SPI controller
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| /linux/drivers/scsi/ |
| H A D | wd33c93.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
9 * Drew Eckhardt's excellent 'Generic NCR5380' sources from Linux-PC
18 * - Target Disconnection/Reconnection is now supported. Any
21 * call 'adaptive disconnect' - meaning that each command
24 * device chooses), or as a "SCSI-bus-hog".
26 * - Synchronous data transfers are now supported. Because of
29 * this faster protocol - it can be enabled via the command-
30 * line on a device-by-device basis.
32 * - Runtime operating parameters can now be specified through
38 * - The old driver relied exclusively on what the Western Digital
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| H A D | NCR5380.c | 1 // SPDX-License-Identifier: GPL-2.0
4 * to implement 5380 SCSI drivers under Linux with a non-trantor
13 * +1 (303) 666-5836
24 * 1+ (719) 578-3400
25 * 1+ (800) 334-5454
42 * transfer - some PC's will use the I/O bus, 68K's must use
46 * each 5380 in the system - commands that haven't been issued yet,
51 * allowing multiple commands to propagate all the way to a SCSI-II device
57 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
78 * idle for too long, the system will try to sleep.
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| /linux/drivers/gpu/drm/gma500/ |
| H A D | psb_intel_reg.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
39 #define GMBUS_HOLD_EXT (1<<7) /* 300ns hold time, rsvd on Pineview */
70 #define GMBUS3 0x510c /* data buffer bytes 3-0 */
155 * - PLL enabled
156 * - pipe enabled
157 * - LVDS/DVOB/DVOC on
256 * in DVO non-gang */
413 * Programmed value is multiplier - 1, up to 5x.
442 /* Selects pipe B for LVDS data. Must be set on pre-965. */
449 * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per
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| /linux/drivers/gpu/drm/radeon/ |
| H A D | evergreen.c | 62 spin_lock_irqsave(&rdev->cg_idx_lock, flags); in eg_cg_rreg()
65 spin_unlock_irqrestore(&rdev->cg_idx_lock, flags); in eg_cg_rreg()
73 spin_lock_irqsave(&rdev->cg_idx_lock, flags); in eg_cg_wreg()
76 spin_unlock_irqrestore(&rdev->cg_idx_lock, flags); in eg_cg_wreg()
84 spin_lock_irqsave(&rdev->pif_idx_lock, flags); in eg_pif_phy0_rreg()
87 spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); in eg_pif_phy0_rreg()
95 spin_lock_irqsave(&rdev->pif_idx_lock, flags); in eg_pif_phy0_wreg()
98 spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); in eg_pif_phy0_wreg()
106 spin_lock_irqsave(&rdev->pif_idx_lock, flags); in eg_pif_phy1_rreg()
109 spin_unlock_irqrestore(&rdev->pif_idx_lock, flags); in eg_pif_phy1_rreg()
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| /linux/drivers/net/ethernet/broadcom/bnx2x/ |
| H A D | bnx2x_main.c | 3 * Copyright (c) 2007-2013 Broadcom Corporation
36 #include <linux/dma-mapping.h>
83 #define FW_FILE_NAME_E1 "bnx2x/bnx2x-e1-" FW_FILE_VERSION ".fw"
84 #define FW_FILE_NAME_E1H "bnx2x/bnx2x-e1h-" FW_FILE_VERSION ".fw"
85 #define FW_FILE_NAME_E2 "bnx2x/bnx2x-e2-" FW_FILE_VERSION ".fw"
86 #define FW_FILE_NAME_E1_V15 "bnx2x/bnx2x-e1-" FW_FILE_VERSION_V15 ".fw"
87 #define FW_FILE_NAME_E1H_V15 "bnx2x/bnx2x-e1h-" FW_FILE_VERSION_V15 ".fw"
88 #define FW_FILE_NAME_E2_V15 "bnx2x/bnx2x-e2-" FW_FILE_VERSION_V15 ".fw"
117 MODULE_PARM_DESC(int_mode, " Force interrupt mode other than MSI-X "
124 static int mrrs = -1;
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| /linux/drivers/video/fbdev/savage/ |
| H A D | savagefb_driver.c | 2 * linux/drivers/video/savagefb.c -- S3 Savage Framebuffer Driver
4 * Copyright (c) 2001-2002 Denis Oliver Kropp <dok@directfb.org>
16 * - hardware accelerated clear and move
19 * - wait for vertical retrace before writing to cr67
21 * - use synchronization registers cr23 and cr26
24 * - reset 3D engine
25 * - don't return alpha bits for 32bit format
28 * - added WaitIdle functions for all Savage types
29 * - do WaitIdle before mode switching
30 * - code cleanup
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| /linux/arch/s390/kvm/ |
| H A D | interrupt.c | 1 // SPDX-License-Identifier: GPL-2.0
10 #define KMSG_COMPONENT "kvm-s390"
24 #include <asm/access-regs.h>
25 #include <asm/asm-offsets.h>
34 #include "kvm-s390.h"
36 #include "trace-s390.h"
54 read_lock(&vcpu->kvm->arch.sca_lock); in sca_ext_call_pending()
55 if (vcpu->kvm->arch.use_esca) { in sca_ext_call_pending()
56 struct esca_block *sca = vcpu->kvm->arch.sca; in sca_ext_call_pending()
58 sca->cpu[vcpu->vcpu_id].sigp_ctrl; in sca_ext_call_pending()
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| /linux/drivers/net/wireless/ath/ath11k/ |
| H A D | mac.c | 1 // SPDX-License-Identifier: BSD-3-Clause-Clear
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
164 /* new addition in IEEE Std 802.11ax-2021 */
244 #define ath11k_a_rates_size (ARRAY_SIZE(ath11k_legacy_rates) - 4)
405 return -EINVAL; in ath11k_mac_hw_ratecode_to_legacy_rate()
426 for (i = 0; i < sband->n_bitrates; i++) in ath11k_mac_bitrate_to_idx()
427 if (sband->bitrates[i].bitrate == bitrate) in ath11k_mac_bitrate_to_idx()
438 for (nss = IEEE80211_HT_MCS_MASK_LEN - 1; nss >= 0; nss--) in ath11k_mac_max_ht_nss()
450 for (nss = NL80211_VHT_NSS_MAX - 1; nss >= 0; nss--) in ath11k_mac_max_vht_nss()
462 for (nss = NL80211_HE_NSS_MAX - 1; nss >= 0; nss--) in ath11k_mac_max_he_nss()
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| /linux/include/net/ |
| H A D | cfg80211.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * Copyright 2006-2010 Johannes Berg <johannes@sipsolutions.net>
8 * Copyright 2013-2014 Intel Mobile Communications GmbH
9 * Copyright 2015-2017 Intel Deutschland GmbH
10 * Copyright (C) 2018-2025 Intel Corporation
72 * enum ieee80211_channel_flags - channel flags
167 * struct ieee80211_channel - channe
6812 const struct ieee80211_radiotap_namespace *ns; global() member
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| /linux/drivers/net/ethernet/sfc/ |
| H A D | mcdi_pcol.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright 2009-2018 Solarflare Communications Inc.
5 * Copyright 2019-2020 Xilinx Inc.
13 /* Power-on reset state */
35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
38 /* The rest of these are firmware-defined */
46 /* Values to be written to the per-port status dword in shared
71 * | | \--- Response
72 * | \------- Error
73 * \------------------------------ Resync (always set)
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| /linux/ |
| H A D | MAINTAINERS | 5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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