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Searched +full:spmi +full:- +full:clkdiv (Results 1 – 2 of 2) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,spmi-clkdiv.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,spmi-clkdiv.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SPMI PMIC clock divider
10 - Bjorn Andersson <andersson@kernel.org>
11 - Stephen Boyd <sboyd@kernel.org>
14 Qualcomm SPMI PMIC clock divider configures the clock frequency of a set of
20 const: qcom,spmi-clkdiv
27 - description: Board XO source
[all …]
/linux/drivers/clk/qcom/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
1411 Say Y if you want to toggle LPASS-adjacent resets within
1520 tristate "SPMI PMIC clkdiv Support"
1521 depends on SPMI || COMPILE_TEST
1523 This driver supports the clkdiv functionality on the Qualcomm
1524 Technologies, Inc. SPMI PMIC. It configures the frequency of
1525 clkdiv outputs of the PMIC. These clocks are typically wired
1529 tristate "High-Frequency PLL (HFPLL) Clock Controller"
1531 Support for the high-frequency PLLs present on Qualcomm devices.