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Searched +full:spi +full:- +full:sck +full:- +full:cs +full:- +full:delay (Results 1 – 25 of 37) sorted by relevance

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/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1043a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for Freescale Layerscape-1043A family SoC.
5 * Copyright 2014-2015 Freescale Semiconductor, Inc.
11 /dts-v1/;
12 #include "fsl-ls1043a.dtsi"
16 compatible = "fsl,ls1043a-rdb", "fsl,ls1043a";
26 stdout-path = "serial0:115200n8";
36 shunt-resistor = <1000>;
67 #address-cells = <2>;
68 #size-cells = <1>;
[all …]
/linux/Documentation/devicetree/bindings/spi/
H A Dfsl,dspi-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/fsl,dspi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for Freescale DSPI controller
10 - Vladimir Oltean <olteanv@gmail.com>
13 See spi-peripheral-props.yaml for more info.
16 fsl,spi-cs-sck-delay:
19 Delay in nanoseconds between activating chip select and the start of
23 fsl,spi-sck-cs-delay:
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/linux/drivers/spi/
H A Dspi-gpio.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * SPI host driver using generic bitbanged GPIO
15 #include <linux/spi/spi.h>
16 #include <linux/spi/spi_bitbang.h>
17 #include <linux/spi/spi_gpio.h>
20 * This bitbanging SPI host driver should help make systems usable
21 * when a native hardware SPI engine is not available, perhaps because
25 * platform_device->driver_data ... points to spi_gpio
27 * spi->controller_state ... reserved for bitbang framework code
29 * spi->controller->dev.driver_data ... points to spi_gpio->bitbang
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H A Dspi-fsl-dspi.c1 // SPDX-License-Identifier: GPL-2.0+
10 #include <linux/delay.h>
12 #include <linux/dma-mapping.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/spi-fsl-dspi.h>
23 #define DRIVER_NAME "fsl-dspi"
106 #define SPI_FRAME_BITS(bits) SPI_CTAR_FMSZ((bits) - 1)
107 #define SPI_FRAME_EBITS(bits) SPI_CTARE_FMSZE(((bits) - 1) >> 4)
146 /* Has A-011218 DMA erratum */
152 /* Has A-011218 DMA erratum */
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H A Dspi-bcm2835aux.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for Broadcom BCM2835 auxiliary SPI Controllers
8 * Based on: spi-bcm2835.c
16 #include <linux/delay.h>
25 #include <linux/spi/spi.h>
32 "time in us to run a transfer in polling mode - if zero no polling is used\n");
35 * spi register defines
44 /* SPI register offsets */
112 snprintf(name, sizeof(name), "spi-bcm2835aux-%s", dname); in bcm2835aux_debugfs_create()
116 bs->debugfs_dir = dir; in bcm2835aux_debugfs_create()
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H A Dspi-mxs.c1 // SPDX-License-Identifier: GPL-2.0+
3 // Freescale MXS SPI host driver
15 // Based on code from U-Boot bootloader by:
18 // Based on spi-stmp.c, which is:
26 #include <linux/delay.h>
28 #include <linux/dma-mapping.h>
39 #include <linux/spi/spi.h>
40 #include <linux/spi/mxs-spi.h>
41 #include <trace/events/spi.h>
42 #include <linux/dma/mxs-dma.h>
[all …]
H A Dspi-sifive.c1 // SPDX-License-Identifier: GPL-2.0
5 // SiFive SPI controller driver (master mode only)
15 #include <linux/spi/spi.h>
31 #define SIFIVE_SPI_REG_DELAY0 0x28 /* Delay control 0 */
32 #define SIFIVE_SPI_REG_DELAY1 0x2c /* Delay control 1 */
38 #define SIFIVE_SPI_REG_FCTRL 0x60 /* SPI flash interface control */
39 #define SIFIVE_SPI_REG_FFMT 0x64 /* SPI flash instruction format */
95 u32 cs_inactive; /* level of the CS pins when inactive */
96 struct completion done; /* wake-up from interrupt */
99 static void sifive_spi_write(struct sifive_spi *spi, int offset, u32 value) in sifive_spi_write() argument
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H A Dspi-omap-uwire.c11 * Copyright (C) 2005 David Brownell (ported to 2.6 SPI interface)
34 #include <linux/delay.h>
42 #include <linux/spi/spi.h>
43 #include <linux/spi/spi_bitbang.h>
47 #include <asm/mach-types.h>
48 #include <linux/soc/ti/omap1-io.h>
49 #include <linux/soc/ti/omap1-soc.h>
50 #include <linux/soc/ti/omap1-mux.h>
115 static inline void omap_uwire_configure_mode(u8 cs, unsigned long flags) in omap_uwire_configure_mode() argument
123 if (cs & 1) in omap_uwire_configure_mode()
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H A Dspi-omap2-mcspi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #include <linux/delay.h>
15 #include <linux/dma-mapping.h>
28 #include <linux/spi/spi.h>
32 #include <linux/platform_data/spi-omap2-mcspi.h>
49 /* per-channel banks, 0x14 bytes each, first is: */
56 /* per-register bitmasks: */
92 /* We have 2 DMA channels per CS, one for RX and one for TX */
117 struct list_head cs; member
154 writel_relaxed(val, mcspi->base + idx); in mcspi_write_reg()
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H A Dspi-bcm-qspi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for Broadcom BRCMSTB, NSP, NS2, Cygnus SPI Controllers
9 #include <linux/delay.h>
21 #include <linux/spi/spi.h>
22 #include <linux/mtd/spi-nor.h>
25 #include "spi-bcm-qspi.h"
153 /* stop at end of spi_transfer if delay */
165 /* events that make us deassert CS */
171 * to TXRAM and RXRAM when used as 32-bit registers respectively
257 return qspi->bspi_mode; in has_bspi()
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H A Dspi-sun6i.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2012 - 2014 Allwinner Tech
7 * Maxime Ripard <maxime.ripard@free-electrons.com>
12 #include <linux/delay.h>
23 #include <linux/spi/spi.h>
41 #define SUN6I_TFR_CTL_CS(cs) (((cs) << 4) & SUN6I_TFR_CTL_CS_MASK) argument
119 return readl(sspi->base_addr + reg); in sun6i_spi_read()
124 writel(value, sspi->base_addr + reg); in sun6i_spi_write()
157 while (len--) { in sun6i_spi_drain_fifo()
158 byte = readb(sspi->base_addr + SUN6I_RXDATA_REG); in sun6i_spi_drain_fifo()
[all …]
/linux/arch/arm/boot/dts/nxp/ls/
H A Dls1021a-tsn.dts1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright 2016-2018 NXP Semiconductors
6 /dts-v1/;
10 model = "NXP LS1021A-TSN Board";
11 compatible = "fsl,ls1021a-tsn", "fsl,ls1021a";
13 sys_mclk: clock-mclk {
14 compatible = "fixed-clock";
15 #clock-cells = <0>;
16 clock-frequency = <24576000>;
19 reg_vdda_codec: regulator-3V3 {
[all …]
/linux/arch/arm/boot/dts/nxp/vf/
H A Dvf610-bk4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
15 stdout-path = &uart1;
23 audio_ext: oscillator-audio {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <24576000>;
29 enet_ext: oscillator-ethernet {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
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H A Dvf610-zii-dev-rev-c.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
7 #include "vf610-zii-dev.dtsi"
11 compatible = "zii,vf610dev-c", "zii,vf610dev", "fsl,vf610";
13 mdio-mux {
14 compatible = "mdio-mux-gpio";
15 pinctrl-0 = <&pinctrl_mdio_mux>;
16 pinctrl-names = "default";
20 mdio-parent-bus = <&mdio1>;
21 #address-cells = <1>;
[all …]
/linux/arch/arm/boot/dts/intel/pxa/
H A Dpxa300-raumfeld-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 hw-revision = <0>;
14 stdout-path = &ffuart;
22 reg_3v3: regulator-3v3 {
23 compatible = "regulator-fixed";
24 regulator-name = "3v3-fixed-supply";
25 regulator-min-microvolt = <3300000>;
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/linux/Documentation/spi/
H A Dspi-summary.rst2 Overview of Linux kernel SPI support
5 02-Feb-2012
7 What is SPI?
8 ------------
9 The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
12 standardization body. SPI uses a host/target configuration.
14 The three signal wires hold a clock (SCK, often on the order of 10 MHz),
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
22 SPI hosts use a fourth "chip select" line to activate a given SPI target
24 in parallel. All SPI targets support chipselects; they are usually active
[all …]
/linux/arch/arm/boot/dts/gemini/
H A Dgemini-sq201.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
24 stdout-path = &uart0;
28 compatible = "gpio-keys";
30 button-setup {
31 debounce-interval = <100>;
32 wakeup-source;
[all …]
H A Dgemini-sl93512r.dts1 // SPDX-License-Identifier: GPL-2.0
5 * "Gemini324 EV-Board" before Storm acquired Storlink Semiconductor.
9 /dts-v1/;
12 #include <dt-bindings/input/input.h>
15 model = "Storlink Semiconductor Gemini324 EV-Board / Storm Semiconductor SL93512R_BRD";
17 #address-cells = <1>;
18 #size-cells = <1>;
28 stdout-path = &uart0;
32 compatible = "gpio-keys";
34 button-wps {
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H A Dgemini-dlink-dir-685.dts2 * Device Tree file for D-Link DIR-685 Xtreme N Storage Router
5 /dts-v1/;
8 #include <dt-bindings/input/input.h>
11 model = "D-Link DIR-685 Xtreme N Storage Router";
12 compatible = "dlink,dir-685", "cortina,gemini";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 /* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */
24 stdout-path = "uart0:19200n8";
28 compatible = "gpio-keys";
[all …]
/linux/include/linux/spi/
H A Dspi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later
21 #include <uapi/linux/spi/spi.h>
23 /* Max no. of CS supported per spi device */
36 * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
37 * and SPI infrastructure.
42 * struct spi_statistics - statistics for spi transfers
43 * @syncp: seqcount to protect members in this struct for per-cpu update
44 * on 32-bit systems
46 * @messages: number of spi-messages handled
95 u64_stats_update_begin(&__lstats->syncp); \
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx51-zii-rdu1.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/sound/fsl-imx-audmux.h>
12 compatible = "zii,imx51-rdu1", "fsl,imx51";
15 stdout-path = &uart1;
25 mdio-gpio0 = &mdio_gpio;
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <26000000>;
36 compatible = "gpio-gate-clock";
[all …]
H A Dimx7d-sdb.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 /dts-v1/;
11 compatible = "fsl,imx7d-sdb", "fsl,imx7d";
19 stdout-path = &uart1;
27 gpio-keys {
28 compatible = "gpio-keys";
29 pinctrl-names = "default";
30 pinctrl-0 = <&pinctrl_gpio_keys>;
32 key-volume-up {
36 wakeup-source;
[all …]
H A Dimx6ul-14x14-evk.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/media/video-interfaces.h>
9 stdout-path = &uart1;
17 backlight_display: backlight-display {
18 compatible = "pwm-backlight";
20 brightness-levels = <0 4 8 16 32 64 128 255>;
21 default-brightness-level = <6>;
26 reg_sd1_vmmc: regulator-sd1-vmmc {
27 compatible = "regulator-fixed";
28 regulator-name = "VSD_3V3";
[all …]
/linux/arch/mips/boot/dts/ingenic/
H A Dqi_lb60.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/iio/adc/ingenic,adc.h>
8 #include <dt-bindings/clock/ingenic,tcu.h>
9 #include <dt-bindings/input/input.h>
27 stdout-path = &uart0;
30 vcc: regulator-0 {
31 compatible = "regulator-fixed";
32 regulator-name = "vcc";
[all …]
H A Dgcw0.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include <dt-bindings/clock/ingenic,tcu.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/iio/adc/ingenic,adc.h>
9 #include <dt-bindings/input/input.h>
29 stdout-path = "serial2:57600n8";
33 compatible = "regulator-fixed";
34 regulator-name = "vcc";
36 regulator-min-microvolt = <3300000>;
[all …]

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