| /linux/drivers/spi/ |
| H A D | spi-davinci.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 16 #include <linux/dma-mapping.h> 18 #include <linux/spi/spi.h> 19 #include <linux/spi/spi_bitbang.h> 22 #include <linux/platform_data/spi-davinci.h> 88 /* SPI Controller registers */ 103 /* SPI Controller driver's private data. */ 110 void __iomem *base; member 136 if (dspi->rx) { in davinci_spi_rx_buf_u8() 137 u8 *rx = dspi->rx; in davinci_spi_rx_buf_u8() [all …]
|
| H A D | spi-stm32.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // STMicroelectronics STM32 SPI Controller driver 5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved 12 #include <linux/dma-mapping.h> 23 #include <linux/spi/spi.h> 27 /* STM32F4/7 SPI registers */ 83 /* STM32F4 SPI Baud Rate min/max divisor */ 87 /* STM32H7 SPI registers */ 162 /* STM32MP25 SPI registers bit fields */ 176 /* STM32H7 SPI Master Baud Rate min/max divisor */ [all …]
|
| H A D | spi-st-ssc4.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2008-2014 STMicroelectronics Limited 9 * SPI host mode controller driver, used in STMicroelectronics devices. 22 #include <linux/spi/spi.h> 23 #include <linux/spi/spi_bitbang.h> 54 /* SSC SPI Controller */ 55 void __iomem *base; member 59 /* SSC SPI current transaction */ 74 if (spi_st->words_remaining > FIFO_SIZE) in ssc_write_tx_fifo() 77 count = spi_st->words_remaining; in ssc_write_tx_fifo() [all …]
|
| H A D | spi-slave-mt27xx.c | 1 // SPDX-License-Identifier: GPL-2.0+ 6 #include <linux/dma-mapping.h> 12 #include <linux/spi/spi.h> 68 void __iomem *base; member 90 { .compatible = "mediatek,mt2712-spi-slave", 92 { .compatible = "mediatek,mt8195-spi-slave", 102 reg_val = readl(mdata->base + SPIS_DMA_CFG_REG); in mtk_spi_slave_disable_dma() 105 writel(reg_val, mdata->base + SPIS_DMA_CFG_REG); in mtk_spi_slave_disable_dma() 112 reg_val = readl(mdata->base + SPIS_CFG_REG); in mtk_spi_slave_disable_xfer() 115 writel(reg_val, mdata->base + SPIS_CFG_REG); in mtk_spi_slave_disable_xfer() [all …]
|
| H A D | spi-omap2-mcspi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 15 #include <linux/dma-mapping.h> 28 #include <linux/spi/spi.h> 32 #include <linux/platform_data/spi-omap2-mcspi.h> 49 /* per-channel banks, 0x14 bytes each, first is: */ 56 /* per-register bitmasks: */ 123 /* Virtual base address of the controller */ 124 void __iomem *base; member 141 void __iomem *base; member 155 writel_relaxed(val, mcspi->base + idx); in mcspi_write_reg() [all …]
|
| H A D | spi-imx.c | 1 // SPDX-License-Identifier: GPL-2.0+ 2 // Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved. 11 #include <linux/dma-mapping.h> 25 #include <linux/spi/spi.h> 30 #include <linux/dma/imx-dma.h> 78 int (*prepare_transfer)(struct spi_imx_data *spi_imx, struct spi_device *spi, 102 void __iomem *base; member 138 return d->devtype_data->devtype == IMX27_CSPI; in is_imx27_cspi() 143 return d->devtype_data->devtype == IMX35_CSPI; in is_imx35_cspi() 148 return d->devtype_data->devtype == IMX51_ECSPI; in is_imx51_ecspi() [all …]
|
| H A D | spi-mt7621.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // spi-mt7621.c -- MediaTek MT7621 SPI controller driver 6 // Copyright (C) 2011-2013 Gabor Juhos <juhosg@openwrt.org> 7 // Copyright (C) 2014-2015 Felix Fietkau <nbd@nbd.name> 9 // Some parts are based on spi-orion.c: 11 // Copyright (C) 2007-2008 Marvell Ltd. 21 #include <linux/spi/spi.h> 23 #define DRIVER_NAME "spi-mt7621" 59 void __iomem *base; member 65 static inline struct mt7621_spi *spidev_to_mt7621_spi(struct spi_device *spi) in spidev_to_mt7621_spi() argument [all …]
|
| H A D | spi-sprd.c | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <linux/dma-mapping.h> 7 #include <linux/dma/sprd-dma.h> 17 #include <linux/spi/spi.h> 151 void __iomem *base; member 177 * SPI transmission time. in sprd_spi_transfer_max_timeout() 179 u32 size = t->bits_per_word * SPRD_SPI_FIFO_SIZE; in sprd_spi_transfer_max_timeout() 180 u32 bit_time_us = DIV_ROUND_UP(USEC_PER_SEC, ss->hw_speed_hz); in sprd_spi_transfer_max_timeout() 183 * There is an interval between data and the data in our SPI hardware, in sprd_spi_transfer_max_timeout() 186 u32 interval_cycle = SPRD_SPI_FIFO_SIZE * ss->word_delay; in sprd_spi_transfer_max_timeout() [all …]
|
| H A D | spi-altera-dfl.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // DFL bus driver for Altera SPI Master 19 #include <linux/io-64-nonatomic-lo-hi.h> 21 #include <linux/spi/spi.h> 22 #include <linux/spi/altera.h> 52 void __iomem *base = context; in indirect_bus_reg_read() local 56 writeq((reg >> 2) | INDIRECT_RD, base + INDIRECT_ADDR); in indirect_bus_reg_read() 59 while ((readq(base + INDIRECT_ADDR) & INDIRECT_RD) && in indirect_bus_reg_read() 65 return -ETIME; in indirect_bus_reg_read() 68 v = readq(base + INDIRECT_RD_DATA); in indirect_bus_reg_read() [all …]
|
| H A D | spi-meson-spicc.c | 2 * Driver for Amlogic Meson SPI communication controller (SPICC) 7 * SPDX-License-Identifier: GPL-2.0+ 12 #include <linux/clk-provider.h> 19 #include <linux/spi/spi.h> 24 #include <linux/dma-mapping.h> 31 * DMA achieves a transfer with one or more SPI bursts, each SPI burst is made 40 * - 64 bits per word 41 * - The transfer length in word must be multiples of the dma_burst_len, and 43 * into several SPI bursts by this driver 77 #define SPICC_TH_EN BIT(1) /* TX FIFO Half-Full Interrupt */ [all …]
|
| H A D | spi-ti-qspi.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com 15 #include <linux/dma-mapping.h> 17 #include <linux/omap-dma.h> 30 #include <linux/spi/spi.h> 31 #include <linux/spi/spi-mem.h> 44 void __iomem *base; member 87 #define QSPI_WLEN(n) ((n - 1) << 19) 94 #define QSPI_FLEN(n) ((n - 1) << 0) 129 return readl(qspi->base + reg); in ti_qspi_read() [all …]
|
| H A D | spi-xlp.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2003-2015 Broadcom Corporation 11 #include <linux/spi/spi.h> 14 /* SPI Configuration Register */ 25 /* SPI Frequency Divider Register */ 28 /* SPI Command Register */ 37 /* SPI Status Register */ 47 /* SPI Interrupt Enable Register */ 55 /* SPI FIFO Threshold Register */ 58 /* SPI FIFO Word Count Register */ [all …]
|
| H A D | spi-mtk-nor.c | 1 // SPDX-License-Identifier: GPL-2.0 3 // Mediatek SPI NOR controller driver 10 #include <linux/dma-mapping.h> 19 #include <linux/spi/spi.h> 20 #include <linux/spi/spi-mem.h> 23 #define DRIVER_NAME "mtk-spi-nor" 91 // Reading DMA src/dst addresses have to be 16-byte aligned 93 #define MTK_NOR_DMA_ALIGN_MASK (MTK_NOR_DMA_ALIGN - 1) 97 // Buffered page program can do one 128-byte transfer 100 #define CLK_TO_US(sp, clkcnt) DIV_ROUND_UP(clkcnt, sp->spi_freq / 1000000) [all …]
|
| H A D | spi-intel-platform.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Intel PCH/PCU SPI flash platform driver. 5 * Copyright (C) 2016 - 2022, Intel Corporation 12 #include "spi-intel.h" 17 void __iomem *base; in intel_spi_platform_probe() local 19 info = dev_get_platdata(&pdev->dev); in intel_spi_platform_probe() 21 return -EINVAL; in intel_spi_platform_probe() 23 base = devm_platform_ioremap_resource(pdev, 0); in intel_spi_platform_probe() 24 if (IS_ERR(base)) in intel_spi_platform_probe() 25 return PTR_ERR(base); in intel_spi_platform_probe() [all …]
|
| H A D | spi-rzv2h-rspi.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 21 #include <linux/spi/spi.h> 75 void __iomem *base; member 92 func(buf, rspi->base + RSPI_SPDR); \ 99 type buf = func(rspi->base + RSPI_SPDR); \ 118 tmp = (readl(rspi->base + reg_offs) & ~bit_mask) | value; in RZV2H_RSPI_TX() 119 writel(tmp, rspi->base + reg_offs); in RZV2H_RSPI_TX() 134 writeb(1, rspi->base + RSPI_SPFCR); in rzv2h_rspi_clear_fifos() 139 writew(RSPI_SPSRC_CLEAR, rspi->base + RSPI_SPSRC); in rzv2h_rspi_clear_all_irqs() 140 rspi->status = 0; in rzv2h_rspi_clear_all_irqs() [all …]
|
| H A D | spi-realtek-rtl.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 #include <linux/spi/spi.h> 9 void __iomem *base; member 12 /* SPI Flash Configuration Register */ 17 /* SPI Flash Control and Status Register */ 27 /* SPI Flash Data Register */ 30 #define REG(x) (rtspi->base + x) 33 static void rt_set_cs(struct spi_device *spi, bool active) in rt_set_cs() argument 35 struct rtspi *rtspi = spi_controller_get_devdata(spi->controller); in rt_set_cs() 93 static int transfer_one(struct spi_controller *ctrl, struct spi_device *spi, in transfer_one() argument [all …]
|
| H A D | spi-jcore.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * J-Core SPI controller driver 5 * Copyright (C) 2012-2016 Smart Energy Instruments, Inc. 16 #include <linux/spi/spi.h> 37 void __iomem *base; member 52 } while (--timeout); in jcore_spi_wait() 54 return -EBUSY; in jcore_spi_wait() 59 void __iomem *ctrl_reg = hw->base + CTRL_REG; in jcore_spi_program() 62 dev_err(hw->host->dev.parent, in jcore_spi_program() 65 writel(hw->cs_reg | hw->speed_reg, ctrl_reg); in jcore_spi_program() [all …]
|
| H A D | spi-loongson-core.c | 1 // SPDX-License-Identifier: GPL-2.0+ 2 // Loongson SPI Support 15 #include <linux/spi/spi.h> 17 #include "spi-loongson.h" 19 static inline void loongson_spi_write_reg(struct loongson_spi *spi, unsigned char reg, in loongson_spi_write_reg() argument 22 writeb(data, spi->base + reg); in loongson_spi_write_reg() 25 static inline char loongson_spi_read_reg(struct loongson_spi *spi, unsigned char reg) in loongson_spi_read_reg() argument 27 return readb(spi->base + reg); in loongson_spi_read_reg() 30 static void loongson_spi_set_cs(struct spi_device *spi, bool en) in loongson_spi_set_cs() argument 33 unsigned char mask = (BIT(4) | BIT(0)) << spi_get_chipselect(spi, 0); in loongson_spi_set_cs() [all …]
|
| /linux/sound/hda/codecs/side-codecs/ |
| H A D | cs35l56_hda_spi.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 // CS35L56 HDA audio driver SPI binding 10 #include <linux/spi/spi.h> 14 static int cs35l56_hda_spi_probe(struct spi_device *spi) in cs35l56_hda_spi_probe() argument 16 const struct spi_device_id *id = spi_get_device_id(spi); in cs35l56_hda_spi_probe() 20 cs35l56 = devm_kzalloc(&spi in cs35l56_hda_spi_probe() 53 cs35l56_hda_spi_remove(struct spi_device * spi) cs35l56_hda_spi_remove() argument [all...] |
| /linux/sound/soc/codecs/ |
| H A D | cs35l56-spi.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 // CS35L56 ALSA SoC audio driver SPI binding 12 #include <linux/spi/spi.h> 17 static int cs35l56_spi_probe(struct spi_device *spi) in cs35l56_spi_probe() argument 23 cs35l56 = devm_kzalloc(&spi->de in cs35l56_spi_probe() 56 cs35l56_spi_remove(struct spi_device * spi) cs35l56_spi_remove() argument [all...] |
| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | marvell,odmi-controller.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/interrupt-controller/marvell,odmi-controller.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thomas Petazzoni <thomas.petazzoni@free-electrons.com> 13 Some Marvell SoCs have an On-Die Message Interrupt (ODMI) controller which can 14 be used by on-board peripherals for MSI interrupts. 18 const: marvell,odmi-controller 23 msi-controller: true 25 marvell,odmi-frames: [all …]
|
| /linux/drivers/video/backlight/ |
| H A D | corgi_lcd.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (c) 2004-2006 Richard Purdie 10 * Converted to SPI device based LCD/Backlight device driver 21 #include <linux/spi/spi.h> 22 #include <linux/spi/corgi_lcd.h> 43 #define POWER1_GVSS_ON 0x02 /* GVSS(-8V) Power Supply ON */ 44 #define POWER1_VDD_ON 0x04 /* VDD(8V),SVSS(-4V) Power Supply ON */ 47 #define POWER1_GVSS_OFF 0x00 /* GVSS(-8V) Power Supply OFF */ 48 #define POWER1_VDD_OFF 0x00 /* VDD(8V),SVSS(-4V) Power Supply OFF */ 123 static void lcdtg_i2c_send_start(struct corgi_lcd *lcd, uint8_t base) in lcdtg_i2c_send_start() argument [all …]
|
| /linux/drivers/gpio/ |
| H A D | gpio-spear-spics.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * SPEAr platform SPI chipselect abstraction over gpiolib 21 * Provision is available on some SPEAr SoCs to control ARM PL022 spi cs 22 * through system registers. This register lies outside spi (pl022) 25 * It provides control for spi chip select lines so that any chipselect 31 * struct spear_spics - represents spi chip select control 32 * @base: base address 38 * @use_count: use count of a spi controller cs lines 43 void __iomem *base; member 61 tmp = readl_relaxed(spics->base + spics->perip_cfg); in spics_set_value() [all …]
|
| H A D | gpio-mc33880.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * MC33880 high-side/low-side switch GPIO driver 8 * Freescale MC33880 high-side/low-side switch 13 #include <linux/spi/spi.h> 14 #include <linux/spi/mc33880.h> 40 struct spi_device *spi; member 45 return spi_write(mc->spi, &mc->port_config, sizeof(mc->port_config)); in mc33880_write_config() 52 mc->port_config |= 1 << offset; in __mc33880_set() 54 mc->port_config &= ~(1 << offset); in __mc33880_set() 65 mutex_lock(&mc->lock); in mc33880_set() [all …]
|
| /linux/Documentation/devicetree/bindings/net/ |
| H A D | microchip,lan8650.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Microchip LAN8650/1 10BASE-T1S MACPHY Ethernet Controllers 10 - Parthiban Veerasooran <parthiban.veerasooran@microchip.com> 14 PHY to enable 10BASE‑T1S networks. The Ethernet Media Access Controller 16 with the IEEE 802.3 standard and a 10BASE-T1S physical layer transceiver 18 the MAC-PHY is specified in the OPEN Alliance 10BASE-T1x MACPHY Serial 22 - $ref: /schemas/net/ethernet-controller.yaml# 23 - $ref: /schemas/spi/spi-peripheral-props.yaml# [all …]
|