Searched full:speedbin (Results 1 – 6 of 6) sorted by relevance
| /linux/drivers/cpufreq/ |
| H A D | sun50i-cpufreq-nvmem.c | 31 u32 (*efuse_xlate)(u32 speedbin);
34 static u32 sun50i_h6_efuse_xlate(u32 speedbin) in sun50i_h6_efuse_xlate() argument
38 efuse_value = (speedbin >> NVMEM_SHIFT) & NVMEM_MASK; in sun50i_h6_efuse_xlate()
51 static u32 sun50i_a100_efuse_xlate(u32 speedbin) in sun50i_a100_efuse_xlate() argument
55 efuse_value = (speedbin >> SUN50I_A100_NVMEM_SHIFT) & in sun50i_a100_efuse_xlate()
79 * returned speedbin index is 4 -> 0/2 -> 3 -> 1, from worst to best.
82 static u32 sun50i_h616_efuse_xlate(u32 speedbin) in sun50i_h616_efuse_xlate() argument
87 switch (speedbin & 0xffff) { in sun50i_h616_efuse_xlate()
119 speedbin & 0xffff); in sun50i_h616_efuse_xlate()
198 u32 speedbin = 0; in sun50i_cpufreq_get_efuse() local
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| /linux/Documentation/devicetree/bindings/opp/ |
| H A D | opp-v2-kryo-cpu.yaml | 20 defines the voltage and frequency value based on the speedbin blown in
37 speedbin that is used to select the right frequency/voltage
58 0: MSM8996, speedbin 0
59 1: MSM8996, speedbin 1
60 2: MSM8996, speedbin 2
61 3: MSM8996, speedbin 3
64 Bitmap for MSM8996SG format (speedbin shifted of 4 left):
66 4: MSM8996SG, speedbin 0
67 5: MSM8996SG, speedbin 1
68 6: MSM8996SG, speedbin 2
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| /linux/drivers/nvmem/ |
| H A D | mtk-efuse.c | 54 * On some SoCs, the GPU speedbin is not read as bitmask but as in mtk_efuse_fixup_dt_cell_info()
59 strncmp(cell->name, "gpu-speedbin", min(sz, strlen("gpu-speedbin"))) == 0) in mtk_efuse_fixup_dt_cell_info()
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| /linux/drivers/gpu/drm/msm/adreno/ |
| H A D | adreno_gpu.c | 380 *value |= ((uint64_t) adreno_gpu->speedbin) << 32; in adreno_get_param()
1166 int adreno_read_speedbin(struct device *dev, u32 *speedbin) in adreno_read_speedbin() argument
1168 return nvmem_cell_read_variable_le_u32(dev, "speed_bin", speedbin); in adreno_read_speedbin()
1180 u32 speedbin; in adreno_gpu_init() local
1208 if (adreno_read_speedbin(dev, &speedbin) || !speedbin) in adreno_gpu_init()
1209 speedbin = 0xffff; in adreno_gpu_init()
1210 adreno_gpu->speedbin = (uint16_t) (0xffff & speedbin); in adreno_gpu_init()
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| /linux/Documentation/devicetree/bindings/nvmem/ |
| H A D | mediatek,efuse.yaml | 39 "gpu-speedbin" cell, and thus are not backward compatible to the
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| /linux/arch/arm/boot/dts/qcom/ |
| H A D | qcom-msm8226.dtsi | 135 /* Higher CPU frequencies need speedbin support */
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