/linux/tools/testing/selftests/bpf/prog_tests/ |
H A D | snprintf.c | 14 /* The third specifier, %pB, depends on compiler inlining so don't check it */ 18 /* The third specifier, %p, is a hashed pointer which changes on every reboot */ 110 ASSERT_ERR(load_single_snprintf("%pi5"), "invalid specifier 1"); in test_snprintf_negative() 111 ASSERT_ERR(load_single_snprintf("%a"), "invalid specifier 2"); in test_snprintf_negative() 112 ASSERT_ERR(load_single_snprintf("%"), "invalid specifier 3"); in test_snprintf_negative() 113 ASSERT_ERR(load_single_snprintf("%12345678"), "invalid specifier 4"); in test_snprintf_negative() 114 ASSERT_ERR(load_single_snprintf("%--------"), "invalid specifier 5"); in test_snprintf_negative() 115 ASSERT_ERR(load_single_snprintf("%lc"), "invalid specifier 6"); in test_snprintf_negative() 116 ASSERT_ERR(load_single_snprintf("%llc"), "invalid specifier 7"); in test_snprintf_negative()
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/linux/Documentation/devicetree/bindings/display/imx/ |
H A D | nxp,imx8mq-dcss.yaml | 60 - description: Phandle and clock specifier of IMX8MQ_CLK_DISP_AXI_ROOT 61 - description: Phandle and clock specifier of IMX8MQ_CLK_DISP_RTRM 62 - description: Phandle and clock specifier of either IMX8MQ_VIDEO2_PLL1_REF_SEL or 67 - description: Phandle and clock specifier of IMX8MQ_SYS1_PLL_800M 68 - description: Phandle and clock specifier of IMX8MQ_SYS1_PLL_800M 69 - description: Phandle and clock specifier of IMX8MQ_CLK_27M
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/linux/Documentation/devicetree/bindings/pwm/ |
H A D | pwm.txt | 11 single-pwm ::= <pwm-phandle> <pwm-specifier> 13 pwm-specifier : array of #pwm-cells specifying the given PWM 43 pwm-specifier typically encodes the chip-relative PWM number and the PWM 46 Optionally, the pwm-specifier can encode a number of flags (defined in 50 Example with optional PWM specifier for inverse polarity
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/linux/Documentation/devicetree/bindings/net/ |
H A D | sff,sfp.yaml | 35 GPIO phandle and a specifier of the MOD-DEF0 (AKA Mod_ABS) module 42 GPIO phandle and a specifier of the Receiver Loss of Signal Indication 48 GPIO phandle and a specifier of the Module Transmitter Fault input gpio 54 GPIO phandle and a specifier of the Transmitter Disable output gpio 60 GPIO phandle and a specifier of the Rx Signaling Rate Select (AKA RS0) 67 GPIO phandle and a specifier of the Tx Signaling Rate Select (AKA RS1)
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/linux/Documentation/devicetree/bindings/powerpc/fsl/ |
H A D | srio-rmu.txt | 61 specifier. The format of the specifier is defined by the 91 specifier. The format of the specifier is defined by the 121 specifier. The format of the specifier is defined by the
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/linux/Documentation/devicetree/bindings/powerpc/4xx/ |
H A D | cpm.txt | 16 - unused-units : specifier consist of one cell. For each 20 - idle-doze : specifier consist of one cell. For each 24 - standby : specifier consist of one cell. For each 28 - suspend : specifier consist of one cell. For each
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/linux/Documentation/devicetree/bindings/mux/ |
H A D | mux-consumer.yaml | 17 single-mux-ctrl ::= <mux-ctrl-phandle> [mux-ctrl-specifier] 19 mux-ctrl-specifier : array of #mux-control-cells specifying the 39 mux-ctrl-specifier typically encodes the chip-relative mux controller number. 41 mux-ctrl-specifier can typically be left out.
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/linux/Documentation/devicetree/bindings/arm/ux500/ |
H A D | power_domain.txt | 13 - #power-domain-cells : Number of cells in a power domain specifier, must be 1. 24 - power-domains: A phandle and PM domain specifier. Below are the list of 27 Index Specifier
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/linux/Documentation/devicetree/bindings/media/ |
H A D | hix5hd2-ir.txt | 8 - interrupts: interrupt-specifier for the sole interrupt generated by 9 the device. The interrupt specifier format depends on the interrupt 11 - clocks: clock phandle and specifier pair.
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H A D | st-rc.txt | 7 - interrupts: interrupt-specifier for the sole interrupt generated by 8 the device. The interrupt specifier format depends on the interrupt 20 - clocks : phandle with clock-specifier pair for IRB.
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/linux/Documentation/devicetree/bindings/reset/ |
H A D | reset.txt | 15 specifier - a list of DT cells that represents the reset signal within the 16 provider. The length (number of cells) and semantics of the reset specifier 35 #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes 48 resets: List of phandle and reset specifier pairs, one pair
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/linux/Documentation/devicetree/bindings/display/panel/ |
H A D | panel-common.yaml | 103 Specifier for a GPIO connected to the panel enable control signal. The 108 the GPIO specifier polarity flag. 116 Specifier for a GPIO connected to the panel reset control signal. 119 GPIO specifier polarity flag. 126 supported by inverting the GPIO specifier polarity flag.
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/linux/Documentation/devicetree/bindings/power/reset/ |
H A D | ltc2952-poweroff.txt | 10 - watchdog-gpios: phandle + gpio-specifier for the GPIO connected to the 12 - kill-gpios: phandle + gpio-specifier for the GPIO connected to the 16 - trigger-gpios: phandle + gpio-specifier for the GPIO connected to the
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/linux/Documentation/devicetree/bindings/interrupt-controller/ |
H A D | msi-controller.yaml | 20 The number of cells in an msi-specifier, required if not zero. 26 The meaning of the msi-specifier is defined by the device tree 39 interrupt specifier and "span" is the size of the
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/linux/Documentation/devicetree/bindings/usb/ |
H A D | hisilicon,histb-xhci.txt | 9 - clocks: a list of phandle + clock-specifier pairs, one for each 16 - resets: a list of phandle and reset specifier pairs as listed in 20 - phys: a list of phandle + phy specifier pairs
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/linux/Documentation/devicetree/bindings/iommu/ |
H A D | iommu.txt | 40 - #iommu-cells: The number of cells in an IOMMU specifier needed to encode an 43 The meaning of the IOMMU specifier is defined by the device tree binding of 47 therefore no additional information needs to be encoded in the specifier. 64 IOMMU binding for the exact meaning of the cells that make up the specifier. 75 - iommus: A list of phandle and IOMMU specifier pairs that describe the IOMMU 172 /* the specifier represents the ID of the master */
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/linux/Documentation/devicetree/bindings/gpio/ |
H A D | gpio.txt | 42 The exact meaning of each specifier cell is controller specific, and must be 56 GPIO_ACTIVE_HIGH is 0, so in this example gpio-specifier is "18 0" and encodes 83 1.1) GPIO specifier best practices 86 A gpio-specifier should contain a flag indicating the GPIO polarity; active- 90 The gpio-specifier's polarity flag should represent the physical level at the 94 the GPIO controller and the device, then the gpio-specifier will represent the 112 In particular, the polarity cannot be derived from the gpio-specifier, since 120 in the binding. The gpio-specifier should represent the polarity of the signal 132 cells in a gpio-specifier.
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/linux/Documentation/devicetree/bindings/pci/ |
H A D | pci-msi.txt | 33 msi-specifier data. The property is an arbitrary number of tuples of 40 * msi-base is an msi-specifier describing the msi-specifier produced for the 47 the listed msi-controller, with the msi-specifier (r - rid-base + msi-base). 50 to an msi-specifier per the msi-map property.
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H A D | hisilicon-histb-pcie.txt | 21 - clocks: List of phandle and clock specifier pairs as listed in clock-names 28 - resets: List of phandle and reset specifier pairs as listed in reset-names 38 - phys: List of phandle and phy mode specifier, should be 0.
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/linux/Documentation/devicetree/bindings/hwlock/ |
H A D | hwlock.txt | 26 associated hwlock args specifier as indicated by 29 a phandle and a corresponding args specifier. 40 the node hwlock1. hwlock1 is a hwlock provider with an argument specifier
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/linux/Documentation/devicetree/bindings/phy/ |
H A D | phy-bindings.txt | 8 #phy-cells: Number of cells in a PHY specifier; The meaning of all those 30 In order to differentiate between these 2 PHYs, an additional specifier should be 71 device defined previously. Note that the phy handle has an additional specifier
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H A D | phy-hisi-inno-usb2.txt | 9 - clocks: The phandle and clock specifier pair for INNO USB2 PHY device 11 - resets: The phandle and reset specifier pair for INNO USB2 PHY device reset 23 - resets: The phandle and reset specifier pair for PHY port reset signal.
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/linux/Documentation/devicetree/bindings/dma/ |
H A D | adi,axi-dmac.txt | 7 - clocks: Phandle and specifier to the controllers AXI interface clock 37 described in the dma.txt file using a one-cell specifier. The value of the 38 specifier refers to the DMA channel index.
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/linux/Documentation/devicetree/bindings/interconnect/ |
H A D | interconnect.txt | 21 - #interconnect-cells : number of cells in a interconnect specifier needed to 46 interconnects : Pairs of phandles and interconnect provider specifier to denote 57 specifier pairs.
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/linux/Documentation/devicetree/bindings/hsi/ |
H A D | omap-ssi.txt | 11 - reg: Contains a matching register specifier for each entry 22 - clocks: Contains a matching clock specifier for each entry in 34 - reg: Contains a matching register specifier for each entry
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