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Searched +full:spdif +full:- +full:asrc +full:- +full:audio (Results 1 – 10 of 10) sorted by relevance

/linux/sound/soc/fsl/
H A Dfsl-asoc-card.c1 // SPDX-License-Identifier: GPL-2.0
3 // Freescale Generic ASoC Sound Card driver with ASRC
23 #include "imx-audmux.h"
33 #define DRIVER_NAME "fsl-asoc-card"
44 * struct codec_priv - CODEC private data
62 * struct cpu_priv - CPU private data
82 * struct fsl_asoc_card_priv - Freescale Generic ASOC card private data
93 * @asrc_rate: ASRC sample rate used by Back-Ends
94 * @asrc_format: ASRC sample format used by Back-Ends
120 * Note: keep all ASRC routes in the second half
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 comment "Common SoC Audio options for Freescale CPUs:"
7 tristate "Asynchronous Sample Rate Converter (ASRC) module support"
15 Say Y if you want to add Asynchronous Sample Rate Converter (ASRC)
17 This option is only useful for out-of-tree drivers since
18 in-tree drivers select it automatically.
21 tristate "Synchronous Audio Interface (SAI) module support"
27 Say Y if you want to add Synchronous Audio Interface (SAI)
29 This option is only useful for out-of-tree drivers since
30 in-tree drivers select it automatically.
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/linux/sound/soc/tegra/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
5 tristate "SoC Audio for the Tegra System-on-Chip"
12 Say Y or M here if you want support for SoC audio on Tegra.
41 tristate "Tegra20 SPDIF interface"
43 Say Y or M if you want to add support for the Tegra20 SPDIF interface.
65 Config to enable Audio Hub (AHUB) module, which comprises of a
66 switch called Audio Crossbar (AXBAR) used to configure or modify
67 the audio routing path between various HW accelerators present in
85 Config to enable the Inter-IC Sound (I2S) Controller which
86 implements full-duplex and bidirectional and single direction
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6sx-sabreauto.dts1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
11 compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx";
19 compatible = "gpio-leds";
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_led>;
23 led-user {
26 linux,default-trigger = "heartbeat";
30 vcc_sd3: regulator-vcc-sd3 {
31 compatible = "regulator-fixed";
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8-ss-audio.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-clock.h>
8 #include <dt-bindings/clock/imx8-lpcg.h>
9 #include <dt-bindings/dma/fsl-edma.h>
10 #include <dt-bindings/firmware/imx/rsrc.h>
12 audio_ipg_clk: clock-audio-ipg {
13 compatible = "fixed-clock";
14 #clock-cells = <0>;
15 clock-frequency = <120000000>;
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H A Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mn-pinfunc.h"
17 interrupt-parent = <&gic>;
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/linux/drivers/clk/sunxi-ng/
H A Dccu-sun55i-a523-mcu.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2025 Chen-Yu Tsai <wens@csie.org>
6 * Copyright (C) 2023-2024 Arm Ltd.
9 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/sun55i-a523-mcu-ccu.h>
15 #include <dt-bindings/reset/sun55i-a523-mcu-ccu.h>
31 { .fw_name = "r-ahb" }
35 { .fw_name = "r-apb0" }
40 { .rate = 2167603200, .pattern = 0xa000a234, .m = 1, .n = 90 }, /* div2->22.5792 */
41 { .rate = 2359296000, .pattern = 0xa0009ba6, .m = 1, .n = 98 }, /* div2->24.576 */
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H A Dccu-sun20i-d1.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
26 #include "ccu-sun20i-d1.h"
43 .hw.init = CLK_HW_INIT_PARENTS_DATA("pll-cpux", osc24M,
59 .hw.init = CLK_HW_INIT_PARENTS_DATA("pll-ddr0", osc24M,
73 .hw.init = CLK_HW_INIT_PARENTS_DATA("pll-periph0-4x", osc24M,
82 static SUNXI_CCU_M_HWS(pll_periph0_2x_clk, "pll-periph0-2x",
84 static SUNXI_CCU_M_HWS(pll_periph0_800M_clk, "pll-periph0-800M",
90 static CLK_FIXED_FACTOR_HWS(pll_periph0_clk, "pll-periph0",
94 static CLK_FIXED_FACTOR_HWS(pll_periph0_div3_clk, "pll-periph0-div3",
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/linux/sound/soc/codecs/
H A Dwm8998.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * wm8998.c -- ALSA SoC Audio driver for WM8998 codecs
41 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in wm8998_asrc_ev()
57 dev_warn(component->dev, in wm8998_asrc_ev()
58 "Unsupported ASRC rate1 (%s)\n", in wm8998_asrc_ev()
60 return -EINVAL; in wm8998_asrc_ev()
64 dev_err(component->dev, in wm8998_asrc_ev()
65 "Illegal ASRC rate1 selector (0x%x)\n", in wm8998_asrc_ev()
67 return -EINVAL; in wm8998_asrc_ev()
77 val -= 0x8; in wm8998_asrc_ev()
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/linux/drivers/clk/imx/
H A Dclk-imx6q.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011-2013 Freescale Semiconductor, Inc.
12 #include <linux/clk-provider.h>
15 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
20 #include <dt-bindings/clock/imx6qdl-clock.h>
75 "uart_serial", "spdif", "asrc", "hsi_tx",
154 return -ENOENT; in ldb_di_sel_by_clock_id()
165 return -ENOENT; in ldb_di_sel_by_clock_id()
177 num_parents = of_count_phandle_with_args(node, "assigned-clock-parents", in of_assigned_ldb_sels()
178 "#clock-cells"); in of_assigned_ldb_sels()
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