| /linux/drivers/clk/microchip/ |
| H A D | clk-core.c | 965 struct pic32_sec_osc *sosc = clkhw_to_sosc(hw); in sosc_clk_enable() local
968 /* enable SOSC */ in sosc_clk_enable()
970 writel(sosc->enable_mask, PIC32_SET(sosc->enable_reg)); in sosc_clk_enable()
973 return readl_poll_timeout_atomic(sosc->status_reg, v, in sosc_clk_enable()
974 v & sosc->status_mask, 1, 100); in sosc_clk_enable()
979 struct pic32_sec_osc *sosc = clkhw_to_sosc(hw); in sosc_clk_disable() local
982 writel(sosc->enable_mask, PIC32_CLR(sosc->enable_reg)); in sosc_clk_disable()
987 struct pic32_sec_osc *sosc = clkhw_to_sosc(hw); in sosc_clk_is_enabled() local
991 enabled = readl(sosc->enable_reg) & sosc->enable_mask; in sosc_clk_is_enabled()
992 ready = readl(sosc->status_reg) & sosc->status_mask; in sosc_clk_is_enabled()
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| H A D | clk-pic32mzda.c | 187 if (of_property_read_bool(np, "microchip,pic32mzda-sosc")) { in pic32mzda_clk_probe()
188 pr_info("pic32-clk: dt requests SOSC.\n"); in pic32mzda_clk_probe()
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| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | imx7ulp-scg-clock.yaml | 61 - const: sosc
83 clocks = <&rosc>, <&sosc>, <&sirc>,
85 clock-names = "rosc", "sosc", "sirc",
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| H A D | microchip,pic32.txt | 15 - microchip,pic32mzda-sosc: shall be added only if platform has
24 microchip,pic32mzda-sosc;
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| /linux/drivers/clk/imx/ |
| H A D | clk-imx8ulp.c | 17 static const char * const pll_pre_sels[] = { "sosc", "frosc", };
18 static const char * const a35_sels[] = { "frosc", "spll2", "sosc", "lvds", };
19 static const char * const nic_sels[] = { "frosc", "spll3_pfd0", "sosc", "lvds", };
37 static const char * const hifi_sels[] = { "frosc", "pll4", "pll4_pfd0", "sosc",
39 static const char * const ddr_sels[] = { "frosc", "pll4_pfd1", "sosc", "lvds",
41 static const char * const lpav_sels[] = { "frosc", "pll4_pfd1", "sosc", "lvds", };
42 static const char * const sai45_sels[] = { "spll3_pfd1_div1", "aud_clk1", "aud_clk2", "sosc", };
43 …"spll1_pfd2_div", "spll3_pfd1_div1", "aud_clk0", "aud_clk1", "aud_clk2", "sosc", "dummy", "dummy",…
46 …enet_ts_sels[] = { "ext_rmii_clk", "ext_ts_clk", "rosc", "ext_aud_mclk", "sosc", "dummy", "dummy",…
206 clks[IMX8ULP_CLK_SOSC_DIV1_GATE] = imx_clk_hw_gate_dis("sosc_div1_gate", "sosc", base + 0x108, 7); in imx8ulp_clk_cgc1_init()
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| H A D | clk-imx7ulp.c | 22 static const char * const pll_pre_sels[] = { "sosc", "firc", };
27 static const char * const scs_sels[] = { "dummy", "sosc", "sirc", "firc", "dummy", "apll_sel", "sp…
34 /* used by sosc/sirc/firc/ddr/spll/apll dividers */
63 hws[IMX7ULP_CLK_SOSC] = imx_get_clk_hw_by_name(np, "sosc"); in imx7ulp_clk_scg1_init()
124 …hws[IMX7ULP_CLK_SOSC_BUS_CLK] = imx_clk_hw_divider_gate("sosc_bus_clk", "sosc", 0, base + 0x104, 8… in imx7ulp_clk_scg1_init()
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| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx7ulp.dtsi | 62 sosc: clock-sosc { label
65 clock-output-names = "sosc";
250 clocks = <&rosc>, <&sosc>, <&sirc>,
252 clock-names = "rosc", "sosc", "sirc",
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8ulp.dtsi | 148 sosc: clock-sosc { label
151 clock-output-names = "sosc";
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| /linux/arch/mips/boot/dts/pic32/ |
| H A D | pic32mzda.dtsi | 67 microchip,pic32mzda-sosc;
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| /linux/drivers/media/i2c/ |
| H A D | saa6588.c | 129 /* bit 5 (SOSC) */
|