| /linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx6q.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6q-pinfunc.h" 16 #address-cells = <1>; 17 #size-cells = <0>; 20 compatible = "arm,cortex-a9"; 23 next-level-cache = <&L2>; 24 operating-points = < 32 fsl,soc-operating-points = < 33 /* ARM kHz SOC-PU uV */ [all …]
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| H A D | imx6dl-b1x5pv2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 6 // Copyright 2018-2021 General Electric Company 7 // Copyright 2018-2021 Collabora 9 #include <dt-bindings/input/input.h> 10 #include "imx6dl-qmx6.dtsi" 14 stdout-path = &uart3; 20 operating-points = < 25 fsl,soc-operating-points = < 26 /* ARM kHz SOC-PU uV */ 33 operating-points = < [all …]
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| H A D | imx6dl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 #include <dt-bindings/interrupt-controller/irq.h> 6 #include "imx6dl-pinfunc.h" 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a9"; 22 next-level-cache = <&L2>; 23 operating-points = < 29 fsl,soc-operating-points = < 30 /* ARM kHz SOC-PU uV */ [all …]
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| /linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | atmel,sama5d2-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/atmel,sama5d2-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Eugen Hristev <eugen.hristev@microchip.com> 15 - atmel,sama5d2-adc 16 - microchip,sam9x60-adc 17 - microchip,sama7g5-adc 28 clock-names: 31 vref-supply: true [all …]
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| H A D | nxp,lpc1850-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/nxp,lpc1850-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jonathan Cameron <jic23@kernel.org> 13 Supports the ADC found on the LPC1850 SoC. 17 const: nxp,lpc1850-adc 28 vref-supply: true 33 "#io-channel-cells": 37 - compatible [all …]
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| H A D | fsl,imx7d-adc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/adc/fsl,imx7d-adc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Freescale ADC found on the imx7d SoC 10 - Haibo Chen <haibo.chen@nxp.com> 14 const: fsl,imx7d-adc 25 clock-names: 28 vref-supply: true 30 "#io-channel-cells": [all …]
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| /linux/Documentation/devicetree/bindings/power/ |
| H A D | rockchip-io-domain.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/rockchip-io-domain.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Heiko Stuebner <heiko@sntech.de> 14 kept in sync between the regulators and the SoC using a special 28 any logic for deciding whether regulators (or internal SoC blocks) 34 this driver would handle telling the SoC about it. A good example is 38 SoC is on the same page. 42 to report their voltage. The IO Voltage Domain for any non-specified [all …]
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| /linux/arch/arm64/boot/dts/amlogic/ |
| H A D | meson-a1-ad402.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 /dts-v1/; 9 #include "meson-a1.dtsi" 10 #include <dt-bindings/thermal/thermal.h> 21 stdout-path = "serial0:115200n8"; 29 reserved-memory { 33 no-map; 39 compatible = "linaro,optee-tz"; 44 battery_4v2: regulator-battery-4v2 { 45 compatible = "regulator-fixed"; [all …]
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| /linux/drivers/pci/controller/ |
| H A D | pci-tegra.c | 1 // SPDX-License-Identifier: GPL-2.0+ 9 * Copyright (c) 2008-2009, NVIDIA Corporation. 11 * Bits taken from arch/arm/mach-dove/pcie.c 26 #include <linux/irqchip/irq-msi-lib.h> 45 #include <soc/tegra/cpuidle.h> 46 #include <soc/tegra/pmc.h> 258 * Fields in PADS_REFCLK_CFG*. Those registers form an array of 16-bit 280 /* used to differentiate between Tegra SoC generations */ 354 const struct tegra_pcie_soc *soc; member 380 writel(value, pcie->afi + offset); in afi_writel() [all …]
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| /linux/Documentation/devicetree/bindings/power/supply/ |
| H A D | dlg,da9150-fuel-gauge.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/supply/dlg,da9150-fuel-gauge.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Dialog Semiconductor DA9150 Fuel-Gauge Power Supply 10 - Sebastian Reichel <sre@kernel.org> 13 - $ref: power-supply.yaml# 17 const: dlg,da9150-fuel-gauge 19 dlg,update-interval: 23 dlg,warn-soc-level: [all …]
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| H A D | maxim,max17040.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/power/supply/maxim,max17040.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Sebastian Reichel <sre@kernel.org> 13 - $ref: power-supply.yaml# 18 - maxim,max17040 19 - maxim,max17041 20 - maxim,max17043 21 - maxim,max17044 [all …]
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| /linux/Documentation/devicetree/bindings/net/dsa/ |
| H A D | mediatek,mt7530.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Arınç ÜNAL <arinc.unal@arinc9.com> 11 - Landen Chao <Landen.Chao@mediatek.com> 12 - DENG Qingfang <dqfext@gmail.com> 13 - Sean Wang <sean.wang@mediatek.com> 14 - Daniel Golle <daniel@makrotopia.org> 17 There are three versions of MT7530, standalone, in a multi-chip module and 18 built-into a SoC. [all …]
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| /linux/arch/arm64/boot/dts/qcom/ |
| H A D | sc7280-qcard.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 14 #include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h> 15 #include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h> 16 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 17 #include <dt-bindings/regulator/qcom,rpmh-regulator.h> 21 /* PMICs depend on spmi_bus label and so must come after SoC */ 34 wcd9385: audio-codec-1 { 35 compatible = "qcom,wcd9385-codec"; 36 pinctrl-names = "default", "sleep"; 37 pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>; [all …]
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| H A D | msm8956-sony-xperia-loire.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 3 * Copyright (c) 2016-2022, AngeloGioacchino Del Regno 16 qcom,msm-id = <266 0x10001>; /* MSM8956 v1.1 */ 17 qcom,board-id = <8 0>; 27 stdout-path = "serial0:115200n8"; 30 reserved-memory { 31 cont-splash@83000000 { 38 record-size = <0x20000>; 39 console-size = <0x40000>; 40 ftrace-size = <0x20000>; [all …]
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| /linux/Documentation/devicetree/bindings/phy/ |
| H A D | nvidia,tegra186-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 signals) which connect directly to pins/pads on the SoC package. Each lane 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller [all …]
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| H A D | nvidia,tegra194-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra194-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 signals) which connect directly to pins/pads on the SoC package. Each lane 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller [all …]
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| H A D | nvidia,tegra210-xusb-padctl.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/phy/nvidia,tegra210-xusb-padctl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 15 signals) which connect directly to pins/pads on the SoC package. Each lane 21 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or 22 super-speed USB. Other lanes are for various types of low-speed, full-speed 23 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller [all …]
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | nvidia,tegra20-pcie.txt | 4 - compatible: Must be: 5 - "nvidia,tegra20-pcie": for Tegra20 6 - "nvidia,tegra30-pcie": for Tegra30 7 - "nvidia,tegra124-pcie": for Tegra124 and Tegra132 8 - "nvidia,tegra210-pcie": for Tegra210 9 - "nvidia,tegra186-pcie": for Tegra186 10 - power-domains: To ungate power partition by BPMP powergate driver. Must 13 - device_type: Must be "pci" 14 - reg: A list of physical base address and length for each set of controller 15 registers. Must contain an entry for each entry in the reg-names property. [all …]
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| H A D | samsung,exynos-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pci/samsung,exynos-pcie.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung SoC series PCIe Host Controller 10 - Marek Szyprowski <m.szyprowski@samsung.com> 11 - Jaehoon Chung <jh80.chung@samsung.com> 14 Exynos5433 SoC PCIe host controller is based on the Synopsys DesignWare 16 snps,dw-pcie.yaml. 19 - $ref: /schemas/pci/snps,dw-pcie.yaml# [all …]
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| /linux/Documentation/devicetree/bindings/iio/dac/ |
| H A D | nxp,lpc1850-dac.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/iio/dac/nxp,lpc1850-dac.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jonathan Cameron <jic23@kernel.org> 13 Supports the DAC found on the LPC1850 SoC. 17 const: nxp,lpc1850-dac 28 vref-supply: true 34 - compatible 35 - reg [all …]
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| /linux/Documentation/devicetree/bindings/mmc/ |
| H A D | ti-omap-hsmmc.txt | 10 -------------------- 11 - compatible: 12 Should be "ti,omap2-hsmmc", for OMAP2 controllers 13 Should be "ti,omap3-hsmmc", for OMAP3 controllers 14 Should be "ti,omap3-pre-es3-hsmmc" for OMAP3 controllers pre ES3.0 15 Should be "ti,omap4-hsmmc", for OMAP4 controllers 16 Should be "ti,am33xx-hsmmc", for AM335x controllers 17 Should be "ti,k2g-hsmmc", "ti,omap4-hsmmc" for 66AK2G controllers. 19 SoC specific required properties: 20 --------------------------------- [all …]
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| /linux/Documentation/devicetree/bindings/interconnect/ |
| H A D | samsung,exynos-bus.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/interconnect/samsung,exynos-bus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos SoC Bus and Interconnect 10 - Chanwoo Choi <cw00.choi@samsung.com> 11 - Krzysztof Kozlowski <krzk@kernel.org> 14 The Samsung Exynos SoC has many buses for data transfer between DRAM and 15 sub-blocks in SoC. Most Exynos SoCs share the common architecture for buses. 16 Generally, each bus of Exynos SoC includes a source clock and a power line, [all …]
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| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | rk3588-jaguar-pre-ict-tester.dtso | 1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 5 * Device Tree Overlay for the Pre-ICT tester adapter for the Mezzanine 8 * This adapter has a PCIe Gen2 x1 M.2 M-Key connector and two proprietary 10 * as 2-lane CSI). 19 /dts-v1/; 22 #include <dt-bindings/gpio/gpio.h> 23 #include <dt-bindings/pinctrl/rockchip.h> 26 pre_ict_tester_vcc_1v2: regulator-pre-ict-tester-vcc-1v2 { 27 compatible = "regulator-fixed"; 28 regulator-name = "pre_ict_tester_vcc_1v2"; [all …]
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| /linux/Documentation/devicetree/bindings/thermal/ |
| H A D | samsung,exynos-thermal.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/thermal/samsung,exynos-thermal.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung Exynos SoC Thermal Management Unit (TMU) 10 - Krzysztof Kozlowski <krzk@kernel.org> 13 For multi-instance tmu each instance should have an alias correctly numbered 19 - samsung,exynos3250-tmu 20 - samsung,exynos4412-tmu 21 - samsung,exynos4210-tmu [all …]
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| /linux/Documentation/devicetree/bindings/display/rockchip/ |
| H A D | rockchip,dw-hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,dw-hdmi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Mark Yao <markyao0591@gmail.com> 17 - $ref: ../bridge/synopsys,dw-hdmi.yaml# 18 - $ref: /schemas/sound/dai-common.yaml# 23 - rockchip,rk3228-dw-hdmi 24 - rockchip,rk3288-dw-hdmi 25 - rockchip,rk3328-dw-hdmi [all …]
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