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/linux/tools/perf/pmu-events/arch/x86/elkhartlake/
H A D	cache.json	169 …unts the number of load uops retired that hit in the L3 cache, in which a snoop was required and m… 175 …unts the number of load uops retired that hit in the L3 cache, in which a snoop was required and m… 323 …ounts all code reads that were supplied by the L3 cache where a snoop was sent, the snoop hit, and… 329 …ounts all code reads that were supplied by the L3 cache where a snoop was sent, the snoop hit, and… 334 …ounts all code reads that were supplied by the L3 cache where a snoop was sent, the snoop hit, but… 340 …ounts all code reads that were supplied by the L3 cache where a snoop was sent, the snoop hit, but… 345 …ounts all code reads that were supplied by the L3 cache where a snoop was sent, the snoop hit, and… 351 …ounts all code reads that were supplied by the L3 cache where a snoop was sent, the snoop hit, and… 356 …nts all code reads that were supplied by the L3 cache where a snoop was sent but the snoop missed.… 362 …nts all code reads that were supplied by the L3 cache where a snoop was sent but the snoop missed.… [all …]
/linux/tools/perf/pmu-events/arch/x86/snowridgex/
H A D	cache.json	169 …unts the number of load uops retired that hit in the L3 cache, in which a snoop was required and m… 175 …unts the number of load uops retired that hit in the L3 cache, in which a snoop was required and m… 323 …ounts all code reads that were supplied by the L3 cache where a snoop was sent, the snoop hit, and… 329 …ounts all code reads that were supplied by the L3 cache where a snoop was sent, the snoop hit, and… 334 …ounts all code reads that were supplied by the L3 cache where a snoop was sent, the snoop hit, but… 340 …ounts all code reads that were supplied by the L3 cache where a snoop was sent, the snoop hit, but… 345 …ounts all code reads that were supplied by the L3 cache where a snoop was sent, the snoop hit, and… 351 …ounts all code reads that were supplied by the L3 cache where a snoop was sent, the snoop hit, and… 356 …nts all code reads that were supplied by the L3 cache where a snoop was sent but the snoop missed.… 362 …nts all code reads that were supplied by the L3 cache where a snoop was sent but the snoop missed.… [all …]
/linux/tools/perf/pmu-events/arch/x86/alderlaken/
H A D	cache.json	125 "BriefDescription": "Counts the number of load uops retired that hit in the L3 cache, in which a snoop was required and modified data was forwarded from another core or module.", 179 "BriefDescription": "Counts the number of load uops retired that hit in the L3 cache, in which a snoop was required, and non-modified data was forwarded.", 474 "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by the L3 cache where a snoop was sent, the snoop hit, and modified data was forwarded.", 480 "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by the L3 cache where a snoop was sent, the snoop hit, and modified data was forwarded. Available PDIST counters: 0", 485 "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by the L3 cache where a snoop was sent, the snoop hit, but no data was forwarded.", 491 "PublicDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by the L3 cache where a snoop was sent, the snoop hi [all...]
/linux/tools/perf/pmu-events/arch/x86/goldmont/
H A D	cache.json	239 …on": "Counts data reads (demand & prefetch) that miss the L2 cache with a snoop hit in the other p… 245 …on": "Counts data reads (demand & prefetch) that miss the L2 cache with a snoop hit in the other p… 250 …on": "Counts data reads (demand & prefetch) that miss the L2 cache with a snoop hit in the other p… 256 …on": "Counts data reads (demand & prefetch) that miss the L2 cache with a snoop hit in the other p… 261 …nts data reads (demand & prefetch) that true miss for the L2 cache with a snoop miss in the other … 267 …nts data reads (demand & prefetch) that true miss for the L2 cache with a snoop miss in the other … 294 …ata reads generated by L1 or L2 prefetchers that miss the L2 cache with a snoop hit in the other p… 300 …ata reads generated by L1 or L2 prefetchers that miss the L2 cache with a snoop hit in the other p… 305 …ata reads generated by L1 or L2 prefetchers that miss the L2 cache with a snoop hit in the other p… 311 …ata reads generated by L1 or L2 prefetchers that miss the L2 cache with a snoop hit in the other p… [all …]
/linux/tools/perf/pmu-events/arch/x86/westmereep-sp/
H A D	other.json	83 "BriefDescription": "Snoop code requests", 91 "BriefDescription": "Snoop data requests", 99 "BriefDescription": "Snoop invalidate requests", 107 "BriefDescription": "Outstanding snoop code requests", 115 "BriefDescription": "Cycles snoop code requests queued", 124 "BriefDescription": "Outstanding snoop data requests", 132 "BriefDescription": "Cycles snoop data requests queued", 141 "BriefDescription": "Outstanding snoop invalidate requests", 149 "BriefDescription": "Cycles snoop invalidate requests queued", 158 "BriefDescription": "Thread responded HIT to snoop", [all …]
/linux/tools/perf/pmu-events/arch/x86/westmereep-dp/
H A D	other.json	83 "BriefDescription": "Snoop code requests", 91 "BriefDescription": "Snoop data requests", 99 "BriefDescription": "Snoop invalidate requests", 107 "BriefDescription": "Outstanding snoop code requests", 115 "BriefDescription": "Cycles snoop code requests queued", 124 "BriefDescription": "Outstanding snoop data requests", 132 "BriefDescription": "Cycles snoop data requests queued", 141 "BriefDescription": "Outstanding snoop invalidate requests", 149 "BriefDescription": "Cycles snoop invalidate requests queued", 158 "BriefDescription": "Thread responded HIT to snoop", [all …]
/linux/tools/perf/pmu-events/arch/x86/westmereex/
H A D	other.json	83 "BriefDescription": "Snoop code requests", 91 "BriefDescription": "Snoop data requests", 99 "BriefDescription": "Snoop invalidate requests", 107 "BriefDescription": "Outstanding snoop code requests", 115 "BriefDescription": "Cycles snoop code requests queued", 124 "BriefDescription": "Outstanding snoop data requests", 132 "BriefDescription": "Cycles snoop data requests queued", 141 "BriefDescription": "Outstanding snoop invalidate requests", 149 "BriefDescription": "Cycles snoop invalidate requests queued", 158 "BriefDescription": "Thread responded HIT to snoop", [all …]
/linux/tools/perf/pmu-events/arch/x86/knightslanding/
H A D	cache.json	135 …e reads and prefetch code read requests that accounts for responses from snoop request hit with d… 145 …reads and prefetch code read requests that accounts for responses from a snoop request hit with d… 155 …reads and prefetch code read requests that accounts for responses from a snoop request hit with d… 165 …e reads and prefetch code read requests that accounts for responses from snoop request hit with d… 175 …reads and prefetch code read requests that accounts for responses from a snoop request hit with d… 185 …reads and prefetch code read requests that accounts for responses from a snoop request hit with d… 255 …data and L1 prefetch data read requests that accounts for responses from snoop request hit with d… 265 …ta and L1 prefetch data read requests that accounts for responses from a snoop request hit with d… 275 …ta and L1 prefetch data read requests that accounts for responses from a snoop request hit with d… 285 …data and L1 prefetch data read requests that accounts for responses from snoop request hit with d… [all …]
/linux/tools/perf/pmu-events/arch/x86/ivybridge/
H A D	uncore-cache.json	39 …"BriefDescription": "L3 Lookup external snoop request that access cache and found line in E or S-s… 48 …"BriefDescription": "L3 Lookup external snoop request that access cache and found line in I-state.… 57 …"BriefDescription": "L3 Lookup external snoop request that access cache and found line in M-state.… 66 …"BriefDescription": "L3 Lookup external snoop request that access cache and found line in MESI-sta… 147 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in so… 156 "BriefDescription": "An external snoop hits a modified line in some processor core.", 165 …"BriefDescription": "A cross-core snoop initiated by this Cbox due to processor core memory reques… 174 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line i… 183 "BriefDescription": "An external snoop hits a non-modified line in some processor core.", 192 …"BriefDescription": "A cross-core snoop initiated by this Cbox due to processor core memory reques… [all …]
/linux/tools/perf/pmu-events/arch/x86/sandybridge/
H A D	uncore-cache.json	39 …"BriefDescription": "L3 Lookup external snoop request that access cache and found line in E or S-s… 48 …"BriefDescription": "L3 Lookup external snoop request that access cache and found line in I-state.… 57 …"BriefDescription": "L3 Lookup external snoop request that access cache and found line in M-state.… 66 …"BriefDescription": "L3 Lookup external snoop request that access cache and found line in MESI-sta… 147 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in so… 156 "BriefDescription": "An external snoop hits a modified line in some processor core.", 165 …"BriefDescription": "A cross-core snoop initiated by this Cbox due to processor core memory reques… 174 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line i… 183 "BriefDescription": "An external snoop hits a non-modified line in some processor core.", 192 …"BriefDescription": "A cross-core snoop initiated by this Cbox due to processor core memory reques… [all …]
/linux/tools/perf/pmu-events/arch/x86/haswell/
H A D	uncore-cache.json	39 …"BriefDescription": "L3 Lookup external snoop request that access cache and found line in E or S-s… 48 …"BriefDescription": "L3 Lookup external snoop request that access cache and found line in I-state.… 57 …"BriefDescription": "L3 Lookup external snoop request that access cache and found line in M-state.… 66 …"BriefDescription": "L3 Lookup external snoop request that access cache and found line in MESI-sta… 147 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a modified line in so… 156 "BriefDescription": "An external snoop hits a modified line in some processor core.", 165 …"BriefDescription": "A cross-core snoop initiated by this Cbox due to processor core memory reques… 174 …"BriefDescription": "A cross-core snoop resulted from L3 Eviction which hits a non-modified line i… 183 "BriefDescription": "An external snoop hits a non-modified line in some processor core.", 192 …"BriefDescription": "A cross-core snoop initiated by this Cbox due to processor core memory reques… [all …]
/linux/tools/perf/pmu-events/arch/x86/goldmontplus/
H A D	cache.json	239 …"BriefDescription": "Counts data reads (demand & prefetch) miss the L2 cache with a snoop hit in t… 245 …"PublicDescription": "Counts data reads (demand & prefetch) miss the L2 cache with a snoop hit in … 250 … "Counts data reads (demand & prefetch) true miss for the L2 cache with a snoop miss in the other … 256 … "Counts data reads (demand & prefetch) true miss for the L2 cache with a snoop miss in the other … 294 …nts data reads generated by L1 or L2 prefetchers miss the L2 cache with a snoop hit in the other p… 300 …nts data reads generated by L1 or L2 prefetchers miss the L2 cache with a snoop hit in the other p… 305 …reads generated by L1 or L2 prefetchers true miss for the L2 cache with a snoop miss in the other … 311 …reads generated by L1 or L2 prefetchers true miss for the L2 cache with a snoop miss in the other … 349 …for ownership (RFO) requests (demand & prefetch) miss the L2 cache with a snoop hit in the other p… 355 …for ownership (RFO) requests (demand & prefetch) miss the L2 cache with a snoop hit in the other p… [all …]
/linux/tools/perf/pmu-events/arch/x86/rocketlake/
H A D	cache.json	329 …on": "Retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg cor… 334 …ounts retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg cor… 349 … "Retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg c… 354 …e retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg c… 459 …and L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop was sent or not.", 469 …nd L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop hit in another cor… 479 …nd L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop hit in another cor… 489 …nd L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop was sent but no ot… 499 …nd L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop was not needed to … 509 …etches and L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop was sent.", [all …]
/linux/tools/perf/pmu-events/arch/x86/icelake/
H A D	cache.json	329 …on": "Retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg cor… 334 …ounts retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg cor… 349 … "Retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg c… 354 …e retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg c… 459 …and L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop was sent or not.", 469 …nd L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop hit in another cor… 479 …nd L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop hit in another cor… 489 …nd L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop was sent but no ot… 499 …nd L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop was not needed to … 509 …etches and L1 instruction cache prefetches that hit a cacheline in the L3 where a snoop was sent.", [all …]
/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A D	uncore-cache.json	59 "PublicDescription": "Core Cross Snoops Issued : Any Cycle with Multiple Snoops : Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop(s).", 64 "BriefDescription": "Core Cross Snoops Issued : Any Single Snoop", 70 "PublicDescription": "Core Cross Snoops Issued : Any Single Snoop : Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop(s).", 81 "PublicDescription": "Core Cross Snoops Issued : Multiple Core Requests : Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop(s).", 92 "PublicDescription": "Core Cross Snoops Issued : Single Core Requests : Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop( [all...]
H A D	cache.json	3 "BriefDescription": "Hit snoop reply with data, line invalidated.", 7 "PublicDescription": "Counts responses to snoops indicating the line will now be (I)nvalidated: removed from this core's cache, after the data is forwarded back to the requestor and indicating the data was found unmodified in the (FE) Forward or Exclusive State in this cores caches cache. A single snoop response from the core counts on all hyperthreads of the core.", 12 "BriefDescription": "HitM snoop reply with data, line invalidated.", 16 "PublicDescription": "Counts responses to snoops indicating the line will now be (I)nvalidated: removed from this core's caches, after the data is forwarded back to the requestor, and indicating the data was found modified(M) in this cores caches cache (aka HitM response). A single snoop response from the core counts on all hyperthreads of the core.", 21 "BriefDescription": "Hit snoop reply without sending the data, line invalidated.", 25 "PublicDescription": "Counts responses to snoops indicating the line will now be (I)nvalidated in this core's caches without forwarded back to the requestor. The line was in Forward, Shared or Exclusive (FSE) state in this cores caches. A single snoop response from the core counts on all hyperthreads of the core.", 30 "BriefDescription": "Line not found snoop reply", 34 "PublicDescription": "Counts responses to snoops indicating that the data was not found (IHitI) in this core's caches. A single snoop response from the core counts on all hyperthreads of the Core.", 39 "BriefDescription": "Hit snoop reply with data, line kept in Shared state.", 43 "PublicDescription": "Counts responses to snoops indicating the line may be kept on this core in the (S)hared state, after the data is forwarded back to the requestor, initially the data was found in the cache in the (FS) Forward or Shared state. A single snoop respons [all...]
/linux/tools/perf/pmu-events/arch/x86/alderlake/
H A D	cache.json	598 "BriefDescription": "Retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core cache", 603 "PublicDescription": "Counts retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core cache. Available PDIST counters: 0", 620 "BriefDescription": "Retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core cache.", 625 "PublicDescription": "Counts the retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core cache. Available PDIST counters: 0", 642 "BriefDescription": "Retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core cache", 647 "PublicDescription": "Counts retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core cache. Available PDIST counters: 0", 762 "BriefDescription": "Counts the number of load uops retired that hit in the L3 cache, in which a snoop was required and modified data was forwarded from another core or module.", 822 "BriefDescription": "Counts the number of load uops retired that hit in the L3 cache, in which a snoop was required, and non-modified data was forwarded.", 1190 "BriefDescription": "Counts demand instruction fetches and L1 instruction cache prefetches that were supplied by the L3 cache where a snoop was sent, the snoop hi [all...]
/linux/tools/perf/pmu-events/arch/x86/emeraldrapids/
H A D	uncore-cache.json	59 "PublicDescription": "Core Cross Snoops Issued : Any Cycle with Multiple Snoops : Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop(s).", 64 "BriefDescription": "Core Cross Snoops Issued : Any Single Snoop", 70 "PublicDescription": "Core Cross Snoops Issued : Any Single Snoop : Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop(s).", 81 "PublicDescription": "Core Cross Snoops Issued : Multiple Core Requests : Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop(s).", 92 "PublicDescription": "Core Cross Snoops Issued : Single Core Requests : Counts the number of transactions that trigger a configurable number of cross snoops. Cores are snooped if the transaction looks up the cache and determines that it is necessary based on the operation type and what CoreValid bits are set. For example, if 2 CV bits are set on a data read, the cores must have the data in S state so it is not necessary to snoop them. However, if only 1 CV bit is set the core my have modified the data. If the transaction was an RFO, it would need to invalidate the lines. This event can be filtered based on who triggered the initial snoop( [all...]
H A D	cache.json	3 "BriefDescription": "Hit snoop reply with data, line invalidated.", 7 "PublicDescription": "Counts responses to snoops indicating the line will now be (I)nvalidated: removed from this core's cache, after the data is forwarded back to the requestor and indicating the data was found unmodified in the (FE) Forward or Exclusive State in this cores caches cache. A single snoop response from the core counts on all hyperthreads of the core.", 12 "BriefDescription": "HitM snoop reply with data, line invalidated.", 16 "PublicDescription": "Counts responses to snoops indicating the line will now be (I)nvalidated: removed from this core's caches, after the data is forwarded back to the requestor, and indicating the data was found modified(M) in this cores caches cache (aka HitM response). A single snoop response from the core counts on all hyperthreads of the core.", 21 "BriefDescription": "Hit snoop reply without sending the data, line invalidated.", 25 "PublicDescription": "Counts responses to snoops indicating the line will now be (I)nvalidated in this core's caches without forwarded back to the requestor. The line was in Forward, Shared or Exclusive (FSE) state in this cores caches. A single snoop response from the core counts on all hyperthreads of the core.", 30 "BriefDescription": "Line not found snoop reply", 34 "PublicDescription": "Counts responses to snoops indicating that the data was not found (IHitI) in this core's caches. A single snoop response from the core counts on all hyperthreads of the Core.", 39 "BriefDescription": "Hit snoop reply with data, line kept in Shared state.", 43 "PublicDescription": "Counts responses to snoops indicating the line may be kept on this core in the (S)hared state, after the data is forwarded back to the requestor, initially the data was found in the cache in the (FS) Forward or Shared state. A single snoop respons [all...]
/linux/tools/perf/Documentation/
H A D	perf-mem.txt	103 symbol_daddr, symbol_iaddr, dso_daddr, locked, tlb, mem, snoop, 113 - snoop: type of snoop (if any) for the data at the time of the sample 120 symbol_daddr, dso_daddr, snoop, tlb, locked, blocked, local_ins_lat. 134 - snoop: snoop result for the sampled data access 142 mem, snoop, tlb, type. 179 sort keys ("mem" and "snoop"). So unlike other fields and sort keys, they'll 185 $ perf mem report -F mem,snoop 187 # ------ Memory ------- --- Snoop ---- 196 $ perf mem report -s mem,snoop 197 # Overhead Samples Memory access Snoop
/linux/arch/x86/events/intel/
H A D	ds.c	122 #define SNOOP_NONE_MISS (P(SNOOP, NONE) \| P(SNOOP, MISS)) 126 P(OP, LOAD) \| P(LVL, MISS) \| LEVEL(L3) \| P(SNOOP, NA),/* 0x00:ukn L3 / 127 OP_LH \| P(LVL, L1) \| LEVEL(L1) \| P(SNOOP, NONE), / 0x01: L1 local / 128 OP_LH \| P(LVL, LFB) \| LEVEL(LFB) \| P(SNOOP, NONE), / 0x02: LFB hit / 129 OP_LH \| P(LVL, L2) \| LEVEL(L2) \| P(SNOOP, NONE), / 0x03: L2 hit / 130 OP_LH \| P(LVL, L3) \| LEVEL(L3) \| P(SNOOP, NONE), / 0x04: L3 hit / 131 OP_LH \| P(LVL, L3) \| LEVEL(L3) \| P(SNOOP, MISS), / 0x05: L3 hit, snoop miss */ 132 OP_LH \| P(LVL, L3) \| LEVEL(L3) \| P(SNOOP, HI 349 u8 snoop = omr.omr_snoop \| (omr.omr_promoted << 1); parse_omr_data_source() local [all...]
/linux/drivers/soc/aspeed/
H A D	aspeed-lpc-snoop.c	5 * Provides a simple driver to control the ASPEED LPC snoop interface which 27 #define DEVICE_NAME "aspeed-lpc-snoop" 170 /* Check if one of the snoop channels is interrupting / in aspeed_lpc_snoop_irq() 178 / Read and save most recent snoop'ed data byte to FIFO / in aspeed_lpc_snoop_irq() 250 / Enable LPC snoop channel at requested port / in aspeed_lpc_enable_snoop() 288 / Disable both snoop channels */ in aspeed_lpc_snoop_remove() 334 rc = of_property_read_u32_index(dev->of_node, "snoop-ports", idx, &port); in aspeed_lpc_snoop_probe() 361 { .compatible = "aspeed,ast2400-lpc-snoop", 363 { .compatible = "aspeed,ast2500-lpc-snoop", 365 { .compatible = "aspeed,ast2600-lpc-snoop", [all...]
/linux/tools/perf/pmu-events/arch/x86/broadwellde/
H A D	uncore-interconnect.json	206 "PublicDescription": "Misc Events - Set 1 : Lost Forward : Snoop pulled away ownership before a write was committed", 246 "PublicDescription": "Snoop took cacheline ownership before write from data was committed.", 256 "PublicDescription": "Snoop took cacheline ownership before write from data was committed.", 361 "BriefDescription": "Snoop Responses; Hit E or S", 366 "PublicDescription": "Snoop Responses : Hit E or S", 371 "BriefDescription": "Snoop Responses; Hit I", 376 "PublicDescription": "Snoop Responses : Hit I", 381 "BriefDescription": "Snoop Responses; Hit M", 386 "PublicDescription": "Snoop Responses : Hit M", 391 "BriefDescription": "Snoop Response [all...]
/linux/tools/perf/pmu-events/arch/x86/meteorlake/
H A D	cache.json	535 "BriefDescription": "Counts the number of unhalted cycles when the core is stalled due to an ICACHE or ITLB miss which hit in the LLC, no snoop was required. LLC provides the data. If the core has access to an L3 cache, an LLC hit refers to an L3 cache hit, otherwise it counts zeros.", 599 "BriefDescription": "Counts the number of unhalted cycles when the core is stalled due to a demand load miss which hit in the LLC, no snoop was required. LLC provides the data. If the core has access to an L3 cache, an LLC hit refers to an L3 cache hit, otherwise it counts zeros.", 608 "BriefDescription": "Counts the number of unhalted cycles when the core is stalled due to a demand load miss which hit in the LLC, a snoop was required, the snoop misses or the snoop hits but NO_FWD. LLC provides the data. If the core has access to an L3 cache, an LLC hit refers to an L3 cache hit, otherwise it counts zeros.", 775 "BriefDescription": "Retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core cache.", 780 "PublicDescription": "Counts the retired load instructions whose data sources were L3 hit and cross-core snoop missed in on-pkg core cache. Available PDIST counters: 0", 797 "BriefDescription": "Retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core cache", 802 "PublicDescription": "Counts retired load instructions whose data sources were L3 and cross-core snoop hits in on-pkg core cache. Available PDIST counters: 0", 907 "BriefDescription": "Counts the number of load ops retired that hit in the L3 cache in which a snoop wa [all...]
/linux/tools/perf/pmu-events/arch/x86/icelakex/
H A D	cache.json	3 "BriefDescription": "Hit snoop reply with data, line invalidated.", 7 …the (FE) Forward or Exclusive State in this cores caches cache. A single snoop response from the … 12 "BriefDescription": "HitM snoop reply with data, line invalidated.", 16 …und modified(M) in this cores caches cache (aka HitM response). A single snoop response from the … 21 "BriefDescription": "Hit snoop reply without sending the data, line invalidated.", 25 … Forward, Shared or Exclusive (FSE) state in this cores caches. A single snoop response from the … 30 "BriefDescription": "Line not found snoop reply", 34 …ating that the data was not found (IHitI) in this core's caches. A single snoop response from the … 39 "BriefDescription": "Hit snoop reply with data, line kept in Shared state.", 43 …ata was found in the cache in the (FS) Forward or Shared state. A single snoop response from the … [all …]

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